added compressor status signals, fixed all warnings

compressor_jp/cmprs_frame_sync.v

@@ -58,8 +58,10 @@ module  cmprs_frame_sync#(
     output reg                    suspend,            // suspend reading data for this channel - waiting for the source data
 
     input                         stuffer_running,    // @xclk2x stuffer is running/flushing
-    output reg                    force_flush_long    // force flush (abort frame), can be any clock and may last until stuffer_done_mclk
+    output reg                    force_flush_long,    // force flush (abort frame), can be any clock and may last until stuffer_done_mclk
                                                       // stuffer will re-clock and extract 0->1 transition
+    output                        stuffer_running_mclk,
+    output                        reading_frame
 );
 /*
  Abort frame (force flush) if:
@@ -75,23 +77,27 @@ module  cmprs_frame_sync#(
     reg    frames_numbers_differ;  // src and dest point to different frames (multi-frame buffer mode), disregard line_unfinished_*
     reg    line_numbers_sync;      // src unfinished line number is > this unfinished line number
     
-    reg    reading_frame;         // compressor is reading frame data (make sure input is done before starting next frame, otherwise make it a broken frame
+    reg    reading_frame_r;         // compressor is reading frame data (make sure input is done before starting next frame, otherwise make it a broken frame
     reg    broken_frame;
     reg    aborted_frame;
-    reg    stuffer_running_mclk;
+    reg    stuffer_running_mclk_r;
     reg [CMPRS_TIMEOUT_BITS-1:0] timeout;
     reg    cmprs_en_extend_r=0;
     reg    cmprs_en_d;
     assign frame_start_dst = frame_start_dst_r;
     assign cmprs_en_extend = cmprs_en_extend_r;
+    
+    assign stuffer_running_mclk = stuffer_running_mclk_r;
+    assign reading_frame =        reading_frame_r;
+    
     always @ (posedge rst or posedge mclk) begin
         if       (rst)                                      cmprs_en_extend_r <= 0;
         else if  (cmprs_en)                                 cmprs_en_extend_r <= 1;
-        else if  ((timeout == 0) || !stuffer_running_mclk)  cmprs_en_extend_r <= 0;
+        else if  ((timeout == 0) || !stuffer_running_mclk_r)  cmprs_en_extend_r <= 0;
     end
     
     always @ (posedge mclk) begin
-        stuffer_running_mclk <= stuffer_running; // re-clock from negedge xclk2x
+        stuffer_running_mclk_r <= stuffer_running; // re-clock from negedge xclk2x
         
         if      (cmprs_en)           timeout <= CMPRS_TIMEOUT;
         else if (!cmprs_en_extend_r) timeout <= 0;
@@ -99,17 +105,17 @@ module  cmprs_frame_sync#(
         
         cmprs_en_d <= cmprs_en;
 
-        broken_frame <=  cmprs_en && cmprs_run && vsync_late_mclk && reading_frame; // single xclk pulse
-        aborted_frame <= cmprs_en_d && !cmprs_en && stuffer_running_mclk;
+        broken_frame <=  cmprs_en && cmprs_run && vsync_late_mclk && reading_frame_r; // single xclk pulse
+        aborted_frame <= cmprs_en_d && !cmprs_en && stuffer_running_mclk_r;
         
-        if      (!stuffer_running_mclk ||!cmprs_en_extend_r) force_flush_long <= 0;
+        if      (!stuffer_running_mclk_r ||!cmprs_en_extend_r) force_flush_long <= 0;
         else if (broken_frame || aborted_frame)              force_flush_long <= 1;
 
     
-        if (!cmprs_en || frame_done || (cmprs_run && vsync_late_mclk)) reading_frame <= 0;
-        else if (frame_started_mclk)                                   reading_frame <= 1;
+        if (!cmprs_en || frame_done || (cmprs_run && vsync_late_mclk)) reading_frame_r <= 0;
+        else if (frame_started_mclk)                                   reading_frame_r <= 1;
 
-        frame_start_dst_r <= cmprs_en && (cmprs_run ? (vsync_late_mclk && !reading_frame) : cmprs_standalone);
+        frame_start_dst_r <= cmprs_en && (cmprs_run ? (vsync_late_mclk && !reading_frame_r) : cmprs_standalone);
         if      (!cmprs_en)        bonded_mode <= 0;
         else if (cmprs_run)        bonded_mode <= 1;
         else if (cmprs_standalone) bonded_mode <= 0;

compressor_jp/cmprs_status.v

+/*******************************************************************************
+ * Module: cmprs_status
+ * Date:2015-06-25  
+ * Author: andrey     
+ * Description: Generate compressor status word
+ *
+ * Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> .
+ * cmprs_status.v is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ *  cmprs_status.v is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/> .
+ *******************************************************************************/
+`timescale 1ns/1ps
+
+module  cmprs_status(
+    input              mclk,         // system clock
+    input              eof_written,
+    input              stuffer_running,
+    input              reading_frame,
+    output   [2:0]     status
+);
+
+    reg                stuffer_running_r;
+    reg                flushing_fifo;
+    
+    assign status = {flushing_fifo, stuffer_running_r, reading_frame};
+    
+    always @(posedge mclk) begin
+        stuffer_running_r <= stuffer_running;
+        
+        if (stuffer_running_r && !stuffer_running) flushing_fifo <= 1;
+        else if (eof_written)                      flushing_fifo <= 0;
+    end
+
+
+endmodule
+

compressor_jp/jp_channel.v

@@ -92,39 +92,38 @@ module  jp_channel#(
         
         
 )(
-    input         rst,
-    input         xclk,   // global clock input, compressor single clock rate
-    input         xclk2x, // global clock input, compressor double clock rate, nominally rising edge aligned
+    input                         rst,    // global reset
+    input                         xclk,   // global clock input, compressor single clock rate
+    input                         xclk2x, // global clock input, compressor double clock rate, nominally rising edge aligned
     // programming interface
-    input         mclk,     // global system/memory clock
-    input   [7:0] cmd_ad,      // byte-serial command address/data (up to 6 bytes: AL-AH-D0-D1-D2-D3 
-    input         cmd_stb,     // strobe (with first byte) for the command a/d
-    output  [7:0] status_ad,   // status address/data - up to 5 bytes: A - {seq,status[1:0]} - status[2:9] - status[10:17] - status[18:25]
-    output        status_rq,   // input request to send status downstream
-    input         status_start, // Acknowledge of the first status packet byte (address)
+    input                         mclk,     // global system/memory clock
+    input                   [7:0] cmd_ad,      // byte-serial command address/data (up to 6 bytes: AL-AH-D0-D1-D2-D3 
+    input                         cmd_stb,     // strobe (with first byte) for the command a/d
+    output                  [7:0] status_ad,   // status address/data - up to 5 bytes: A - {seq,status[1:0]} - status[2:9] - status[10:17] - status[18:25]
+    output                        status_rq,   // input request to send status downstream
+    input                         status_start, // Acknowledge of the first status packet byte (address)
     
     // TODO: Maybe move buffer to memory controller ?
-    input         xfer_reset_page_rd, // from mcntrl_tiled_rw
-    input         buf_wpage_nxt,     // input
-    input         buf_wr,            // input
-    input  [63:0] buf_wdata, // input[63:0] 
+    input                         xfer_reset_page_rd, // from mcntrl_tiled_rw
+    input                         buf_wpage_nxt,     // input
+    input                         buf_wr,            // input
+    input                  [63:0] buf_wdata, // input[63:0] 
     
-    input         page_ready_chn,     // single mclk (posedge)
-    output        next_page_chn,      // single mclk (posedge): Done with the page in the  buffer, memory controller may read more data 
+    input                         page_ready_chn,     // single mclk (posedge)
+    output                        next_page_chn,      // single mclk (posedge): Done with the page in the  buffer, memory controller may read more data 
 // statistics data was not used in late nc353    
-    input         dccout,         //enable output of DC and HF components for brightness/color/focus adjustments
-    input   [2:0] hfc_sel,        // [2:0] (for autofocus) only components with both spacial frequencies higher than specified will be added
-    output        statistics_dv,
-    output [15:0] statistics_do,
+    input                         dccout,         //enable output of DC and HF components for brightness/color/focus adjustments
+    input                   [2:0] hfc_sel,        // [2:0] (for autofocus) only components with both spacial frequencies higher than specified will be added
+    output                        statistics_dv,
+    output                 [15:0] statistics_do,
 // timestamp input    
-    input  [31:0] sec,
-    input  [19:0] usec,
+    input                  [31:0] sec,
+    input                  [19:0] usec,
 ///    output [23:0] imgptr, - removed - use AFI channel MUX
+    output                        eof_written_mclk,
+    output                        stuffer_done_mclk,
     
-    output [31:0] hifreq,       //  accumulated high frequency components in a frame sub-window
-    
-    
-//    input  [ 1:0] bayer_phase, // shared with sensor channel - remove!
+    output                 [31:0] hifreq,             //  accumulated high frequency components in a frame sub-window
     input                         vsync_late,         // delayed start of frame, @xclk. In 353 it was 16 lines after VACT active
                                                       // source channel should already start, some delay give time for sequencer commands
                                                       // that should arrive before it
@@ -260,8 +259,11 @@ module  jp_channel#(
     wire          enc_dv;
 
 //TODO: use next signals for status
-    wire          eof_written_mclk;
-    wire          stuffer_done_mclk;
+//    wire          eof_written_mclk;
+//    wire          stuffer_done_mclk;
+    wire          stuffer_running_mclk;
+    wire          reading_frame;
+    
 ///    wire          last_block; //huffman393
 ///    wire          test_lbw; 
 
@@ -309,12 +311,12 @@ module  jp_channel#(
 // set derived parameters from converter_type
 //    wire   [ 2:0] converter_type;    // 0 - color18, 1 - color20, 2 - mono, 3 - jp4, 4 - jp4-diff, 7 - mono8 (not yet implemented)
     cmprs_tile_mode_decode #( // fully combinatorial
-        .CMPRS_COLOR18(0),
-        .CMPRS_COLOR20(1),
-        .CMPRS_MONO16(2),
-        .CMPRS_JP4(3),
-        .CMPRS_JP4DIFF(4),
-        .CMPRS_MONO8(7)
+        .CMPRS_COLOR18   (CMPRS_COLOR18),
+        .CMPRS_COLOR20   (CMPRS_COLOR20),
+        .CMPRS_MONO16    (CMPRS_MONO16),
+        .CMPRS_JP4       (CMPRS_JP4),
+        .CMPRS_JP4DIFF   (CMPRS_JP4DIFF),
+        .CMPRS_MONO8     (CMPRS_MONO8)
     ) cmprs_tile_mode_decode_i (
         .converter_type  (converter_type), // input[2:0] 
         .mb_w_m1         (mb_w_m1),        // output[5:0] reg 
@@ -359,20 +361,27 @@ module  jp_channel#(
         .data       (cmd_data), // output[31:0] 
         .we         (cmd_we)    // output
     );
-
+    wire [2:0] status_data; 
+    cmprs_status cmprs_status_i (
+        .mclk            (mclk),                 // input
+        .eof_written     (eof_written_mclk),     // input
+        .stuffer_running (stuffer_running_mclk), // input
+        .reading_frame   (reading_frame),        // input
+        .status          (status_data)           // output[2:0] 
+    );
 
     status_generate #(
         .STATUS_REG_ADDR  (CMPRS_STATUS_REG_ADDR),
-        .PAYLOAD_BITS     (2)
+        .PAYLOAD_BITS     (3)
     ) status_generate_i (
-        .rst              (rst), // input
-        .clk              (mclk), // input
-        .we               (set_status_w), // input
+        .rst              (rst),           // input
+        .clk              (mclk),          // input
+        .we               (set_status_w),  // input
         .wd               (cmd_data[7:0]), // input[7:0] 
-        .status           (status_data), // input[25:0] 
-        .ad               (status_ad), // output[7:0] 
-        .rq               (status_rq), // output
-        .start            (status_start) // input
+        .status           (status_data),   // input[2:0] 
+        .ad               (status_ad),     // output[7:0] 
+        .rq               (status_rq),     // output
+        .start            (status_start)   // input
     );
 
 
@@ -495,7 +504,10 @@ module  jp_channel#(
         .frame_done         (frame_done_dst),      // input - single-cycle pulse when the full frame (window) was transferred to/from DDR3 memory 
         .suspend            (suspend),             // output reg - suspend reading data for this channel - waiting for the source data
         .stuffer_running    (stuffer_running), // input
-        .force_flush_long   (force_flush_long)         // output reg - @ mclk tried to start frame compression before the previous one was finished
+        .force_flush_long   (force_flush_long),         // output reg - @ mclk tried to start frame compression before the previous one was finished
+        .stuffer_running_mclk(stuffer_running_mclk), // output
+        .reading_frame      (reading_frame) // output
+        
     );
 
     cmprs_macroblock_buf_iface cmprs_macroblock_buf_iface_i (