.data_out({arid_out[11:0],arburst_out[1:0],arsize_out[1:0],arlen_out[3:0],araddr_out[ADDRESS_BITS-1:0]}),//SuppressThisWarning ISExst Assignment to arsize ignored, since the identifier is never used
.data_out({awid_out[11:0],awburst_out[1:0],awsize_out[1:0],awlen_out[3:0],awaddr_out[ADDRESS_BITS-1:0]}),//SuppressThisWarning ISExst Assignment to awsize_out ignored, since the identifier is never used
.data_out({awid_out[11:0],awburst_out[1:0],awsize_out[1:0],awlen_out[3:0],awaddr_out[ADDRESS_BITS-1:0]}),//SuppressThisWarning ISExst Assignment to awsize_out ignored, since the identifier is never used
.data_out({wid_out[11:0],wlast_out,wstb_out[3:0],wdata_out[31:0]}),//SuppressThisWarning ISExst Assignment to wlast ignored, since the identifier is never used
.nempty(w_nempty),
.full(),
.half_full(w_half_full)
`ifdefDEBUG_FIFO
,
.under(wdata_under),// output reg
.over(wdata_over),// output reg
.wcount(wdata_wcount),// output[3:0] reg
.rcount(wdata_rcount),// output[3:0] reg
.num_in_fifo(wdata_num_in_fifo)// output[3:0]
`endif
);
//debugging - slow down bresp
regwas_bresp_re=0;
wirebresp_re;
assignbresp_re=bready&&bvalid&&!was_bresp_re;
always@(posedgerstorposedgeaclk)begin
if(rst)was_bresp_re<=0;
elsewas_bresp_re<=bresp_re;
end
fifo_same_clock#(.DATA_WIDTH(14),.DATA_DEPTH(4))
wresp_i(
.rst(rst),
.clk(aclk),
.we(bram_we_w),
.re(bready&&bvalid),
// .re(bready && bvalid),
.re(bresp_re),// not allowing RE next cycle after bvalid
,outputregunder,// debug outputs - under - attempt to read from empty
outputregover,// overwritten
outputreg[DATA_DEPTH-1:0]wcount,
outputreg[DATA_DEPTH-1:0]rcount,
output[DATA_DEPTH-1:0]num_in_fifo
`endif
);
localparamintegerDATA_2DEPTH=(1<<DATA_DEPTH)-1;
//ISExst: FF/Latch ddrc_test01.axibram_write_i.waddr_i.fill[4] has a constant value of 0 in block <ddrc_test01>. This FF/Latch will be trimmed during the optimization process.
//ISExst: FF/Latch ddrc_test01.axibram_read_i.raddr_i.fill[4] has a constant value of 0 in block <ddrc_test01>. This FF/Latch will be trimmed during the optimization process.
//ISExst: FF/Latch ddrc_test01.axibram_write_i.wdata_i.fill[4] has a constant value of 0 in block <ddrc_test01>. This FF/Latch will be trimmed during the optimization process.
assignnext_fill=fill[DATA_DEPTH:0]+((we&&~re)?1:((~we&&re)?-1:0));//S uppressThisWarning ISExst Result of 32-bit expression is truncated to fit in 5-bit target.
// else if (we && ~re) fill <= fill+1; //S uppressThisWarning ISExst Result of 32-bit expression is truncated to fit in 5-bit target.
// else if (~we && re) fill <= fill-1; //S uppressThisWarning ISExst Result of 32-bit expression is truncated to fit in 5-bit target.
if(rst)wem<=0;
elsewem<=we;
if(rst)ram_nempty<=0;
elseram_nempty<=(next_fill!=0);
if(rst)wa<=0;
elseif(wem)wa<=wa+1;//S uppressThisWarning ISExst Result of 32-bit expression is truncated to fit in 4-bit target.
if(rst)ra<=1;// 0;
elseif(re)ra<=ra+1;//now ra is 1 ahead //SuppressThisWarning ISExst Result of 32-bit expression is truncated to fit in 4-bit target.
elseif(!nempty)ra<=wa+1;// Just recover from bit errors TODO: fix //SuppressThisWarning ISExst Result of 32-bit expression is truncated to fit in 4-bit target.
if(rst)nempty<=0;
elsenempty<=(next_fill!=0);
elseif(wem)wa<=wa+1;
if(rst)ra<=0;
elseif(rem)ra<=ra+1;
elseif(!ram_nempty)ra<=wa;// Just recover from bit errors
