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x393
Commit 5335d3b3 authored by Andrey Filippov's avatar Andrey Filippov
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temporary long delay before/after power on to power up w/o subcamera 

synchronization
parent cc0accd7
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py393/hargs-eyesis
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...@@ -5,7 +5,9 @@ ...@@ -5,7 +5,9 @@
-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle -p PICKLE="/usr/local/verilog/x393_mcntrl.pickle
-c bitstream_set_path /usr/local/verilog/x393_parallel.bit -c bitstream_set_path /usr/local/verilog/x393_parallel.bit
-c setupSensorsPower "PAR12" all 0 0.2 -c setupSensorsPower "PAR12" all 0 0.2
-c sleep_ms 5000
-c setEyesisPower 1 -c setEyesisPower 1
-c sleep_ms 5000
-c sleep_ms 20 -c sleep_ms 20
-c measure_all "*DI" -c measure_all "*DI"
-c setSensorClock 24.0 "2V5_LVDS" -c setSensorClock 24.0 "2V5_LVDS"
......
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