last dct branch mods

fpga_version.vh

@@ -35,7 +35,11 @@
  * contains all the components and scripts required to completely simulate it
  * with at least one of the Free Software programs.
  */
-        parameter FPGA_VERSION =          32'h039300d9;      //parallel - correcting histograms -0.022/1, 79.60%
+        parameter FPGA_VERSION =          32'h03930103;      //parallel - three compressor channels -0.177/37, 74.94%
+//      parameter FPGA_VERSION =          32'h03930102;      //parallel - two compressor channels - all met, 67.75%
+//      parameter FPGA_VERSION =          32'h03930101;      //parallel - single compressor channel all met, 61.25%
+//      parameter FPGA_VERSION =          32'h03930100;      //parallel - removing some compressors to make room for DCT-based processing -0.004/3, 80.17 - all channels,
+//      parameter FPGA_VERSION =          32'h039300d9;      //parallel - correcting histograms -0.022/1, 79.60%
 //      parameter FPGA_VERSION =          32'h039300d8;      //parallel - SATA is now logging irq on/off -0.054 /16, 80.50%
 //      parameter FPGA_VERSION =          32'h039300d7;      //parallel - updated SATA (v12) all met, 80.32%
 //      parameter FPGA_VERSION =          32'h039300d6;      //parallel - more SATA debug link layer -0.127/18, 80.03% -> -0.002/4, 80.26%

includes/x393_parameters.vh

@@ -661,7 +661,10 @@
 //    parameter HISPI_IOSTANDARD =          "PPDS_25", //"DIFF_SSTL18_II" for high current (13.4mA vs 8mA)
 //    parameter HISPI_IOSTANDARD =          "DIFF_HSTL_II_18", //"DIFF_SSTL18_II" for high current (13.4mA vs 8mA)
 //`endif  DIFF_HSTL_II_18
-
+//    parameter CMPRS_CHN_MASK =          4'hf, // all channels (specify wich compressor channels to use (disable some/all to make room for processing))
+//    parameter CMPRS_CHN_MASK =          4'h1, // single channel (specify wich compressor channels to use (disable some/all to make room for processing))
+//    parameter CMPRS_CHN_MASK =          4'h3, // two channels (specify wich compressor channels to use (disable some/all to make room for processing))
+    parameter CMPRS_CHN_MASK =            4'h7, // three channels (specify wich compressor channels to use (disable some/all to make room for processing))
 
     parameter CMPRS_NUM_AFI_CHN =         1, // 2, // 1 - multiplex all 4 compressors to a single AXI_HP, 2 - split between to AXI_HP
     parameter CMPRS_GROUP_ADDR =          'h600, // total of 'h60

x393.v

@@ -1144,6 +1144,7 @@ assign axi_grst = axi_rst_pre;
     );
 
     mcntrl393 #(
+        .CMPRS_CHN_MASK                    (CMPRS_CHN_MASK),
         .MCONTR_SENS_BASE                  (MCONTR_SENS_BASE),
         .MCONTR_SENS_INC                   (MCONTR_SENS_INC),
         .MCONTR_CMPRS_BASE                 (MCONTR_CMPRS_BASE),
@@ -1266,6 +1267,7 @@ assign axi_grst = axi_rst_pre;
         .MAX_TILE_HEIGHT                   (MAX_TILE_HEIGHT),
         .MCNTRL_TILED_CHN2_ADDR            (MCNTRL_TILED_CHN2_ADDR),
         .MCNTRL_TILED_CHN4_ADDR            (MCNTRL_TILED_CHN4_ADDR),
+        
         .MCNTRL_TILED_MASK                 (MCNTRL_TILED_MASK),
         .MCNTRL_TILED_MODE                 (MCNTRL_TILED_MODE),
         .MCNTRL_TILED_STATUS_CNTRL         (MCNTRL_TILED_STATUS_CNTRL),
@@ -1978,6 +1980,7 @@ assign axi_grst = axi_rst_pre;
     wire        afi2_wrissuecap1en;     // output
 
     compressor393 #(
+        .CMPRS_CHN_MASK                  (CMPRS_CHN_MASK),
         .CMPRS_NUM_AFI_CHN               (CMPRS_NUM_AFI_CHN),
         .CMPRS_GROUP_ADDR                (CMPRS_GROUP_ADDR),
         .CMPRS_BASE_INC                  (CMPRS_BASE_INC),