Commit 35ff16ab authored by Andrey Filippov's avatar Andrey Filippov

Updated Python code, added some missing comments

parent 57a04d4d
...@@ -62,42 +62,42 @@ ...@@ -62,42 +62,42 @@
<link> <link>
<name>vivado_logs/VivadoBitstream.log</name> <name>vivado_logs/VivadoBitstream.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20150818191452916.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20150826180314606.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoOpt.log</name> <name>vivado_logs/VivadoOpt.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoOpt-20150818190618667.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoOpt-20150826180314606.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoOptPhys.log</name> <name>vivado_logs/VivadoOptPhys.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoOptPhys-20150818191452916.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoOptPhys-20150826180314606.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoOptPower.log</name> <name>vivado_logs/VivadoOptPower.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoOptPower-20150818190618667.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoOptPower-20150826180314606.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoPlace.log</name> <name>vivado_logs/VivadoPlace.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoPlace-20150818190618667.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoPlace-20150826180314606.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoRoute.log</name> <name>vivado_logs/VivadoRoute.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoRoute-20150818191452916.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoRoute-20150826180314606.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoSynthesis.log</name> <name>vivado_logs/VivadoSynthesis.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoSynthesis-20150818185615292.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoSynthesis-20150826175759893.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoTimimgSummaryReportImplemented.log</name> <name>vivado_logs/VivadoTimimgSummaryReportImplemented.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-20150818191452916.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-20150826180314606.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoTimimgSummaryReportSynthesis.log</name> <name>vivado_logs/VivadoTimimgSummaryReportSynthesis.log</name>
...@@ -107,32 +107,32 @@ ...@@ -107,32 +107,32 @@
<link> <link>
<name>vivado_logs/VivadoTimingReportImplemented.log</name> <name>vivado_logs/VivadoTimingReportImplemented.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportImplemented-20150818191452916.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportImplemented-20150826180314606.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoTimingReportSynthesis.log</name> <name>vivado_logs/VivadoTimingReportSynthesis.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportSynthesis-20150818185615292.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportSynthesis-20150826175759893.log</location>
</link> </link>
<link> <link>
<name>vivado_state/x393-opt-phys.dcp</name> <name>vivado_state/x393-opt-phys.dcp</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_state/x393-opt-phys-20150818191452916.dcp</location> <location>/home/andrey/git/x393/vivado_state/x393-opt-phys-20150826180314606.dcp</location>
</link> </link>
<link> <link>
<name>vivado_state/x393-place.dcp</name> <name>vivado_state/x393-place.dcp</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_state/x393-place-20150818190618667.dcp</location> <location>/home/andrey/git/x393/vivado_state/x393-place-20150826180314606.dcp</location>
</link> </link>
<link> <link>
<name>vivado_state/x393-route.dcp</name> <name>vivado_state/x393-route.dcp</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_state/x393-route-20150818191452916.dcp</location> <location>/home/andrey/git/x393/vivado_state/x393-route-20150826180314606.dcp</location>
</link> </link>
<link> <link>
<name>vivado_state/x393-synth.dcp</name> <name>vivado_state/x393-synth.dcp</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_state/x393-synth-20150818185615292.dcp</location> <location>/home/andrey/git/x393/vivado_state/x393-synth-20150826175759893.dcp</location>
</link> </link>
</linkedResources> </linkedResources>
</projectDescription> </projectDescription>
This source diff could not be displayed because it is too large. You can view the blob instead.
...@@ -3,6 +3,5 @@ ...@@ -3,6 +3,5 @@
-f /usr/local/verilog/x393_parameters.vh /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh -f /usr/local/verilog/x393_parameters.vh /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh
-l /usr/local/verilog/x393_cur_params_target.vh -l /usr/local/verilog/x393_cur_params_target.vh
-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle -p PICKLE="/usr/local/verilog/x393_mcntrl.pickle
-c measure_all "ICWRPOASZB" 1 2 2 0xaa None 1 3 -c measure_all "*ICWRPOASZB" 1 2 2 0xaa 1 0 0 3
-c set_phase_delays
-c save -c save
...@@ -119,729 +119,1952 @@ def restore_default(vname=None): ...@@ -119,729 +119,1952 @@ def restore_default(vname=None):
#### PyDev predefines #### PyDev predefines
DFLT_REFRESH_ADDR__TYPE = str #### PyDev predefines
NUM_CYCLES_09__RAW = str
MEMBRIDGE_SIZE64__TYPE = str SS_EN__RAW = str
DQSTRI_LAST__TYPE = str CLKIN_PERIOD_PCLK = int
DLY_LD_MASK__TYPE = str SENSI2C_STATUS_REG_REL__TYPE = str
STATUS_MSB_RSHFT__TYPE = str SENSI2C_CMD_RUN_PBITS__RAW = str
MCONTR_BUF0_RD_ADDR = int HIST_SAXI_AWCACHE__RAW = str
MCNTRL_SCANLINE_WINDOW_WH__RAW = str CLK_STATUS_REG_ADDR__TYPE = str
MCNTRL_TEST01_STATUS_REG_CHN4_ADDR = int
WSEL = int
MCNTRL_TEST01_CHN3_STATUS_CNTRL = int
LD_DLY_LANE1_IDELAY = int
MCONTR_TOP_16BIT_STATUS_CNTRL__TYPE = str MCONTR_TOP_16BIT_STATUS_CNTRL__TYPE = str
HIST_SAXI_ADDR_MASK = int
CONTROL_RBACK_ADDR_MASK = int CONTROL_RBACK_ADDR_MASK = int
MCNTRL_TILED_CHN4_ADDR = int CMPRS_CBIT_QBANK__TYPE = str
WINDOW_Y0__RAW = str CLKOUT_DIV_PCLK__RAW = str
DLY_LD__RAW = str SENS_GAMMA_CTRL__RAW = str
MCNTRL_TEST01_CHN3_MODE__RAW = str
DFLT_INV_CLK_DIV__RAW = str DFLT_INV_CLK_DIV__RAW = str
NUM_CYCLES_12__TYPE = str SENS_LENS_SCALES_MASK__TYPE = str
DLY_LANE0_DQS_WLV_IDELAY__TYPE = str CONTROL_RBACK_DEPTH = int
IBUF_LOW_PWR__RAW = str LOGGER_ADDR__RAW = str
DLY_LANE1_ODELAY__RAW = str DFLT_DQ_TRI_OFF_PATTERN = int
NUM_CYCLES_30__RAW = str
DLY_DQ_IDELAY__TYPE = str DLY_DQ_IDELAY__TYPE = str
MCONTR_TOP_0BIT_ADDR_MASK = int
MCNTRL_TEST01_STATUS_REG_CHN4_ADDR__TYPE = str MCNTRL_TEST01_STATUS_REG_CHN4_ADDR__TYPE = str
MCONTR_LINTILE_RST_FRAME = int
CMPRS_CBIT_CMODE_MONO6__RAW = str
MCONTR_PHY_0BIT_DCI_RST = int MCONTR_PHY_0BIT_DCI_RST = int
TILED_STARTX__TYPE = str SENSOR_FIFO_2DEPTH = int
HIGH_PERFORMANCE_MODE__TYPE = str HIGH_PERFORMANCE_MODE__TYPE = str
MCONTR_PHY_STATUS_REG_ADDR__TYPE = str
MCONTR_TOP_16BIT_ADDR__TYPE = str
AFI_LO_ADDR64__TYPE = str AFI_LO_ADDR64__TYPE = str
WBUF_DLY_WLV__TYPE = str CAMSYNC_TRIG_DELAY2 = int
TEST01_SUSPEND = int
MCONTR_TOP_16BIT_CHN_EN = int
NUM_XFER_BITS__TYPE = str
AFI_SIZE64 = int AFI_SIZE64 = int
DLY_LANE1_IDELAY__TYPE = str LOGGER_CONF_IMU_BITS = int
REF_JITTER1__RAW = str SENS_JTAG_TCK__RAW = str
MCNTRL_TILED_MASK__TYPE = str
MCNTRL_SCANLINE_MASK__TYPE = str MCNTRL_SCANLINE_MASK__TYPE = str
DFLT_DQ_TRI_ON_PATTERN = int
MCONTR_PHY_0BIT_SDRST_ACT = int MCONTR_PHY_0BIT_SDRST_ACT = int
DEFAULT_STATUS_MODE = int SENSI2C_IBUF_LOW_PWR = str
MEMBRIDGE_START64__TYPE = str CLKOUT_DIV_PCLK2X__RAW = str
TILED_EXTRA_PAGES__TYPE = str TILED_EXTRA_PAGES__TYPE = str
DLY_LD__TYPE = str DQSTRI_LAST = int
MCNTRL_TEST01_CHN2_STATUS_CNTRL__TYPE = str MCNTRL_TEST01_CHN2_STATUS_CNTRL__TYPE = str
MCNTRL_SCANLINE_FRAME_PAGE_RESET = int
STATUS_2LSB_SHFT__TYPE = str STATUS_2LSB_SHFT__TYPE = str
SENS_SS_EN__TYPE = str
MEMBRIDGE_LEN64__TYPE = str
LOGGER_CONF_EN__RAW = str
HIST_CONFIRM_WRITE = int
CMPRS_GROUP_ADDR__TYPE = str
CMDFRAMESEQ_ADDR_INC = int
CAMSYNC_TRIG_PERIOD = int
CMPRS_CBIT_FRAMES_BITS = int
SENSOR_HIST_EN_BITS__TYPE = str
CMDSEQMUX_STATUS__TYPE = str
DFLT_DQS_PATTERN__TYPE = str
MCONTR_LINTILE_SINGLE = int
MCNTRL_TEST01_ADDR__RAW = str
SENS_GAMMA_MODE_PAGE__RAW = str
CLKFBOUT_PHASE_SENSOR = float
DFLT_REFRESH_PERIOD = int
MCONTR_TOP_0BIT_REFRESH_EN__TYPE = str
NUM_CYCLES_20__TYPE = str
SENS_JTAG_PGMEN = int
NUM_CYCLES_03__TYPE = str
CMPRS_CBIT_RUN_BITS__TYPE = str
LD_DLY_LANE1_IDELAY__TYPE = str
TILED_EXTRA_PAGES__RAW = str
CMPRS_NUM_AFI_CHN = int
CAMSYNC_TRIG_SRC__RAW = str
MEMCLK_CAPACITANCE = str
MULT_SAXI_ADV_RD__TYPE = str
SENSIO_WIDTH__TYPE = str
MCNTRL_TEST01_CHN3_STATUS_CNTRL__TYPE = str
CONTROL_RBACK_ADDR__RAW = str
CMPRS_AFIMUX_CYCBITS = int
RTC_MHZ = int
SENS_LENS_C_MASK = int
MCONTR_PHY_16BIT_EXTRA = int
HIST_SAXI_EN__TYPE = str
MCONTR_PHY_16BIT_PATTERNS_TRI = int
WINDOW_Y0__RAW = str
CMPRS_STATUS_CNTRL = int
CLK_STATUS_REG_ADDR__RAW = str
CMPRS_CSAT_CB_BITS__TYPE = str
SENSI2C_SLEW__TYPE = str
MEMBRIDGE_WIDTH64__RAW = str
LOGGER_CONF_MSG_BITS__RAW = str
SENS_GAMMA_MODE_REPET = int
CLKFBOUT_MULT_REF = int
CMPRS_CBIT_BAYER_BITS__TYPE = str
MCONTR_CMPRS_STATUS_INC = int
MCONTR_PHY_0BIT_CMDA_EN__TYPE = str
MCNTRL_TEST01_STATUS_REG_CHN1_ADDR = int
RTC_SET_STATUS__TYPE = str
CMPRS_CBIT_QBANK_BITS__RAW = str
FFCLK0_IBUF_DELAY_VALUE__RAW = str
WINDOW_HEIGHT = int
CAMSYNC_TRIG_DELAY0__RAW = str
MCONTR_SENS_STATUS_INC__RAW = str
SENSOR_HIST_NRST_BITS = int
SENSI2C_ABS_RADDR__RAW = str
MCNTRL_TEST01_STATUS_REG_CHN1_ADDR__RAW = str
CLKFBOUT_MULT = int
RTC_STATUS_REG_ADDR__RAW = str
SENS_LENS_C_MASK__RAW = str
NUM_CYCLES_11__TYPE = str
CMPRS_CBIT_QBANK_BITS__TYPE = str
SENS_GAMMA_MODE_TRIG = int
RTC_SET_USEC = int
RTC_BITC_PREDIV__TYPE = str
LD_DLY_CMDA = int
DLY_SET__RAW = str
DFLT_REFRESH_ADDR__RAW = str
MCNTRL_PS_ADDR__RAW = str
NUM_FRAME_BITS__RAW = str
LOGGER_CONF_GPS__TYPE = str
HIST_SAXI_EN__RAW = str
SENSOR_16BIT_BIT__RAW = str
HIST_SAXI_AWCACHE__TYPE = str
SENSI2C_CMD_RUN_PBITS__TYPE = str
LOGGER_CONF_SYN_BITS__TYPE = str
SENS_LENS_FAT0_OUT__RAW = str
CAMSYNC_TRIG_SRC = int
CLKOUT_DIV_PCLK__TYPE = str
LOGGER_PAGE_IMU = int
MEMCLK_IOSTANDARD__RAW = str
CLKFBOUT_MULT_SYNC__TYPE = str
MAX_TILE_HEIGHT__RAW = str
BUF_IPCLK2X_SENS3__TYPE = str
IBUF_LOW_PWR = str
CMD_DONE_BIT = int
NUM_CYCLES_31 = int
NUM_CYCLES_30 = int
CMPRS_CBIT_QBANK__RAW = str
SENS_SYNC_MASK__TYPE = str
MCONTR_BUF0_RD_ADDR__RAW = str
SENS_PHASE_WIDTH = int
HIST_SAXI_MODE_ADDR_MASK__TYPE = str
MCONTR_CMPRS_STATUS_BASE__RAW = str
SENS_LENS_RADDR__TYPE = str
CAMSYNC_PRE_MAGIC__TYPE = str
MCNTRL_TEST01_CHN3_STATUS_CNTRL__RAW = str
FFCLK0_DQS_BIAS = str
CMPRS_JP4DIFF__TYPE = str
LOGGER_CONF_DBG__RAW = str
FRAME_START_ADDRESS_INC__TYPE = str
DLY_DQS_IDELAY__TYPE = str
CLK_PHASE = float
MCNTRL_TILED_FRAME_PAGE_RESET = int
MCONTR_SENS_STATUS_BASE__TYPE = str
CMPRS_FORMAT__TYPE = str
DLY_LANE1_DQS_WLV_IDELAY__RAW = str
SENS_LENS_RADDR = int
PXD_IOSTANDARD = str
MAX_TILE_HEIGHT = int
BUF_CLK1X_PCLK = str
LOGGER_CONF_DBG_BITS = int
SENS_CTRL_ARO__TYPE = str
SENS_LENS_SCALES_MASK__RAW = str
MCNTRL_TILED_STATUS_REG_CHN2_ADDR__TYPE = str
MCONTR_LINTILE_BYTE32__RAW = str
HISTOGRAM_WIDTH_HEIGHT = int
SENSOR_HIST_NRST_BITS__RAW = str
MCONTR_RD_MASK__TYPE = str
MULT_SAXI_CNTRL_MASK = int
NUM_CYCLES_23__RAW = str
REF_JITTER1__RAW = str
CAMSYNC_MASK__TYPE = str
SENS_JTAG_PGMEN__RAW = str
MCONTR_LINTILE_EXTRAPG_BITS__TYPE = str
SENS_CTRL_RST_MMCM = int
LOGGER_CONF_EN_BITS__TYPE = str
CLKIN_PERIOD_PCLK__RAW = str
SENS_LENS_POST_SCALE_MASK = int
BUF_IPCLK2X_SENS1__RAW = str
SENSOR_MODE_WIDTH__RAW = str
SENS_LENS_FAT0_OUT_MASK = int
SENS_SYNC_MULT__TYPE = str
NUM_CYCLES_27__RAW = str
SENSI2C_IOSTANDARD__RAW = str
SCANLINE_EXTRA_PAGES__TYPE = str
MCONTR_SENS_BASE__RAW = str
CMPRS_CBIT_CMODE_JP4DIFF__RAW = str
CMPRS_AFIMUX_MASK__TYPE = str
MCONTR_SENS_INC = int
CAMSYNC_TRIG_PERIOD__TYPE = str
DFLT_DQS_PATTERN = int
SENSI2C_CMD_SCL__TYPE = str
SENS_GAMMA_ADDR_DATA__RAW = str
DLY_LANE1_IDELAY__RAW = str
SLEW_CLK = str
CMPRS_JP4DIFF = int
RTC_STATUS_REG_ADDR = int
SENS_LENS_BY_MASK__TYPE = str
CMPRS_CBIT_CMODE__RAW = str
CMPRS_JP4__TYPE = str
AFI_MUX_BUF_LATENCY = int
WINDOW_WIDTH = int
CLK_CNTRL__RAW = str
MCONTR_LINTILE_EXTRAPG_BITS = int
MCONTR_LINTILE_RST_FRAME__TYPE = str
LAST_BUF_FRAME__RAW = str
CMPRS_AFIMUX_RADDR1__RAW = str
MCNTRL_TEST01_CHN1_STATUS_CNTRL__RAW = str
CMPRS_CBIT_DCSUB_BITS__RAW = str
SENS_CTRL_LD_DLY__RAW = str
HIST_SAXI_MODE_ADDR_REL__TYPE = str
CMPRS_CBIT_CMODE_JP46__TYPE = str
NUM_CYCLES_17__RAW = str
DFLT_WBUF_DELAY__RAW = str DFLT_WBUF_DELAY__RAW = str
CAMSYNC_POST_MAGIC__RAW = str
MCNTRL_TEST01_CHN2_MODE__TYPE = str
NUM_CYCLES_24__RAW = str
NUM_CYCLES_13__RAW = str
LOGGER_CONF_MSG__RAW = str
MCNTRL_TILED_STATUS_REG_CHN2_ADDR__RAW = str
LAST_FRAME_BITS__RAW = str
SENS_DIVCLK_DIVIDE = int
SENS_LENS_COEFF__RAW = str
CMPRS_CONTROL_REG = int
GPIO_STATUS_REG_ADDR = int
MCNTRL_SCANLINE_WINDOW_WH__TYPE = str
CMPRS_AFIMUX_RADDR0__TYPE = str
MCNTRL_TILED_WINDOW_WH__RAW = str
DLY_DM_ODELAY__RAW = str
CMPRS_FRMT_MBRM1_BITS = int
CAMSYNC_EXTERNAL_BIT = int
CMPRS_STATUS_REG_BASE__TYPE = str
AFI_MUX_BUF_LATENCY__TYPE = str
SENSOR_CTRL_RADDR = int
FRAME_WIDTH_BITS__RAW = str
ADDRESS_NUMBER__RAW = str
STATUS_PSHIFTER_RDY_MASK__TYPE = str
SENSI2C_ADDR_MASK = int
LD_DLY_LANE1_IDELAY = int
SENS_SYNC_MASK = int
DIVCLK_DIVIDE = int
CMD_PAUSE_BITS__RAW = str
IDELAY_VALUE__RAW = str
MCONTR_CMPRS_STATUS_BASE = int
BUFFER_DEPTH32 = int
SENS_CTRL_QUADRANTS__TYPE = str
SENS_LENS_BY_MASK__RAW = str
DFLT_REFRESH_ADDR = int
SENS_LENS_BX_MASK__TYPE = str
TEST01_SUSPEND__RAW = str
SENS_GAMMA_HEIGHT01__TYPE = str
CMPRS_HIFREQ_REG_INC = int
STATUS_ADDR_MASK__TYPE = str
MCONTR_TOP_0BIT_ADDR_MASK__RAW = str
TEST01_START_FRAME = int
RTC_SET_USEC__RAW = str
LOGGER_CONF_SYN_BITS__RAW = str
CAMSYNC_ADDR__TYPE = str
DIVCLK_DIVIDE_AXIHP__RAW = str
CMPRS_CBIT_CMODE_JP4DIFFDIV2__TYPE = str
SENSI2C_CMD_SCL__RAW = str
MULT_SAXI_BSLOG1__TYPE = str
LOGGER_CONF_MSG_BITS__TYPE = str
LOGGER_ADDR = int
MCONTR_PHY_0BIT_DCI_RST__RAW = str
REFCLK_FREQUENCY__RAW = str
LOGGER_BIT_HALF_PERIOD__RAW = str
MCNTRL_TEST01_STATUS_REG_CHN3_ADDR__TYPE = str
DLY_DQ_ODELAY__TYPE = str
SENSOR_FIFO_2DEPTH__TYPE = str
NUM_CYCLES_28 = int
NUM_CYCLES_29 = int
NUM_CYCLES_26 = int
NUM_CYCLES_27 = int
NUM_CYCLES_24 = int
NUM_CYCLES_25 = int
NUM_CYCLES_22 = int
NUM_CYCLES_23 = int
NUM_CYCLES_20 = int
NUM_CYCLES_21 = int
FRAME_FULL_WIDTH__TYPE = str
CAMSYNC_TRIG_DELAY2__TYPE = str
SENSI2C_CMD_BYTES_PBITS__TYPE = str
CMDFRAMESEQ_REL__TYPE = str
PICKLE = str
AFI_SIZE64__TYPE = str
NUM_CYCLES_LOW_BIT__TYPE = str
MCONTR_PHY_0BIT_ADDR_MASK = int
DFLT_WBUF_DELAY__TYPE = str
MCNTRL_TEST01_CHN1_STATUS_CNTRL = int
SENSI2C_STATUS_REG_INC__TYPE = str
CMPRS_FRMT_MBRM1_BITS__RAW = str
SCANLINE_EXTRA_PAGES = int
LD_DLY_LANE1_ODELAY__RAW = str
LOGGER_CONF_EN_BITS__RAW = str
DIVCLK_DIVIDE_SYNC__RAW = str
SENS_LENS_FAT0_IN_MASK__TYPE = str
PHASE_CLK2X_XCLK = float
RSEL = int
CMPRS_CBIT_DCSUB_BITS__TYPE = str
AXI_RD_ADDR_BITS__TYPE = str
CAMSYNC_CHN_EN_BIT__TYPE = str
CMDFRAMESEQ_ADDR_BASE__RAW = str
CONTROL_ADDR__RAW = str
SENSI2C_CMD_RESET = int
CMPRS_FRMT_MBCM1_BITS__TYPE = str
SENS_CTRL_QUADRANTS_EN__RAW = str
NUM_CYCLES_14__TYPE = str
MCONTR_CMPRS_INC__TYPE = str
TILED_EXTRA_PAGES = int
DLY_DQS_ODELAY__RAW = str
CLKIN_PERIOD_PCLK__TYPE = str
FFCLK1_DIFF_TERM__RAW = str
SENS_JTAG_TDI__RAW = str
MCONTR_SENS_STATUS_BASE = int
AXI_WR_ADDR_BITS__RAW = str
SENSI2C_CMD_RUN__TYPE = str
CMPRS_CORING_MODE = int
DIVCLK_DIVIDE_SYNC__TYPE = str
LOGGER_STATUS__TYPE = str
DFLT_REFRESH_PERIOD__TYPE = str
SENSI2C_CMD_SCL_WIDTH = int
MCNTRL_TILED_FRAME_FULL_WIDTH__RAW = str
MCNTRL_TILED_MASK = int
SENSIO_JTAG__RAW = str
MCONTR_PHY_16BIT_ADDR_MASK__RAW = str
SENSIO_STATUS__TYPE = str
CLKIN_PERIOD_AXIHP__TYPE = str
LOGGER_CONF_SYN__TYPE = str
CAMSYNC_DELAY__RAW = str
LOGGER_CONF_DBG_BITS__RAW = str
FRAME_HEIGHT_BITS__RAW = str
MCONTR_LINTILE_KEEP_OPEN = int
CLKFBOUT_MULT_SYNC = int
DLY_CMDA_ODELAY = long
SENS_LENS_C = int
MCONTR_ARBIT_ADDR_MASK = int
MCNTRL_SCANLINE_STATUS_REG_CHN3_ADDR = int
MCNTRL_SCANLINE_WINDOW_WH = int
WBUF_DLY_WLV__RAW = str
MCNTRL_TILED_FRAME_LAST = int
MCNTRL_TEST01_CHN2_MODE__RAW = str
CMPRS_AFIMUX_REG_ADDR0__TYPE = str
RTC_SEC_USEC_ADDR = int
LOGGER_CONF_DBG = int
CAMSYNC_EN_BIT__TYPE = str
LD_DLY_LANE0_IDELAY = int
NUM_CYCLES_01__TYPE = str
NUM_CYCLES_24__TYPE = str
MCLK_PHASE__TYPE = str
DIVCLK_DIVIDE_XCLK__RAW = str
SENSI2C_DRIVE__TYPE = str
SENS_CTRL_RST_MMCM__RAW = str
GPIO_SET_STATUS = int
GPIO_SLEW__TYPE = str
SENS_LENS_BX__RAW = str
TEST_INITIAL_BURST = int
SENS_REF_JITTER1__RAW = str
MCNTRL_TILED_FRAME_FULL_WIDTH = int
CMDFRAMESEQ_DEPTH = int
SENS_LENS_POST_SCALE__TYPE = str
CMPRS_TABLES__TYPE = str
FRAME_HEIGHT_BITS = int
HIST_SAXI_ADDR_MASK__TYPE = str
SENS_CTRL_LD_DLY = int
CLKOUT_DIV_SYNC__RAW = str
SENS_LENS_FAT0_IN_MASK__RAW = str
SENS_LENS_AY_MASK__RAW = str
MCONTR_TOP_16BIT_REFRESH_ADDRESS__TYPE = str
MCONTR_LINTILE_DIS_NEED__TYPE = str
DFLT_DQS_PATTERN__RAW = str
MCNTRL_PS_STATUS_CNTRL__TYPE = str
MCONTR_PHY_16BIT_ADDR = int
REF_JITTER1__TYPE = str
FFCLK1_DIFF_TERM = str
FFCLK0_IOSTANDARD__TYPE = str
STATUS_MSB_RSHFT = int
CMPRS_CONTROL_REG__RAW = str
CLKIN_PERIOD__TYPE = str
SENS_GAMMA_CTRL = int
CLKFBOUT_MULT_AXIHP__RAW = str
SENSIO_RADDR = int
BUF_CLK1X_PCLK__RAW = str
BUF_CLK1X_XCLK2X = str
GPIO_N__TYPE = str
MCONTR_BUF4_RD_ADDR__TYPE = str
NUM_CYCLES_16__RAW = str
LD_DLY_LANE0_ODELAY__TYPE = str
MCONTR_TOP_16BIT_ADDR__RAW = str
SENSIO_STATUS = int
HIST_SAXI_MODE_ADDR_REL = int
MCONTR_PHY_0BIT_SDRST_ACT__TYPE = str
BUFFER_DEPTH32__TYPE = str
CLKIN_PERIOD_AXIHP = int
MCONTR_TOP_16BIT_REFRESH_ADDRESS = int
HISTOGRAM_RADDR0__TYPE = str
LOGGER_CONF_SYN_BITS = int
NUM_CYCLES_19 = int
MCNTRL_TEST01_MASK__TYPE = str
SENS_CTRL_QUADRANTS_WIDTH__RAW = str
SENSOR_FIFO_DELAY__RAW = str
DLY_SET = int
CMDFRAMESEQ_CTRL__TYPE = str
NUM_CYCLES_12 = int
SENSI2C_CMD_DLY = int
MCNTRL_SCANLINE_FRAME_PAGE_RESET__TYPE = str
MCNTRL_TILED_CHN2_ADDR__TYPE = str
NUM_CYCLES_11 = int
SENS_GAMMA_ADDR_MASK = int
NUM_CYCLES_10 = int
MEMCLK_IBUF_LOW_PWR__TYPE = str
CMPRS_HIFREQ_REG_BASE__TYPE = str
SENS_HIGH_PERFORMANCE_MODE__RAW = str
MCNTRL_SCANLINE_FRAME_PAGE_RESET__RAW = str
DQTRI_LAST__TYPE = str
LD_DLY_LANE1_ODELAY__TYPE = str
DLY_DQ_ODELAY = long
BUF_IPCLK_SENS1__TYPE = str
FFCLK0_IFD_DELAY_VALUE__TYPE = str
MCONTR_TOP_16BIT_ADDR = int
CMPRS_TIMEOUT = int
CMPRS_AFIMUX_RST = int
NUM_CYCLES_18 = int
SENS_LENS_POST_SCALE_MASK__RAW = str
NUM_CYCLES_13 = int
CMPRS_FRMT_MBRM1__TYPE = str
VERBOSE__RAW = str
LOGGER_CONF_IMU_BITS__RAW = str
NUM_CYCLES_17 = int
NUM_CYCLES_16 = int
NUM_CYCLES_15 = int
NUM_CYCLES_21__TYPE = str
CMPRS_CBIT_BAYER = int
GPIO_PORTEN__RAW = str
SLEW_CLK__TYPE = str
MCONTR_PHY_0BIT_DLY_SET = int
CLKFBOUT_DIV_REF__RAW = str
CMD_PAUSE_BITS = int
CMPRS_CBIT_CMODE_JP4DIFFHDR__RAW = str
SENSIO_STATUS_REG_REL = int
BUF_IPCLK_SENS3__TYPE = str
MCNTRL_TILED_MODE = int
MCNTRL_TILED_WINDOW_STARTXY__TYPE = str
MCNTRL_TEST01_CHN2_STATUS_CNTRL__RAW = str
LOGGER_CONF_SYN = int
MCNTRL_TILED_CHN4_ADDR__RAW = str
CLK_DIV_PHASE__RAW = str
MCONTR_PHY_16BIT_PATTERNS__TYPE = str
MCONTR_PHY_0BIT_CKE_EN__RAW = str
NUM_CYCLES_26__TYPE = str
PICKLE__RAW = str
DQSTRI_LAST__RAW = str
SENSI2C_CMD_DLY_PBITS__TYPE = str
WRITELEV_OFFSET__TYPE = str
CMPRS_BASE_INC = int
GPIO_IOSTANDARD__TYPE = str
FFCLK1_IBUF_LOW_PWR = str
HIST_SAXI_ADDR_REL__RAW = str
CMPRS_CBIT_CMODE_MONO4__TYPE = str
HIST_SAXI_MODE_WIDTH__RAW = str
SENS_LENS_AX = int
MCONTR_PHY_16BIT_PATTERNS = int
SENSOR_CTRL_ADDR_MASK__TYPE = str
CMPRS_MONO16__RAW = str
RTC_ADDR = int
MCLK_PHASE__RAW = str
SENSIO_RADDR__TYPE = str
CLKFBOUT_MULT_PCLK__TYPE = str
CLK_ADDR__TYPE = str
CMPRS_FORMAT = int
FFCLK1_CAPACITANCE = str
CMPRS_CBIT_CMODE_BITS__RAW = str
CMPRS_TABLES = int
HIST_SAXI_MODE_WIDTH = int
CMPRS_AFIMUX_RADDR0__RAW = str
CAMSYNC_EN_BIT = int
MCONTR_PHY_16BIT_PATTERNS__RAW = str
HISTOGRAM_RAM_MODE = str
SENS_REFCLK_FREQUENCY__TYPE = str
SENS_GAMMA_MODE_EN__RAW = str
MULT_SAXI_ADV_WR__RAW = str
LOGGER_PAGE_GPS = int
HIST_SAXI_MODE_ADDR_MASK = int
WRITELEV_OFFSET = int
LOGGER_CONF_MSG = int
CMPRS_CSAT_CR__RAW = str
CMPRS_CBIT_RUN = int
SENS_LENS_ADDR_MASK__RAW = str
SENS_CTRL_QUADRANTS__RAW = str
RTC_MASK__RAW = str
SENS_LENS_ADDR_MASK__TYPE = str
FFCLK0_IFD_DELAY_VALUE__RAW = str
SENS_LENS_AX__TYPE = str
PXD_DRIVE__TYPE = str
HIST_SAXI_NRESET = int
MULT_SAXI_HALF_BRAM_IN__RAW = str
CMPRS_CBIT_CMODE_JP4DIFFHDR__TYPE = str
CMPRS_CBIT_CMODE_JP4__RAW = str
DFLT_DQM_PATTERN__RAW = str
GPIO_SET_STATUS__RAW = str
SENS_JTAG_TCK = int
REFRESH_OFFSET__TYPE = str
SENS_CTRL_ARST__RAW = str
CMPRS_CBIT_DCSUB__TYPE = str
DFLT_INV_CLK_DIV__TYPE = str
PHASE_CLK2X_XCLK__TYPE = str
SENS_GAMMA_MODE_BAYER__RAW = str
MCNTRL_PS_STATUS_REG_ADDR__TYPE = str
CMPRS_CBIT_FOCUS_BITS__TYPE = str
STATUS_ADDR__RAW = str
NUM_CYCLES_30__TYPE = str
SDCLK_PHASE__RAW = str
SENS_SYNC_RADDR__TYPE = str
BUF_IPCLK_SENS0__TYPE = str
SENSI2C_CMD_RUN__RAW = str
FFCLK1_IFD_DELAY_VALUE__RAW = str
SENS_GAMMA_MODE_WIDTH__TYPE = str
MCNTRL_TILED_STARTADDR__TYPE = str
DLY_LD_MASK = int
MCONTR_LINTILE_BYTE32 = int
NUM_CYCLES_09__RAW = str
SENS_SYNC_LBITS__RAW = str
MEMBRIDGE_SIZE64__TYPE = str
SENS_GAMMA_HEIGHT2 = int
DLY_LD_MASK__TYPE = str
STATUS_MSB_RSHFT__TYPE = str
MCONTR_BUF0_RD_ADDR = int
MCONTR_LINTILE_RST_FRAME__RAW = str
CMPRS_CBIT_CMODE_JPEG20 = int
CMPRS_TIMEOUT_BITS = int
CAMSYNC_PRE_MAGIC = int
SENS_JTAG_TMS = int
MCNTRL_TEST01_CHN3_STATUS_CNTRL = int
MCNTRL_PS_EN_RST__TYPE = str
BUF_CLK1X_PCLK2X__TYPE = str
FFCLK1_IFD_DELAY_VALUE__TYPE = str
MCNTRL_TILED_CHN4_ADDR = int
MCONTR_SENS_INC__TYPE = str
LOGGER_MASK__RAW = str
IBUF_LOW_PWR__RAW = str
DLY_CMDA_ODELAY__TYPE = str
SENS_LENS_FAT0_OUT_MASK__TYPE = str
SENSI2C_ABS_RADDR__TYPE = str
MCONTR_PHY_STATUS_REG_ADDR__TYPE = str
WBUF_DLY_WLV__TYPE = str
SENS_JTAG_TMS__TYPE = str
MEMBRIDGE_WIDTH64__TYPE = str
MCONTR_TOP_16BIT_CHN_EN = int
BUF_IPCLK2X_SENS1__TYPE = str
DEFAULT_STATUS_MODE = int
CMPRS_CBIT_CMODE_JPEG18__TYPE = str
MULT_SAXI_AWCACHE = int
MCNTRL_SCANLINE_FRAME_PAGE_RESET = int
MCNTRL_TILED_FRAME_PAGE_RESET__TYPE = str MCNTRL_TILED_FRAME_PAGE_RESET__TYPE = str
TILE_VSTEP__RAW = str CMPRS_CBIT_CMODE_JP46DC__RAW = str
MEMBRIDGE_LEN64__TYPE = str CMPRS_CSAT_CR_BITS__TYPE = str
NUM_CYCLES_04 = int
NUM_CYCLES_05 = int NUM_CYCLES_05 = int
DLY_LD = int NUM_CYCLES_06 = int
NUM_CYCLES_07 = int NUM_CYCLES_07 = int
NUM_CYCLES_00 = int NUM_CYCLES_00 = int
NUM_CYCLES_01 = int NUM_CYCLES_01 = int
MCNTRL_SCANLINE_CHN1_ADDR__TYPE = str NUM_CYCLES_02 = int
NUM_CYCLES_03 = int NUM_CYCLES_03 = int
SENSIO_ADDR_MASK__TYPE = str
DIVCLK_DIVIDE_XCLK = int
NUM_CYCLES_08 = int NUM_CYCLES_08 = int
NUM_CYCLES_09 = int NUM_CYCLES_09 = int
MCNTRL_TEST01_CHN4_STATUS_CNTRL__TYPE = str MCNTRL_TEST01_CHN4_STATUS_CNTRL__TYPE = str
NUM_CYCLES_13__RAW = str SENS_SYNC_LBITS = int
MCONTR_BUF0_RD_ADDR__TYPE = str STATUS_DEPTH__RAW = str
STATUS_ADDR__RAW = str NUM_CYCLES_25__TYPE = str
DLY_LANE0_IDELAY__TYPE = str SENSI2C_CMD_DLY_PBITS__RAW = str
MCNTRL_PS_ADDR__TYPE = str MCONTR_LINTILE_REPEAT = int