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x393
Commit 2f80e662 authored by Andrey Filippov's avatar Andrey Filippov
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added frame start delay to memory channels, more python functions for debugging drivers

parent 9c2c7263
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Showing with 441 additions and 65 deletions
cocotb/x393_cocotb_02.sav
View file @ 2f80e662
[*]
[*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI
[*] Fri Aug 26 03:11:57 2016
[*] Mon Aug 29 02:48:05 2016
[*]
[dumpfile] "/home/eyesis/git/x393-neon/simulation/x393_dut-20160825202535502.fst"
[dumpfile_mtime] "Fri Aug 26 02:56:41 2016"
[dumpfile_size] 171390450
[dumpfile] "/home/eyesis/git/x393-neon/simulation/x393_dut-20160828192314061.fst"
[dumpfile_mtime] "Mon Aug 29 01:55:16 2016"
[dumpfile_size] 172137517
[savefile] "/home/eyesis/git/x393-neon/cocotb/x393_cocotb_02.sav"
[timestart] 177022600
[timestart] 177303100
[size] 1836 1171
[pos] 0 23
*-17.349640 177492388 123238096 124220833 174385000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[pos] 1920 23
*-15.588772 177422388 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] x393_dut.
[treeopen] x393_dut.ddr3_i.ddr3_i.
[treeopen] x393_dut.simul_axi_master_wdata_i.
......@@ -34,22 +34,24 @@
[treeopen] x393_dut.x393_i.frame_sequencer_block[0].
[treeopen] x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.
[treeopen] x393_dut.x393_i.gpio393_i.
[treeopen] x393_dut.x393_i.mcntrl393_i.
[treeopen] x393_dut.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.
[treeopen] x393_dut.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.
[treeopen] x393_dut.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.
[treeopen] x393_dut.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.mmcm_phase_cntr_i.
[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].
[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.
[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.
[treeopen] x393_dut.x393_i.sensors393_i.
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_parallel12_i.
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_membuf_i.
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[1].
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[2].
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[3].
[sst_width] 311
[signals_width] 350
[sst_width] 358
[signals_width] 293
[sst_expanded] 1
[sst_vpaned_height] 540
@820
......@@ -298,6 +300,26 @@ x393_dut.x393_i.sync_resets_i.rst_early_master
-resets
@800200
-sensor_channel0
@c00200
-sens_sync
@28
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.sof_in
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.sof_dly
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.hact
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.en
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.hact_r
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.hact_single
@22
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.line_dly_pclk[15:0]
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.lines_left[15:0]
@28
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.last_line
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.pre_sof_late
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.sof_late
@200
-
@1401200
-sens_sync
@22
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_membuf_i.px_data[15:0]
@28
......@@ -325,7 +347,21 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.pxd[11:0]
-group_end
@8022
x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.pxd[11:0]
x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0]
@800022
#{x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0]} (0)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (1)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (2)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (3)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (4)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (5)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (6)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (7)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (8)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (9)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (10)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (11)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0]
@1001200
-group_end
@800200
-scanline0
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_start
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_start_late
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_start_delayed
@22
x393_dut.x393_i.sens_frame_run[3:0]
x393_dut.x393_i.cmprs_frame_start_dst[3:0]
@1000200
-scanline0
@800200
-memory
@28
......@@ -360,8 +396,6 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_paral
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_parallel12_i.trigger_mode
@1401200
-debug_mmcm_clk
@200
-
@1000200
-sensor_channel0
@c00200
......@@ -736,8 +770,10 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[2].jp_channel_i.buf_pxd[7:0]
x393_dut.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.buf_pxd[7:0]
@1401200
-compressors_all
@800200
@c00201
-cmdseq_0
@28
x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.frame_sync
@c00022
x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.cmdseq_di[63:0]
@28
......@@ -928,7 +964,7 @@ x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.valid
x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.ackn
@1001200
-group_end
@1000200
@1401201
-cmdseq_0
@800200
-cmdseq_mux
......@@ -980,13 +1016,13 @@ x393_dut.x393_i.cmd_seq_mux_i.pri_one[3:0]
x393_dut.x393_i.cmd_seq_mux_i.chn_r[1:0]
@1000200
-cmdseq_mux
@800200
@c00200
-gpio
@28
x393_dut.x393_i.gpio393_i.set_mode_w
@22
x393_dut.x393_i.gpio393_i.cmd_data[31:0]
@c00023
@c00022
x393_dut.x393_i.gpio393_i.ds[9:0]
@28
(0)x393_dut.x393_i.gpio393_i.ds[9:0]
......@@ -999,7 +1035,7 @@ x393_dut.x393_i.gpio393_i.ds[9:0]
(7)x393_dut.x393_i.gpio393_i.ds[9:0]
(8)x393_dut.x393_i.gpio393_i.ds[9:0]
(9)x393_dut.x393_i.gpio393_i.ds[9:0]
@1401201
@1401200
-group_end
@22
x393_dut.x393_i.gpio393_i.ds_en_m[9:0]
......@@ -1076,7 +1112,7 @@ x393_dut.x393_i.gpio393_i.io_pins[9:0]
(9)x393_dut.x393_i.gpio393_i.io_pins[9:0]
@1001200
-group_end
@1000200
@1401200
-gpio
@200
-
......
fpga_version.vh
View file @ 2f80e662
......@@ -35,7 +35,8 @@
* contains all the components and scripts required to completely simulate it
* with at least one of the Free Software programs.
*/
parameter FPGA_VERSION = 32'h039300a5; // parallel, fixing command sequencer and ARO 80.21%, -0.068
parameter FPGA_VERSION = 32'h039300a6; // parallel, adding frame sync delays to mcntrl_linear 79.26, mclk and xclk violated
// parameter FPGA_VERSION = 32'h039300a5; // parallel, fixing command sequencer and ARO 80.21%, -0.068
// parameter FPGA_VERSION = 32'h039300a4; // parallel 79.66, -0.1
// parameter FPGA_VERSION = 32'h039300a3; // hispi, after minor interface changes (separated control bits)80.52% -0.163
// parameter FPGA_VERSION = 32'h039300a2; // hispi trying default placement 81.39% not met by -0.183
......
includes/x393_parameters.vh
View file @ 2f80e662
......@@ -268,8 +268,11 @@
// Start XY can be used when read command to start from the middle
// TODO: Add number of blocks to R/W? (blocks can be different) - total length?
// Read back current address (for debugging)?
parameter MCNTRL_TILED_TILE_WHS= 'h9, // low byte - 6-bit tile width in 8-bursts, second byte - tile height (0 - > 64),
// 3-rd byte - vertical step (to control tile vertical overlap)
parameter MCNTRL_SCANLINE_START_DELAY = 'ha, // Set start delay (to accommodate for the command sequencer
parameter MCNTRL_TILED_STATUS_REG_CHN2_ADDR= 'h5,
parameter MCNTRL_TILED_STATUS_REG_CHN4_ADDR= 'h7,
parameter MCNTRL_TILED_PENDING_CNTR_BITS=2, // Number of bits to count pending trasfers, currently 2 is enough, but may increase
......@@ -292,6 +295,8 @@
parameter MCONTR_LINTILE_REPEAT = 10, // read/write pages until disabled
parameter MCONTR_LINTILE_DIS_NEED = 11, // disable 'need' request
parameter MCONTR_LINTILE_SKIP_LATE = 12, // skip actual R/W operation when it is too late, advance pointers
parameter MCNTRL_SCANLINE_DLY_WIDTH = 7, // delay start pulse by 1..64 mclk
parameter MCNTRL_SCANLINE_DLY_DEFAULT = 63, // initial delay value for start pulse
// Channel test module parameters
parameter MCNTRL_TEST01_ADDR= 'h0f0,
......@@ -531,7 +536,7 @@
// Other parameters
parameter SENS_SYNC_FBITS = 16, // number of bits in a frame counter for linescan mode
parameter SENS_SYNC_LBITS = 16, // number of bits in a line counter for sof_late output (limited by eof)
parameter SENS_SYNC_LATE_DFLT = 15, // number of lines to delay late frame sync
parameter SENS_SYNC_LATE_DFLT = 4, // 15, // number of lines to delay late frame sync
parameter SENS_SYNC_MINBITS = 8, // number of bits to enforce minimal frame period
parameter SENS_SYNC_MINPER = 130, // minimal frame period (in pclk/mclk?)
......
memctrl/mcntrl393.v
View file @ 2f80e662
......@@ -206,6 +206,8 @@ module mcntrl393 #(
// Start XY can be used when read command to start from the middle
// TODO: Add number of blocks to R/W? (blocks can be different) - total length?
// Read back current address (for debugging)?
parameter MCNTRL_SCANLINE_START_DELAY = 'ha, // Set start delay (to accommodate for the command sequencer
// parameter MCNTRL_SCANLINE_STATUS_REG_ADDR= 'h4,
parameter MCNTRL_SCANLINE_STATUS_REG_CHN1_ADDR= 'h4,
parameter MCNTRL_SCANLINE_STATUS_REG_CHN3_ADDR= 'h6,
......@@ -235,6 +237,7 @@ module mcntrl393 #(
// Read back current address (for debugging)?
parameter MCNTRL_TILED_TILE_WHS= 'h9, // low byte - 6-bit tile width in 8-bursts, second byte - tile height (0 - > 64),
// 3-rd byte - vertical step (to control tile vertical overlap)
parameter MCNTRL_TILED_STATUS_REG_CHN2_ADDR= 'h5,
parameter MCNTRL_TILED_STATUS_REG_CHN4_ADDR= 'h7,
parameter MCNTRL_TILED_PENDING_CNTR_BITS=2, // Number of bits to count pending trasfers, currently 2 is enough, but may increase
......@@ -257,7 +260,9 @@ module mcntrl393 #(
parameter MCONTR_LINTILE_SINGLE = 9, // read/write a single page
parameter MCONTR_LINTILE_REPEAT = 10, // read/write pages until disabled
parameter MCONTR_LINTILE_DIS_NEED = 11, // disable 'need' request
parameter MCONTR_LINTILE_SKIP_LATE = 12 // skip actual R/W operation when it is too late, advance pointers
parameter MCONTR_LINTILE_SKIP_LATE = 12, // skip actual R/W operation when it is too late, advance pointers
parameter MCNTRL_SCANLINE_DLY_WIDTH = 7, // delay start pulse by 1..64 mclk
parameter MCNTRL_SCANLINE_DLY_DEFAULT = 63 // initial delay value for start pulse
) (
input rst_in,
......@@ -1093,6 +1098,7 @@ module mcntrl393 #(
.MCNTRL_SCANLINE_WINDOW_WH (MCNTRL_SCANLINE_WINDOW_WH),
.MCNTRL_SCANLINE_WINDOW_X0Y0 (MCNTRL_SCANLINE_WINDOW_X0Y0),
.MCNTRL_SCANLINE_WINDOW_STARTXY (MCNTRL_SCANLINE_WINDOW_STARTXY),
.MCNTRL_SCANLINE_START_DELAY (MCNTRL_SCANLINE_START_DELAY),
.MCNTRL_SCANLINE_STATUS_REG_ADDR (MCONTR_SENS_STATUS_BASE + MCONTR_SENS_STATUS_INC * i),
.MCNTRL_SCANLINE_PENDING_CNTR_BITS (MCNTRL_SCANLINE_PENDING_CNTR_BITS),
.MCNTRL_SCANLINE_FRAME_PAGE_RESET (MCNTRL_SCANLINE_FRAME_PAGE_RESET),
......@@ -1105,7 +1111,9 @@ module mcntrl393 #(
.MCONTR_LINTILE_SINGLE (MCONTR_LINTILE_SINGLE),
.MCONTR_LINTILE_REPEAT (MCONTR_LINTILE_REPEAT),
.MCONTR_LINTILE_DIS_NEED (MCONTR_LINTILE_DIS_NEED),
.MCONTR_LINTILE_SKIP_LATE (MCONTR_LINTILE_SKIP_LATE)
.MCONTR_LINTILE_SKIP_LATE (MCONTR_LINTILE_SKIP_LATE),
.MCNTRL_SCANLINE_DLY_WIDTH (MCNTRL_SCANLINE_DLY_WIDTH),
.MCNTRL_SCANLINE_DLY_DEFAULT (MCNTRL_SCANLINE_DLY_DEFAULT)
) mcntrl_linear_wr_sensor_i (
.mrst (mrst), // input
.mclk (mclk), // input
......@@ -1238,6 +1246,7 @@ module mcntrl393 #(
.MCNTRL_SCANLINE_WINDOW_WH (MCNTRL_SCANLINE_WINDOW_WH),
.MCNTRL_SCANLINE_WINDOW_X0Y0 (MCNTRL_SCANLINE_WINDOW_X0Y0),
.MCNTRL_SCANLINE_WINDOW_STARTXY (MCNTRL_SCANLINE_WINDOW_STARTXY),
.MCNTRL_SCANLINE_START_DELAY (MCNTRL_SCANLINE_START_DELAY),
.MCNTRL_SCANLINE_STATUS_REG_ADDR (MCNTRL_SCANLINE_STATUS_REG_CHN1_ADDR),
.MCNTRL_SCANLINE_PENDING_CNTR_BITS (MCNTRL_SCANLINE_PENDING_CNTR_BITS),
.MCNTRL_SCANLINE_FRAME_PAGE_RESET (MCNTRL_SCANLINE_FRAME_PAGE_RESET),
......@@ -1250,7 +1259,10 @@ module mcntrl393 #(
.MCONTR_LINTILE_SINGLE (MCONTR_LINTILE_SINGLE),
.MCONTR_LINTILE_REPEAT (MCONTR_LINTILE_REPEAT),
.MCONTR_LINTILE_DIS_NEED (MCONTR_LINTILE_DIS_NEED),
.MCONTR_LINTILE_SKIP_LATE (MCONTR_LINTILE_SKIP_LATE)
.MCONTR_LINTILE_SKIP_LATE (MCONTR_LINTILE_SKIP_LATE),
.MCNTRL_SCANLINE_DLY_WIDTH (MCNTRL_SCANLINE_DLY_WIDTH),
.MCNTRL_SCANLINE_DLY_DEFAULT (MCNTRL_SCANLINE_DLY_DEFAULT)
) mcntrl_linear_rw_chn1_i (
.mrst (mrst), // input
.mclk (mclk), // input
......@@ -1308,6 +1320,7 @@ module mcntrl393 #(
.MCNTRL_SCANLINE_WINDOW_WH (MCNTRL_SCANLINE_WINDOW_WH),
.MCNTRL_SCANLINE_WINDOW_X0Y0 (MCNTRL_SCANLINE_WINDOW_X0Y0),
.MCNTRL_SCANLINE_WINDOW_STARTXY (MCNTRL_SCANLINE_WINDOW_STARTXY),
.MCNTRL_SCANLINE_START_DELAY (MCNTRL_SCANLINE_START_DELAY),
.MCNTRL_SCANLINE_STATUS_REG_ADDR (MCNTRL_SCANLINE_STATUS_REG_CHN3_ADDR),
.MCNTRL_SCANLINE_PENDING_CNTR_BITS (MCNTRL_SCANLINE_PENDING_CNTR_BITS),
.MCNTRL_SCANLINE_FRAME_PAGE_RESET (MCNTRL_SCANLINE_FRAME_PAGE_RESET),
......@@ -1320,7 +1333,9 @@ module mcntrl393 #(
.MCONTR_LINTILE_SINGLE (MCONTR_LINTILE_SINGLE),
.MCONTR_LINTILE_REPEAT (MCONTR_LINTILE_REPEAT),
.MCONTR_LINTILE_DIS_NEED (MCONTR_LINTILE_DIS_NEED),
.MCONTR_LINTILE_SKIP_LATE (MCONTR_LINTILE_SKIP_LATE)
.MCONTR_LINTILE_SKIP_LATE (MCONTR_LINTILE_SKIP_LATE),
.MCNTRL_SCANLINE_DLY_WIDTH (MCNTRL_SCANLINE_DLY_WIDTH),
.MCNTRL_SCANLINE_DLY_DEFAULT (MCNTRL_SCANLINE_DLY_DEFAULT)
) mcntrl_linear_rw_chn3_i (
.mrst (mrst), // input
.mclk (mclk), // input
......
memctrl/mcntrl_linear_rw.v
View file @ 2f80e662
......@@ -60,6 +60,7 @@ module mcntrl_linear_rw #(
// Start XY can be used when read command to start from the middle
// TODO: Add number of blocks to R/W? (blocks can be different) - total length?
// Read back current address (for debugging)?
parameter MCNTRL_SCANLINE_START_DELAY = 'ha, // Set start delay (to accommodate for the command sequencer
parameter MCNTRL_SCANLINE_STATUS_REG_ADDR= 'h4,
parameter MCNTRL_SCANLINE_PENDING_CNTR_BITS=2, // Number of bits to count pending trasfers, currently 2 is enough, but may increase
// if memory controller will allow programming several sequences in advance to
......@@ -76,7 +77,13 @@ module mcntrl_linear_rw #(
parameter MCONTR_LINTILE_SINGLE = 9, // read/write a single page
parameter MCONTR_LINTILE_REPEAT = 10, // read/write pages until disabled
parameter MCONTR_LINTILE_DIS_NEED = 11, // disable 'need' request
parameter MCONTR_LINTILE_SKIP_LATE = 12 // skip actual R/W operation when it is too late, advance pointers
parameter MCONTR_LINTILE_SKIP_LATE = 12, // skip actual R/W operation when it is too late, advance pointers
// TODO NC393: This delay may be too long for serail sensors. Make them always start to fill the
// first buffer page, waiting for the request from mcntrl_linear during that first page. And if it will arrive -
// just continue.
parameter MCNTRL_SCANLINE_DLY_WIDTH = 7, // delay start pulse by 1..64 mclk
parameter MCNTRL_SCANLINE_DLY_DEFAULT = 63 // initial delay value for start pulse
)(
input mrst,
input mclk,
......@@ -89,7 +96,7 @@ module mcntrl_linear_rw #(
input status_start, // acknowledge of address (first byte) from downsteram
input frame_start, // resets page, x,y, and initiates transfer requests (in write mode will wait for next_page)
output frame_run, // @mclk - enable pixels from sesnor to memory buffer
output frame_run, // @mclk - enable pixels from sensor to memory buffer
input next_page, // page was read/written from/to 4*1kB on-chip buffer
// output page_ready, // == xfer_done, connect externally | Single-cycle pulse indicating that a page was read/written from/to DDR3 memory
output frame_done, // single-cycle pulse when the full frame (window) was transferred to/from DDR3 memory
......@@ -168,7 +175,7 @@ module mcntrl_linear_rw #(
reg [PAR_MOD_LATENCY-1:0] recalc_r; // 1-hot CE for re-calculating registers
// SuppressWarnings VEditor unused
wire calc_valid; // calculated registers have valid values
wire chn_en; // enable requests by channel (continue ones in progress), enable frame_start inputs
wire chn_en; // enable requests by channel (continue ones in progress), enable frame_start_late inputs
wire chn_rst; // resets command, including fifo;
reg chn_rst_d; // delayed by 1 cycle do detect turning off
// reg xfer_reset_page_r;
......@@ -245,9 +252,14 @@ module mcntrl_linear_rw #(
reg [FRAME_HEIGHT_BITS:0] window_height; // (programmed) 0- max
reg [FRAME_WIDTH_BITS-1:0] window_x0; // (programmed) window left
reg [FRAME_HEIGHT_BITS-1:0] window_y0; // (programmed) window top
reg [FRAME_WIDTH_BITS-1:0] start_x; // (programmed) normally 0, copied to curr_x on frame_start
reg [FRAME_HEIGHT_BITS-1:0] start_y; // (programmed) normally 0, copied to curr_y on frame_start
reg [FRAME_WIDTH_BITS-1:0] start_x; // (programmed) normally 0, copied to curr_x on frame_start_late
reg [FRAME_HEIGHT_BITS-1:0] start_y; // (programmed) normally 0, copied to curr_y on frame_start_late
reg xfer_done_d; // xfer_done delayed by 1 cycle (also includes xfer_skipped)
reg [MCNTRL_SCANLINE_DLY_WIDTH-1:0] start_delay; // how much to delay frame start
wire frame_start_late;
wire set_start_delay_w;
assign frame_number = frame_number_current;
assign set_mode_w = cmd_we && (cmd_a== MCNTRL_SCANLINE_MODE);
......@@ -259,6 +271,7 @@ module mcntrl_linear_rw #(
assign set_window_wh_w = cmd_we && (cmd_a== MCNTRL_SCANLINE_WINDOW_WH);
assign set_window_x0y0_w = cmd_we && (cmd_a== MCNTRL_SCANLINE_WINDOW_X0Y0);
assign set_window_start_w = cmd_we && (cmd_a== MCNTRL_SCANLINE_WINDOW_STARTXY);
assign set_start_delay_w = cmd_we && (cmd_a== MCNTRL_SCANLINE_START_DELAY);
assign single_frame_w = cmd_we && (cmd_a== MCNTRL_SCANLINE_MODE) && cmd_data[MCONTR_LINTILE_SINGLE];
assign rst_frame_num_w = cmd_we && (cmd_a== MCNTRL_SCANLINE_MODE) && cmd_data[MCONTR_LINTILE_RST_FRAME];
......@@ -297,11 +310,11 @@ module mcntrl_linear_rw #(
else is_last_frame <= frame_number_cntr == last_frame_number;
// if (mrst) frame_start_r <= 0;
// else frame_start_r <= {frame_start_r[3:0], frame_start & frame_en};
// else frame_start_r <= {frame_start_r[3:0], frame_start_late & frame_en};
if (mrst) frame_en <= 0;
else if (single_frame_r || repeat_frames) frame_en <= 1;
else if (frame_start) frame_en <= 0;
else if (frame_start_late) frame_en <= 0;
if (mrst) frame_number_cntr <= 0;
else if (rst_frame_num_r[0]) frame_number_cntr <= 0;
......@@ -339,8 +352,12 @@ module mcntrl_linear_rw #(
start_y <= 0;
end else if (set_window_start_w) begin
start_x <= cmd_data[FRAME_WIDTH_BITS-1:0];
start_y <=cmd_data[FRAME_HEIGHT_BITS+15:16];
start_y <= cmd_data[FRAME_HEIGHT_BITS+15:16];
end
if (mrst) start_delay <= MCNTRL_SCANLINE_DLY_DEFAULT;
else if (set_start_delay_w) start_delay <= cmd_data[MCNTRL_SCANLINE_DLY_WIDTH-1:0];
end
assign mul_rslt_w= frame_y8_r * frame_full_width_r; // 5 MSBs will be discarded
assign xfer_num128= xfer_num128_r[NUM_XFER_BITS-1:0];
......@@ -393,12 +410,12 @@ module mcntrl_linear_rw #(
reg start_skip_r;
reg skip_run = 0; // run "skip" - advance addresses, but no actual read/write
reg xfer_reject_r;
reg frame_start_pending; // frame_start came before previous one was finished
reg frame_start_pending; // frame_start_late came before previous one was finished
reg [1:0] frame_start_pending_long;
wire xfer_done_skipped = xfer_skipped || xfer_done;
wire frame_start_delayed = frame_start_pending_long[1] && !frame_start_pending_long[0];
wire frame_start_mod = (frame_start && !busy_r) || frame_start_delayed; // when frame_start_delayed it will completely miss a frame_start
wire frame_start_mod = (frame_start_late && !busy_r) || frame_start_delayed; // when frame_start_delayed it will completely miss a frame_start_late
assign xfer_reject = xfer_reject_r;
assign start_skip_w = skip_too_late && want_r && !xfer_grant && !skip_run &&
(((|page_cntr) && frame_start_pending) || ((page_cntr >= 4) && (cmd_wrmem || page_cntr[0]))); //&& busy_r && skip_run;
......@@ -427,14 +444,14 @@ module mcntrl_linear_rw #(
// if (mrst || frame_start_delayed) frame_start_pending <= 0;
if (mrst) frame_start_pending <= 0;
// else frame_start_pending <= {frame_start_pending[0], busy_r && (frame_start_pending[0] | frame_start)};
else frame_start_pending <= busy_r && (frame_start_pending | frame_start);
// else frame_start_pending <= {frame_start_pending[0], busy_r && (frame_start_pending[0] | frame_start_late)};
else frame_start_pending <= busy_r && (frame_start_pending | frame_start_late);
if (mrst) frame_start_pending_long <= 0;
else frame_start_pending_long <= {frame_start_pending_long[0], (busy_r || skip_run) && (frame_start_pending_long[0] | frame_start)};
else frame_start_pending_long <= {frame_start_pending_long[0], (busy_r || skip_run) && (frame_start_pending_long[0] | frame_start_late)};
if (mrst) frame_start_r <= 0;
// else frame_start_r <= {frame_start_r[3:0], frame_start & frame_en};
// else frame_start_r <= {frame_start_r[3:0], frame_start_late & frame_en};
else frame_start_r <= {frame_start_r[3:0], frame_start_mod & frame_en};
if (mrst || disable_need) need_r <= 0;
......@@ -587,7 +604,7 @@ wire start_not_partial= xfer_start_r[0] && !xfer_limited_by_mem_page_r;
if (recalc_r[0]) line_unfinished_relw_r <= curr_y + (cmd_wrmem ? 0: 1);
// if (mrst || (frame_start || !chn_en)) line_unfinished_r <= {FRAME_HEIGHT_BITS{~cmd_wrmem}}; // lowest/highest value until valid
// if (mrst || (frame_start_late || !chn_en)) line_unfinished_r <= {FRAME_HEIGHT_BITS{~cmd_wrmem}}; // lowest/highest value until valid
if (mrst || (frame_start_mod || !chn_en)) line_unfinished_r <= {FRAME_HEIGHT_BITS{~cmd_wrmem}}; // lowest/highest value until valid
else if (recalc_r[2]) line_unfinished_r <= line_unfinished_relw_r + window_y0;
......@@ -670,5 +687,17 @@ wire start_not_partial= xfer_start_r[0] && !xfer_limited_by_mem_page_r;
.rq (status_rq), // output
.start (status_start) // input
);
dly_var #(
.WIDTH (1),
.DLY_WIDTH (MCNTRL_SCANLINE_DLY_WIDTH)
) frame_start_late_i (
.clk (mclk), // input
.rst (mrst), // input
.dly (start_delay), // input[0:0]
.din (frame_start), // input[0:0]
.dout (frame_start_late) // output[0:0]
);
endmodule
py393/x393_cmprs.py
View file @ 2f80e662
......@@ -346,6 +346,75 @@ class X393Cmprs(object):
address=(vrlg.CMPRS_HIFREQ_REG_BASE + num_sensor * vrlg.CMPRS_STATUS_REG_INC))
def control_compressor_memory(self,
num_sensor,
command,
reset_frame = False,
verbose = 1):
"""
Control memory access (write) of a sensor channel
@param num_sensor - memory sensor channel (or all)
@param command - one of (case insensitive):
reset - reset channel, channel pointers immediately,
stop - stop at the end of the frame (if repetitive),
single - acquire single frame ,
repetitive - repetitive mode
@param reset_frame - reset frame number
@param vebose - verbose level
"""
try:
if (num_sensor == all) or (num_sensor[0].upper() == "A"): #all is a built-in function
for num_sensor in range(4):
print ('num_sensor = ',num_sensor)
self.control_compressor_memory(num_sensor = num_sensor,
command = command,
reset_frame = reset_frame,
verbose = verbose)
return
except:
pass
rpt = False
sngl = False
en = False
rst = False
byte32 = True
if command[:3].upper() == 'RES':
rst = True
elif command[:2].upper() == 'ST':
pass
elif command[:2].upper() == 'SI':
sngl = True
en = True
elif command[:3].upper() == 'REP':
rpt = True
en = True
else:
print ("Unrecognized command %s. Valid commands are RESET, STOP, SINGLE, REPETITIVE"%(command))
return
base_addr = vrlg.MCONTR_CMPRS_BASE + vrlg.MCONTR_CMPRS_INC * num_sensor;
mode= x393_mcntrl.func_encode_mode_scan_tiled(
skip_too_late = True,
disable_need = False,
repetitive= rpt,
single = sngl,
reset_frame = reset_frame,
byte32 = byte32,
keep_open = False,
extra_pages = 0,
write_mem = False,
enable = en,
chn_reset = rst)
self.x393_axi_tasks.write_control_register(base_addr + vrlg.MCNTRL_TILED_MODE, mode)
if verbose > 0 :
print ("write_control_register(0x%08x, 0x%08x)"%(base_addr + vrlg.MCNTRL_TILED_MODE, mode))
def setup_compressor_memory (self,
num_sensor,
frame_sa,
......
py393/x393_cmprs_afi.py
View file @ 2f80e662
......@@ -396,6 +396,7 @@ inline struct interframe_params_t* updateIRQ_interframe(void) {
afi_cmprs2_len,
afi_cmprs3_sa,
afi_cmprs3_len,
reset = False,
verbose = 1):
"""
......@@ -416,6 +417,7 @@ inline struct interframe_params_t* updateIRQ_interframe(void) {
@param afi_cmprs2_len - input channel 0 buffer length in 32-byte chunks
@param afi_cmprs3_sa - input channel 0 start address in 32-byte chunks
@param afi_cmprs3_len - input channel 0 buffer length in 32-byte chunks
@param reset - reset all channles
@param verbose - verbose level
"""
if verbose >0 :
......@@ -438,7 +440,7 @@ inline struct interframe_params_t* updateIRQ_interframe(void) {
chn_afi = i,
mode =status_mode,
seq_num = 0)
if reset:
# reset all channels
self.afi_mux_reset( port_afi = port_afi,
rst_chn = 0xf) # reset all channels
......
py393/x393_jpeg.py
View file @ 2f80e662
......@@ -1050,15 +1050,27 @@ setup_all_sensors True None 0x4
################## Parallel ##################
cd /usr/local/verilog/; test_mcntrl.py @tpargs -x
reset_channels 15
cd /usr/local/verilog/; test_mcntrl.py @hargs
bitstream_set_path /usr/local/verilog/x393_parallel.bit
#fpga_shutdown
#setupSensorsPower "PAR12"
setupSensorsPower "PAR12" all 0 0.0
measure_all "*DI"
setup_all_sensors True None 0xf
setSensorClock 24.0 "2V5_LVDS"
specify_phys_memory
specify_window
set_rtc # maybe not needed as it can be set differently
camsync_setup 0xf # sensor mask - use local timestamps)
#setup_all_sensors True None 0xf
#setup_all_sensors <setup_membridge=False> <exit_step=None> <sensor_mask=1> <gamma_load=False> <window_width=None> <window_height=None> <window_left=None> <window_top=None> <compressor_left_margin=0> <last_buf_frame=1> <colorsat_blue=288> <colorsat_red=364> <clk_sel=1> <histogram_left=None> <histogram_top=None> <histogram_width_m1=None> <histogram_height_m1=None> <circbuf_chn_size=67108864> <reset_afi=False> <verbose=1>
setup_all_sensors True None 0xf False None None None None 0 1 288 364 1 None None None None 67108864 True 2
set_sensor_io_ctl all None None 1 # Set ARO low - check if it is still needed?
#set quadrants
set_sensor_io_ctl 0 None None None None None 0 0xe
......@@ -1073,8 +1085,8 @@ compressor_control all None None None None None 3
#longer line (default 0xa1f)
write_sensor_i2c all 1 0 0x90040a23
#increase scanline write (memory controller) width in 16-bursts (was 0xa2)
axi_write_single_w 0x696 0x079800a3
axi_write_single_w 0x686 0x079800a3
axi_write_single_w 0x696 0x079800a3
axi_write_single_w 0x6a6 0x079800a3
axi_write_single_w 0x6b6 0x079800a3
......@@ -1099,10 +1111,11 @@ write_sensor_i2c all 1 0 0x90090797
#run compressors once (#1 - stop gracefully, 0 - reset, 2 - single, 3 - repetitive with sync to sensors)
set_qtables all 0 80
compressor_control all 3
#jpeg_write "img.jpeg" 0
jpeg_write "img.jpeg" All
#jpeg_write "img.jpeg" 0 80
jpeg_write "img.jpeg" All 80
#changing quality (example 85%):
set_qtables all 0 85
......@@ -1111,6 +1124,114 @@ compressor_control all 2
jpeg_write "img.jpeg" 0 85
#To reset all (before reprogramming): This one works, reset_channels - does not
compressor_control all 1
compressor_control all 0
set_sensor_io_ctl all 1 # MRST on all sensors
control_sensor_memory all stop
control_compressor_memory all stop
sleep_ms 200
control_sensor_memory all reset True
control_compressor_memory all reset True
#To reset all (before reprogramming):
#enable all interrupts
write_control_register 0x605 3
write_control_register 0x615 3
write_control_register 0x625 3
write_control_register 0x635 3
write_control_register 0x79f 3
write_control_register 0x7bf 3
write_control_register 0x7df 3
write_control_register 0x7ff 3
#disable all interrupts
write_control_register 0x605 2
write_control_register 0x615 2
write_control_register 0x625 2
write_control_register 0x635 2
write_control_register 0x79f 2
write_control_register 0x7bf 2
write_control_register 0x7df 2
write_control_register 0x7ff 2
#Restart 0
compressor_control 0 1
compressor_control 0 0
control_sensor_memory 0 stop
control_compressor_memory 0 stop
sleep_ms 200
control_sensor_memory 0 repetitive
control_compressor_memory 0 repetitive
compressor_control 0 3
compressor_control 0 None None None None None 0
specify_phys_memory
specify_window
#Reset 0 but sensor all
compressor_control 0 1
control_sensor_memory 0 stop
control_compressor_memory 0 stop
sleep_ms 200
control_sensor_memory 0 reset True
control_compressor_memory 0 reset True
########### Trying to make i2c work in driver #########
Other required actions:
/www/pages/exif.php init=/etc/Exif_template.xml
imgsrv -p 2323
#restart PHP - it can get errors while opening/mmaping at startupo, then some functions fail
killall lighttpd; /usr/sbin/lighttpd -f /etc/lighttpd.conf
setSensorClock 24.0 "2V5_LVDS"
set_rtc # maybe not needed as it can be set differently
camsync_setup 0xf # sensor mask - use local timestamps)
#set_sensor_io_ctl <num_sensor> <mrst=None> <arst=None> <aro=None> <mmcm_rst=None> <clk_sel=None> <set_delays=False> <quadrants=None>
set_sensor_io_ctl 0 True True False True 1 False
sleep_ms 10
set_sensor_io_ctl 0 False False False False 1 False
set_sensor_io_ctl 0 None None True False 1 False
#or
setup_sensor_channel None 0
setup_compressor 0 0
read_control_register 0x403 # sequencer 0 status mode
write_control_register 0x403 0xc0
read_status 0x20 # 0x5f030000
#echo "1" >i2c_frame0
read_status 0x20 # 0x7f000000
compressor_control 0 1
sleep_ms 100
control_compressor_memory 0 stop
control_sensor_memory 0 stop
sleep_ms 100
control_sensor_memory 0 repetitive
sleep_ms 100
control_compressor_memory 0 repetitive
sleep_ms 100
compressor_control 0 3
"blocked" image - reset+restart worked
#after python (change there too):
axi_write_single_w 0x686 0x079800a3 # this
write_control_register 0x686 0x79400a3 # or this?
write_control_register 0x602 0x40f00a1
write_control_register 0x6c7 0x10000
compressor_control all None None None None None 0
tar -C / -xzpf /usr.tar.gz;
/usr/sbin/lighttpd -f /etc/lighttpd.conf
################## Simulate Serial ####################
./py393/test_mcntrl.py @py393/cocoargs --simulated=localhost:7777
measure_all "*DI"
......
py393/x393_sens_cmprs.py
View file @ 2f80e662
......@@ -484,11 +484,25 @@ class X393SensCmprs(object):
num_pages_in_line += 1
# frame_full_width - 13-bit Padded line length (8-row increment), in 8-bursts (16 bytes)
# frame_start_address_inc - 22-bit frame start address increment ((3 CA LSBs==0. BA==0)
## frame_full_width = num_pages_in_line * align_to_bursts
"""
Changing frame full width and size to fixed values (normally read from sysfs)
frame_full_width = num_pages_in_line * align_to_bursts
"""
frame_full_width = 0x200 # Made it fixed width
num8rows= (window_top + window_height) // 8
if (window_top + window_height) % 8:
num8rows += 1
"""
frame_start_address_inc = num8rows * frame_full_width
"""
frame_start_address_inc = 0x80000 #Fixed size
""" TODO: Calculate tiles and move to initial print """
num_macro_cols_m1 = (window_width >> 4) - 1
num_macro_rows_m1 = (window_height >> 4) - 1
......@@ -1104,11 +1118,20 @@ class X393SensCmprs(object):
num_pages_in_line = num_burst_in_line // align_to_bursts;
if num_burst_in_line % align_to_bursts:
num_pages_in_line += 1
"""
Changing frame full width and size to fixed values (normally read from sysfs)
frame_full_width = num_pages_in_line * align_to_bursts
"""
frame_full_width = 0x200 # Made it fixed width
num8rows= (window_top + window_height) // 8
if (window_top + window_height) % 8:
num8rows += 1
"""
frame_start_address_inc = num8rows * frame_full_width
"""
frame_start_address_inc = 0x80000 #Fixed size
num_macro_cols_m1 = (window_width >> 4) - 1
num_macro_rows_m1 = (window_height >> 4) - 1
......@@ -1181,6 +1204,54 @@ class X393SensCmprs(object):
tile_height = tile_height,
extra_pages = extra_pages,
disable_need = 1)
def reset_channels(self,
sensor_mask = 0x1,
reset_mask = 0xf):
"""
Reset channels before re-programming
@param sensor_mask - bitmap of the selected channels (1 - only channel 0, 0xf - all channels)
@param reset_mask - +1 - reset sensor(s) (MRST and internal),
+2 - reset compressor(s)
+4 - reset sensor-to-memory modules
+8 - reset memory-to-compressor modules
"""
MASK_SENSOR = 1
MASK_COMPRESSOR = 2
MASK_MEMSENSOR = 4
MASK_MEMCOMPRESSOR = 8
for chn in range (4):
if sensor_mask & (1 << chn):
if reset_mask & MASK_COMPRESSOR:
self.x393Cmprs.compressor_control (chn = chn,
run_mode = 1) # stop after frame done
if reset_mask & MASK_MEMSENSOR:
self.x393Sensor.control_sensor_memory (num_sensor = chn,
command = 'stop')
if reset_mask & MASK_MEMCOMPRESSOR:
self.x393Cmprs.control_compressor_memory (num_sensor = chn,
command = 'stop')
self.sleep_ms(200)
for chn in range (4):
if sensor_mask & (1 << chn):
if reset_mask & MASK_COMPRESSOR:
self.x393Cmprs.compressor_control (chn = chn,
run_mode = 0) # reset, 'kill -9'
if reset_mask & MASK_MEMSENSOR:
self.x393Sensor.control_sensor_memory (num_sensor = chn,
command = 'reset')
if reset_mask & MASK_MEMCOMPRESSOR:
self.x393Cmprs.control_compressor_memory (num_sensor = chn,
command = 'reset')
if reset_mask & MASK_SENSOR:
self.x393Sensor.set_sensor_io_ctl (num_sensor = chn,
mrst = True)
def setup_all_sensors (self,
setup_membridge = False,
......@@ -1201,6 +1272,7 @@ class X393SensCmprs(object):
histogram_width_m1 = None, # 2559, #0,
histogram_height_m1 = None, # 799, #0,
circbuf_chn_size= 0x4000000, # 64 Mib - all 4 channels?
reset_afi = False, # reset AFI multiplexer
verbose = 1):
"""
Setup one sensor+compressor channel (for one sub-channel only)
......@@ -1236,6 +1308,8 @@ class X393SensCmprs(object):
@param histogram_top - histogram window top margin
@param histogram_width_m1 - one less than window width. If 0 - use frame right margin (end of HACT)
@param histogram_height_m1 - one less than window height. If 0 - use frame bottom margin (end of VACT)
@param reset_afi Reset AFI multiplexer when initializing
@param circbuf_chn_size - circular buffer size for each channel, in bytes
@param verbose - verbose level
@return True if all done, False if exited prematurely by exit_step
......@@ -1404,7 +1478,8 @@ class X393SensCmprs(object):
afi_cmprs2_sa = afi_cmprs2_sa,
afi_cmprs2_len = afi_cmprs2_len,
afi_cmprs3_sa = afi_cmprs3_sa,
afi_cmprs3_len = afi_cmprs3_len)
afi_cmprs3_len = afi_cmprs3_len,
reset = reset_afi)
for num_sensor in range(4):
if sensor_mask & (1 << num_sensor):
......@@ -1683,11 +1758,21 @@ class X393SensCmprs(object):
num_pages_in_line = num_burst_in_line // align_to_bursts;
if num_burst_in_line % align_to_bursts:
num_pages_in_line += 1
"""
Changing frame full width and size to fixed values (normally read from sysfs)
frame_full_width = num_pages_in_line * align_to_bursts
"""
frame_full_width = 0x200 # Made it fixed width
num8rows= (window_top + window_height) // 8
if (window_top + window_height) % 8:
num8rows += 1
"""
frame_start_address_inc = num8rows * frame_full_width
"""
frame_start_address_inc = 0x80000 #Fixed size
frame_start_address = (last_buf_frame + 1) * frame_start_address_inc * num_sensor
if verbose >0 :
......@@ -1714,7 +1799,13 @@ class X393SensCmprs(object):
num_pages_in_line = num_burst_in_line // align_to_bursts;
if num_burst_in_line % align_to_bursts:
num_pages_in_line += 1
"""
Changing frame full width and size to fixed values (normally read from sysfs)
frame_full_width = num_pages_in_line * align_to_bursts
"""
frame_full_width = 0x200 # Made it fixed width
num8rows= (window_top + window_height) // 8
if (window_top + window_height) % 8:
num8rows += 1
......
sensor/sens_sync.v
View file @ 2f80e662
......@@ -46,7 +46,7 @@ module sens_sync#(
parameter SENS_SYNC_LATE = 'h3, // number of lines to delay late frame sync
parameter SENS_SYNC_FBITS = 16, // number of bits in a frame counter for linescan mode
parameter SENS_SYNC_LBITS = 16, // number of bits in a line counter for sof_late output (limited by eof)
parameter SENS_SYNC_LATE_DFLT = 15, // number of lines to delay late frame sync
parameter SENS_SYNC_LATE_DFLT = 4, // 15, // number of lines to delay late frame sync
parameter SENS_SYNC_MINBITS = 8, // number of bits to enforce minimal frame period
parameter SENS_SYNC_MINPER = 130 // minimal frame period (in pclk/mclk?)
......@@ -122,7 +122,8 @@ module sens_sync#(
if (!en || (sof_in && zero_frames_left)) sub_frames_left <= sub_frames_pclk ;
else if (sof_in) sub_frames_left <= sub_frames_left - 1;
if (!en) hact_r <= hact;
// if (!en) hact_r <= hact;
hact_r <= hact || !en;
if (!en) sof_dly <= 0;
else if (pre_sof_out) sof_dly <= 1;
......
sensor/sensor_channel.v
View file @ 2f80e662
......@@ -55,7 +55,7 @@ module sensor_channel#(
parameter SENS_SYNC_LATE = 'h3, // number of lines to delay late frame sync
parameter SENS_SYNC_FBITS = 16, // number of bits in a frame counter for linescan mode
parameter SENS_SYNC_LBITS = 16, // number of bits in a line counter for sof_late output (limited by eof)
parameter SENS_SYNC_LATE_DFLT = 15, // number of lines to delay late frame sync
parameter SENS_SYNC_LATE_DFLT = 4, // 15, // number of lines to delay late frame sync
parameter SENS_SYNC_MINBITS = 8, // number of bits to enforce minimal frame period
parameter SENS_SYNC_MINPER = 130, // minimal frame period (in pclk/mclk?)
......@@ -950,6 +950,10 @@ module sensor_channel#(
.status_start (sens_phys_status_start) // input
);
// TODO NC393: This delay may be too long for serail sensors. Make them always start to fill the
// first buffer page, waiting for the request from mcntrl_linear during that first page. And if it will arrive -
// just continue.
sensor_fifo #(
.SENSOR_DATA_WIDTH (SENSOR_DATA_WIDTH),
.SENSOR_FIFO_2DEPTH (SENSOR_FIFO_2DEPTH),
......
sensor/sensors393.v
View file @ 2f80e662
......@@ -230,7 +230,7 @@ module sensors393 #(
// Other parameters
parameter SENS_SYNC_FBITS = 16, // number of bits in a frame counter for linescan mode
parameter SENS_SYNC_LBITS = 16, // number of bits in a line counter for sof_late output (limited by eof)
parameter SENS_SYNC_LATE_DFLT = 15, // number of lines to delay late frame sync
parameter SENS_SYNC_LATE_DFLT = 4, // 15, // number of lines to delay late frame sync
parameter SENS_SYNC_MINBITS = 8, // number of bits to enforce minimal frame period
parameter SENS_SYNC_MINPER = 130, // minimal frame period (in pclk/mclk?)
......
x393.v
View file @ 2f80e662
......@@ -1231,7 +1231,6 @@ assign axi_grst = axi_rst_pre;
.SS_MOD_PERIOD (SS_MOD_PERIOD),
.CMD_PAUSE_BITS (CMD_PAUSE_BITS),
.CMD_DONE_BIT (CMD_DONE_BIT),
.MCNTRL_PS_ADDR (MCNTRL_PS_ADDR),
.MCNTRL_PS_MASK (MCNTRL_PS_MASK),
.MCNTRL_PS_STATUS_REG_ADDR (MCNTRL_PS_STATUS_REG_ADDR),
......@@ -1254,6 +1253,7 @@ assign axi_grst = axi_rst_pre;
.MCNTRL_SCANLINE_WINDOW_WH (MCNTRL_SCANLINE_WINDOW_WH),
.MCNTRL_SCANLINE_WINDOW_X0Y0 (MCNTRL_SCANLINE_WINDOW_X0Y0),
.MCNTRL_SCANLINE_WINDOW_STARTXY (MCNTRL_SCANLINE_WINDOW_STARTXY),
.MCNTRL_SCANLINE_START_DELAY (MCNTRL_SCANLINE_START_DELAY),
.MCNTRL_SCANLINE_STATUS_REG_CHN1_ADDR (MCNTRL_SCANLINE_STATUS_REG_CHN1_ADDR),
.MCNTRL_SCANLINE_STATUS_REG_CHN3_ADDR (MCNTRL_SCANLINE_STATUS_REG_CHN3_ADDR),
.MCNTRL_SCANLINE_PENDING_CNTR_BITS (MCNTRL_SCANLINE_PENDING_CNTR_BITS),
......@@ -1289,6 +1289,8 @@ assign axi_grst = axi_rst_pre;
.MCONTR_LINTILE_REPEAT (MCONTR_LINTILE_REPEAT),
.MCONTR_LINTILE_DIS_NEED (MCONTR_LINTILE_DIS_NEED),
.MCONTR_LINTILE_SKIP_LATE (MCONTR_LINTILE_SKIP_LATE),
.MCNTRL_SCANLINE_DLY_WIDTH (MCNTRL_SCANLINE_DLY_WIDTH),
.MCNTRL_SCANLINE_DLY_DEFAULT (MCNTRL_SCANLINE_DLY_DEFAULT),
.BUFFER_DEPTH32 (BUFFER_DEPTH32),
.RSEL (RSEL),
.WSEL (WSEL)
......
x393_parallel.bit
View file @ 2f80e662
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