Commit 2d6f9609 authored by Andrey Filippov's avatar Andrey Filippov

Added link to the blog post

parent 09784ed7
......@@ -6,3 +6,5 @@ ddr3 subproject for Elphel 393 camera
This subproject is started to create a DDR3 memory controller for Elphel camera that does not depend on any non-documented
features of Xilinx Zynq and can be simulated by Free Software tools (Icarus Verilog + GTKWave) without use of any encrypted
modules. Everything in plain Verilog and constraints.
Detailed description of the project is available in the blog post:
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