Commit a1fdf168 authored by Andrey Filippov's avatar Andrey Filippov

removed unisim_retarget_comp.v from copying, fixed spelling

parent 2a759855
......@@ -49,7 +49,7 @@
icon="my_tool.gif"
call="VivadoTest"/>
<menuitem name="VivadoSynthesis"
label="Synthesise design"
label="Synthesize design"
icon="xilinx.png"
call="VivadoSynthesis"/>
<menuitem name="VivadoOptPlace"
......
......@@ -97,7 +97,7 @@
readonly="false" />
<parameter id="SimulationTopModule" label="Simulation top module" tooltip="Project top simulation module"
type="String" default="" format="CopyValue" readonly="false" />
<parameter id="ImplementationTopFile" label="Implementation top module" tooltip="Project file with top implementation module"
<parameter id="ImplementationTopFile" label="Implementation top file" tooltip="Project file with top implementation module"
type="Filename" default="" format="CopyValue" readonly="false" />
<parameter id="SimulDir" label="Simulation directory" tooltip="Project simulation directory"
type="Pathname" default="simulation" format="CopyValue" readonly="false" />
......
......@@ -49,7 +49,7 @@
</typedef>
</interface>
<tool name="VivadoSynthesis" label="Load Source files to Vivado and Synthesise"
<tool name="VivadoSynthesis" label="Load Source files to Vivado and Synthesize"
project="FPGA_project"
interface="VivadoSynthesisInterface"
package="FPGA_package"
......@@ -62,7 +62,7 @@
</extensions-list>
<action-menu>
<action label="Synthesise with Vivado:" resource="%ImplementationTopFile"
<action label="Synthesize with Vivado:" resource="%ImplementationTopFile"
check-extension="false" check-existence="true" icon="xilinx.png" />
<action label="Check by Vivado Synthesis:" resource="%%SelectedFile"
check-extension="true" check-existence="true" icon="sample.gif" />
......
......@@ -22,9 +22,9 @@
"rsync -avr -e ssh"
"%RemoteUser@%RemoteHost:%VivadoUnisimsAbsolutePath/unisims"
"./;"
"rsync -avr -e ssh"
<!-- "rsync -avr -e ssh"
"%RemoteUser@%RemoteHost:%VivadoUnisimsAbsolutePath/unisim_retarget_comp.v"
"unisims ;"
"unisims ;" -->
</line>
</output>
</tool>
......
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