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Elphel
vdt-plugin
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6a2fdc57
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6a2fdc57
authored
May 15, 2016
by
Andrey Filippov
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Update README.md
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6a2fdc57
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@@ -262,7 +262,7 @@ In x393_sata project this command will be
After new files are added the project needs to be refreshed - you may click on the project name in the navigator window
and press F5 key or right-click -> Refresh
## Simulating
eddr
3 project with Icarus Verilog
## Simulating
x39
3 project with Icarus Verilog
```
Design Menu -> Verilog Development tools -> Icarus Verilog simulator
```
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