Commit 296d54dd authored by Andrey Filippov's avatar Andrey Filippov

added more kernel files for debugging

parent 0adf97eb
This diff is collapsed.
......@@ -34,7 +34,6 @@
#include "ahci_elphel.h"
#include "../elphel/exif393.h"
#include "../elphel/jpeghead.h"
#define DRV_NAME "elphel-ahci"
/*
* FPGA bitstream control address and bit mask. These are used to check whether
......@@ -75,8 +74,8 @@ static int move_head(struct elphel_ahci_priv *dpriv);
static size_t get_prev_slot(const struct elphel_ahci_priv *dpriv);
static int is_cmdq_empty(const struct elphel_ahci_priv *dpriv);
void process_queue(unsigned long data);
static void set_flag(struct elphel_ahci_priv *drpiv, uint32_t flag);
static void reset_flag(struct elphel_ahci_priv *dpriv, uint32_t flag);
static void set_flag(struct elphel_ahci_priv *drpiv, u32 flag);
static void reset_flag(struct elphel_ahci_priv *dpriv, u32 flag);
static inline void reset_chunks(struct fvec *vects, int all);
/* debug functions */
static int check_chunks(struct fvec *vects);
......@@ -235,7 +234,7 @@ static irqreturn_t elphel_irq_handler(int irq, void * dev_instance)
struct ata_port *port = host->ports[DEFAULT_PORT_NUM];
void __iomem *port_mmio = ahci_port_base(port);
struct elphel_ahci_priv *dpriv = hpriv->plat_data;
uint32_t irq_stat, host_irq_stat, serror;
u32 irq_stat, host_irq_stat, serror;
if (dpriv->flags & IRQ_SIMPLE) {
......@@ -529,9 +528,14 @@ static void elphel_qc_prep(struct ata_queued_cmd *qc)
dev_dbg(ap->dev, "cmd = 0x%x, qc->tag = %u, ap->qc_active = %u, link->sactive = %u, link->active_tag = %u\n",
qc->tf.command, qc->tag, ap->qc_active, ap->link.sactive, ap->link.active_tag);
dev_dbg(ap->dev, "cmd = 0x%x, lba = %u, nob_lba = %u, nsect = %u, nob_nsect = %u\n",
qc->tf.command, qc->tf.lbal + (qc->tf.lbam << 8)+ (qc->tf.lbah << 16),
qc->tf.hob_lbal + (qc->tf.hob_lbam << 8)+ (qc->tf.hob_lbah << 16),
qc->tf.nsect, qc->tf.hob_nsect);
/* There is only one slot in controller thus we need to change tag*/
qc->tag = 0;
// dump_stack();// not controlled by debugfs
/*
* Fill in command table information. First, the header,
......@@ -583,10 +587,22 @@ static void elphel_qc_prep(struct ata_queued_cmd *qc)
struct elphel_ahci_priv *dpriv = dev_get_dpriv(ap->dev);
set_dscope_tstamp(dpriv, TSTMP_CMD_SYS);
dev_dbg(ap->dev, "cmd = 0x%x, lba = %lu, nsect = %u\n",
qc->tf.command,
((long)(qc->tf.lbal + (qc->tf.lbam << 8)+ (qc->tf.lbah << 16))) +
(((long) (qc->tf.hob_lbal + (qc->tf.hob_lbam << 8)+ (qc->tf.hob_lbah << 16))) << 24),
qc->tf.nsect + (qc->tf.hob_nsect << 8));
//same
dev_dbg(ap->dev, "cmd = 0x%x, lba = %u, nob_lba = %u, nsect = %u, nob_nsect = %u\n",
((char *) (pp->cmd_tbl))[2], ((char *) (pp->cmd_tbl))[4] + (((char *) (pp->cmd_tbl))[5] << 8)+ (((char *)(pp->cmd_tbl))[6] << 16),
((char *) (pp->cmd_tbl))[8] + (((char *)(pp->cmd_tbl))[9] << 8)+ (((char *)(pp->cmd_tbl))[10] << 16),
((char *) (pp->cmd_tbl))[12], ((char *) (pp->cmd_tbl))[13]);
}
/** Set flag @e flag in driver private structure. This function uses spin lock to access the flags variable. */
static void set_flag(struct elphel_ahci_priv *dpriv, uint32_t flag)
static void set_flag(struct elphel_ahci_priv *dpriv, u32 flag)
{
unsigned long irq_flags;
......@@ -596,7 +612,7 @@ static void set_flag(struct elphel_ahci_priv *dpriv, uint32_t flag)
}
/** Reset flag @e flag in driver private structure. This function uses spin lock to access the flags variable. */
static void reset_flag(struct elphel_ahci_priv *dpriv, uint32_t flag)
static void reset_flag(struct elphel_ahci_priv *dpriv, u32 flag)
{
unsigned long irq_flags;
......@@ -1564,7 +1580,7 @@ static void elphel_cmd_issue(struct ata_port *ap,///< device port for which the
///< ATA_CMD_WRITE or ATA_CMD_WRITE_EXT, other commands are not tested
///< @return None
{
uint32_t opts;
u32 opts;
uint8_t *cmd_tbl;
unsigned int slot_num = 0;
struct ahci_port_priv *pp = ap->private_data;
......@@ -1964,7 +1980,7 @@ static void dump_current_state(struct elphel_ahci_priv *dpriv)
struct ata_port *ap = host->ports[DEFAULT_PORT_NUM];
struct ata_link *link = &ap->link;
struct ahci_port_priv *pp = ap->private_data;
uint32_t *datascope_ptr;
u32 *datascope_ptr;
dev_dbg(dpriv->dev, "===== HBA memory dump ======\n");
dump_iomem(dpriv->dev, hpriv->mmio, 100, dpriv->base_addr);
......@@ -1994,7 +2010,7 @@ static void set_dscope_tstamp(struct elphel_ahci_priv *dpriv, unsigned int cmd)
struct ahci_host_priv *hpriv;
struct ata_port *ap;
void __iomem *port_mmio;
uint32_t data = 0;
u32 data = 0;
host = dev_get_drvdata(dpriv->dev);
hpriv = host->private_data;
......
......@@ -90,13 +90,13 @@ struct datascope {
void __iomem *timestamp_reg; ///< register in vendor specific address range (PxVS) where timestamp can be written
unsigned int cmd_cntr; ///< command counter, its value can be found in timestamp (2 bits only)
unsigned int enable; ///< enable/disable timestamps
uint32_t reg_stat[REG_NUM]; ///< buffer for registers' status, filled in in IRQ
u32 reg_stat[REG_NUM]; ///< buffer for registers' status, filled in in IRQ
};
/** Data for error handler */
struct error_handler {
uint32_t s_error; ///< the content of PxSERR register
uint32_t irq_stat; ///< the content of PxIS register
u32 s_error; ///< the content of PxSERR register
u32 irq_stat; ///< the content of PxIS register
wait_queue_head_t wait; ///< wait queue for delayed interrupts
};
......
......@@ -648,7 +648,7 @@ int control_compressor_memory (int num_sensor, ///< sensor port number (0.
return 0;
}
/** Return number of rfames in videobuffer for the sensor port minus 1 (0 means single frame buffer) */
/** Return number of frames in videobuffer for the sensor port minus 1 (0 means single frame buffer) */
int frames_in_buffer_minus_one(int num_sensor) ///< sensor port number (0..3)
///< @return number of frames in buffer - 1 (<0 for disabled channels ?)
{
......
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