New conversion routines and sin/cos implementation for angles in decidegrees

* All items shapes are converted to polygons.
* Polygons are merged layer by layer (for calculation time reasons,zones are not merged)
* for copper layers, vias and pads holes are substracted from polygons (but, for calculation time reasons, not inside zones areas).
* the look is better, mainly when displaying the copper thickness
* solder and paste layers are now shown in 3D viewer.
* the code was seriously cleaned (but still needs to be enhanced).
* Note this is a work in progress which needs refinements.

* All items shapes  are converted to polygons.
* Polygons are merged layer by layer (for calculation time reasons,zones are not merged)
* for copper layers, vias and pads holes are substracted from polygons (but, for calculation time reasons,  not inside zones areas).
* the look is better, mainly when displaying the copper thickness
* solder and paste layers are now shown in 3D viewer.
* the code was seriously cleaned (but still needs to be enhanced).
* Note this is a work in progress which needs refinements.

- Removed spurious int casts (these are truncated anyway and will break
  doubles)

- Applied the Distance, GetLineLength, EuclideanNorm, DEG2RAD, RAD2DEG
  ArcTangente and NORMALIZE* functions where possible

- ArcTangente now returns double and handles the 0,0 case like atan2, so
  it's no longer necessary to check for it before calling

- Small functions in trigo moved as inline

Interior regions on Edge.Cuts are out as keepouts for specctra DSN file
and downstream routers.  Point to point matching during polygon assembly
can have individual thresholds, one for board edge and another for interior polygons.
This is more forgiving for sloppy graphical mousers, or those that work without
grid snap on.  Currently the threshold for board edge is at zero, meaning the
board edge has to be precisely defined as a polygon, just as before.  But it
is easily tunable for experimentation.

* Fixed a bug in PCB_EDIT_FRAME::loadFootprints when no footprint libraries
  are found when attempting to load footprints.
* Add a warning to PCB_EDIT_FRAME::loadFootprints to inform the user when
  a footprint library file cannot be found in any of the standard library
  search paths.
* Changed FOOTPRINT_INFO::m_padCount to unsigned to prevent signed/unsigned
  comparison compiler warnings.
* Put NestedSpace() function in netlist_reader.cpp inside conditional debug
  build statement to prevent warning in release builds.

* Fix both legacy and s-expression netlist readers when footprints are
  assigned in the netlist.
* Add some helper functions to NETLIST for detecting when footprints are set
  or not set and when they have been changed while loading the .cmp file.
* Rename a few functions to improve their readability.

In most case the assignment to null was not necessary since it was easily provable that the (local) variable wouldn't have referenced after that anyway.

Pcbbnew: fix bug Bug #1172892  (bad drill map file names, when a point is used inside a board file name)

* Tweak the NETLIST_READER code to allow for component footprint names that
  are not found in any library to generate a warning instead of an error and
  update the board accordingly.
* Don't display undo warning in netlist dialog when dry run option selected.
* Rename netlist_reader_common.cpp to netlist_reader.cpp
* Rename netlist_reader_firstformat.cpp to legacy_netlist_reader.cpp
* Rename netlist_reader_kicad.cpp to kicad_netlist_reader.cpp
* Remove cvpcb/read_write_cmpfile.cpp and move the single function it
  contained into cvframe.cpp
* Remove cvpcb/loadcmp.cpp and move the single function it contained into
  class_DisplayFootprintsFrame.cpp.
* Remove cvpcb/readschematicnetlist.cpp and move the single function it
  contained into cvframe.cpp.
* Remove cvpcb/setvisu.cpp and move the few functions it contained into
  the appropriate source file.

* Create separate NETLIST object to hold contents of netlist files.
* Read entire netlist and footprint link files before making applying
  changes to board.
* Add BOARD::ReplaceNetlist() function to eliminate the calls between the
  NETLIST_READER, PCB_EDIT_FRAME, and BOARD objects.
* Change placement of new components below the center of the current board
  or in the center of the page if the BOARD is empty.
* Add dry run option to netlist dialog to print changes to message control
  without making changes.
* Add button to netlist dialog to allow saving contents of message control
  to a file.
* Eliminate the need to compile netlist_reader_*.cpp in both CvPcb and Pcbnew.
* Add netlist_reader_*.cpp to the pcbcommon library.
* Remove redundant load component link file code from CvPcb.
* Modify CvPcb new to work with the new NETLIST_READER object.
* Add compare() function and < and == operators to FPID object.
* Add REPORTER class to hide an underlying string writing implementation for
  use in low level objects.  Thank you Dick for the idea.
* Lots of minor coding policy, Doxygen comment, and missing license fixes.

pcb_parser failed on (fill yes (arc_segments 16) (thermal_gap 1.99898) (thermal_bridge_width 1.99898))
See http://tech.groups.yahoo.com/group/kicad-users/message/15105

Pcbnew: fix bug in pcb_parser: incorrect pad local solder paste margin ratio value read when not 0. ( This also fixes bug 1170535 )

The internal BOM generator has bugs. I designed an XSL script, which converts the generated XML Partlist into
a CSV file for Libre Office or Open Office.  It is very easy to use. You can specify it as a plugin for 
Eeshema netlist generator.

It searches for all field names, generates the table headings accounting for all fields found in any part.
Then stuffs all the parts rows according to proper fields.

Eeschema: fix bug #1168116. Netlist generation: remove  dead code and fully outdated option pspice "use net number"
Pcbnew: layer manager: display tooltips using translated form (where internationalized, but always shown in English).

Changed format specifiers of some printf involved with size_t values to %zu to avoid runtime assertions.

Depending on build options seems that wx uses different types for size() so the Format string was not always correct. Put a fat warning in a comment too.

use lower case library names in *.pro & *.sch files, to match actual filenames in the template file set. Noticed on linux.

Also removed EDA_DRAW_FRAME::OnGrid which was totally dead (empty and unused)