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Andrey Filippov authored
leanMeasure (uniform-MB lean path, JNA backend): the per-cycle CPU front end - transformToScenePxPyD (full 5120-tile grid), setInterTasksMotionBlur + sort, and the two task H2D uploads - is replaced by ONE gpuQuad.execPoseTaskUpdate() call: pose_task_update projects the per-sequence template on-device from the Java-tracked measure pose and rewrites both resident task slots in place; geometry + convert then run on ACTIVATED slots with no upload (ImageDtt.interCorrTDResident). Per cycle the only H2D left is the 12-float pose vector. Per scene: setupERS + camera-block upload (rung C2 registers, shared with prepare_resident) + skeleton slot re-upload (~120 KB, guards against other pipeline stages using the task slots between scenes). The per-scene uniform-MB 6-float descriptor replicates the exact setInterTasksMotionBlur double crank math; margin/projection failures become task=0 holes (missing peak -> conditioning abstains, D3 design). Fallbacks: JCuda backend, pose_mb_uniform off, NaN/non-uniform MB (degenerate uniformMotionBlur fallback) -> unchanged legacy CPU build. - GpuQuad/GpuQuadJna/TpJna: execPoseTaskUpdate + activateTaskSlot (base returns false; JNA marshals rung-C2 nullable groups). - IntersceneLmaFloat.buildTasks: serial float task-build oracle (the Java float clone of the kernel, worldFromPixel -> pixelFromWorld + descriptor/margin/hole packing). - One-shot oracle at pose_lma_debug>=1: GPU stream vs the legacy Java DOUBLE build (txy-matched field compare, D3 gate <=1e-5 px print) and vs the float-serial clone; once-per-program path-active note. - pose_corr export stays the explicit diagnostic exception: armed runs read the GPU-built pre-offset streams back and capture task words RAW (new iterTasksPre or511 overload - a |511-ed hole would diverge in a tol-0 replay). mvn -DskipTests clean package: BUILD SUCCESS. Real-scene gate (D3, ratified): poses < 0.003 px drift, aggregate RMS unchanged at print precision, same QC count, 497/497 - Andrey's run. CUDA side: tile_processor_gpu lwir16_2 @ ef36688 (kernel + JNA API + two-tier tests, all regressions PASS incl. pose_corr @tol 0). Design: internal handoffs/2026-07-16_3b_measure_chain_residency_design.md. Co-Authored-By:Claude Fable 5 <noreply@anthropic.com>
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| .. | ||
| ConditioningJna.java | ||
| GpuQuadJna.java | ||
| LmaProducts.java | ||
| Stage0.java | ||
| Stage1.java | ||
| Stage2.java | ||
| Stage3.java | ||
| Stage4.java | ||
| Stage5.java | ||
| StageProc.java | ||
| TpJna.java |