-
Andrey Filippov authored
The combined-image render (ROADMAP item 4, R1 shape confirmed by Andrey 07/19: pose keeps its own 1/60 slot; depth-2 pipeline, +1 frame detection latency) now runs from CuasPoseRT: after fitted[nscene] lands (fitted OR coasted - every scene renders, the no-skip rule), the hook collects the previous scene's render (normally already done - it ran during this scene's DP slot) and enqueues this scene's full-frame chain NON-BLOCKING on the low-priority render stream via GpuQuadJna.renderScene. - CuasRtParameters: curt.det_render (default ON; JNA lean path only, fail-safe disables the stage for the run) + curt.det_render_save (DEBUG, TEST-ONLY blocking D2H per ruling 3.4 -> -CUAS-RT-DETINPUT stack). - CuasPoseRT: per-sequence arm (renderSetup policy + FULL template = all tiles with valid disparity, the renderSceneVirtual selection=null convention + reference camera); per scene: render-private scene-camera snapshot (renderCameras - the pose loop's residents move on to N+1 before render(N) executes), shared uniform-MB descriptor (step 4 of poseMeasureSetup extracted verbatim into uniformMbDescriptor() - ops and order unchanged, both task streams carry the identical MB pair), ring-set captured before the D5 overlap flips it. NO per-scene prints - pose Done lines stay byte-identical; one-line stage summary after the loop. - GpuQuad/GpuQuadJna/TpJna: renderSetup/renderTemplate/renderCameras/ renderScene/renderStatus/renderGet (base = unsupported, JNA implements). mvn package + test PASS. Native side: tile_processor_gpu d2e0395/59884af/ fe69ecc (render_dp chain, case render_pipe bit-exact, sanitizer 0, run_cases ALL PASS, bench 4.30 ms/scene). Real-scene gate = R1c (Andrey's routine run): Done-lines byte-identical vs the 07/16 22:52 record + 60/s with the stage ON + -CUAS-RT-DETINPUT A/B vs CuasRender. Co-Authored-By:Claude Fable 5 <noreply@anthropic.com>
5ead4c80