Use the frozen v1 kernel chain in the program instead of the Java CPU code
(roadmap step 4, JNA-only per Andrey's 07/12/2026 ruling):
- GpuQuad.execConsolidateSensorsTD: base hook, returns false (JCuda backend
  keeps the CPU bridge - no JCuda launch code for new kernels).
- GpuQuadJna override -> TpJna.tp_proc_exec_consolidate: on-device chain,
  TD never leaves the GPU (zero-copy; only flattened TpTask streams cross);
  validated bit-exact vs the real-scene avg_td_oob oracle case
  (tile_processor_gpu jna/test_proc_consolidate, max|diff|=0).
- CuasTD.consolidateToSlot0: shared bridge - GPU-first, CPU fallback now
  OOB-mask-capable (oobSensorMasks + masked consolidateSensorsTD), so both
  backends produce the v1-filtered average.
- CuasPoseRT.leanMeasure + CuasRender.renderSceneVirtual: task sets hoisted
  out of the MB/no-MB branches and passed to the bridge (replaces the
  getCltData -> consolidateSensorsTD -> setCltData(0) round-trip).
- CuasRtParameters: new curt.oob_soft / curt.oob_hard (defaults =
  CuasTD.OOB_SOFT/HARD_DEFAULT 12/8, frozen spec; 0/0 = v0 unfiltered A/B
  knob), new dialog group under CUAS RT; corr-xml keys _curt_oob_*;
  consumed by the bridge at both call sites and by the avg_td_oob export
  (replaces hardcoded defaults in CuasRT.kernelTest).
Verified: mvn package; CuasTD headless self-test ALL PASSED (exit 0).
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>