• Andrey Filippov's avatar
    CLAUDE: DP rung D4 - Java switch: ONE pose_scene_dp entry per scene · c673a448
    Andrey Filippov authored
    Binds the D3-validated tp_proc_exec_pose_scene_dp in TpJna/GpuQuadJna
    (+ base GpuQuad stubs, non-throwing negative return = the FAIL-safe
    hook) and adds the one-entry-per-scene branch to the lean pose path:
    
    - new saved curt.pose_scene_dp (default ON, 'Pose scene as ONE GPU DP
      entry'): eligibility = frozen lean shape only (fixed cycles, 1-inner
      cap, freeze 0, 3-angle lma_use_R, uniform MB, JNA backend, no armed
      capture, no debug-save holders); everything else falls back to the
      host-driven (B3) loop automatically.
    - scene 0 (per template/sequence) always runs the host-driven loop -
      it seeds the resident per-sequence state through the production
      C1/C2 register path - then is REPLAYED through the DP entry as the
      one-shot oracle: per-cycle packed rows vs the captured resident-step
      results, the final anchor vs the fitted angles, and the last-cycle
      peak rows keyed by packed index (the B3 order-independence rule),
      all bit-compared. PASS arms DP from scene 1; FAIL (or any mid-run
      native failure) disables DP for the run and prints why.
    - DP scenes reconstruct the scene bookkeeping from the returned trace
      by the exact leanFitScene/IntersceneLma double rules (candidate =
      packed[16..18] widened, dATR in double, RMS = packed[19..22],
      rejected step == the legacy runLma -1 -> coast), fetch/unpack the
      resident last-cycle peaks exactly like leanMeasure, and print the
      same QC/cycles/Done-line fields - the real-scene gate is 497 Done
      lines byte-identical to the 07/16 22:52 saves-OFF record.
    - gpuTaskBuild steps 1-5 extracted verbatim into poseMeasureSetup()
      (shared with the DP entry); new 'scene DP entry' profile stage;
      Stage0 kernel count synced 36 -> 40 (the native-only D1-D3 sessions
      added the DP kernels but could not touch the Java constant).
    
    Gates: mvn clean package PASS; Stage0 PASS 40/40; native run_cases.sh
    ALL PASS (pose_corr @tol 0 + dp_cycles + measure_dp + scene_dp).
    Real-scene gate = Andrey's next routine run: expect the D4 oracle PASS
    line after scene 0, 'DP scene entry active' from scene 1, poses/QC
    byte-identical, post ~19.5 -> ~8-10 ms/scene.
    Co-Authored-By: 's avatarClaude Fable 5 <noreply@anthropic.com>
    c673a448
GpuQuad.java 273 KB