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Elphel
ezynq
Commits
8f2cf651
Commit
8f2cf651
authored
Nov 13, 2013
by
Oleg Dzhimiev
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Plain Diff
updated configs for other boards
parent
aaf833a3
Changes
4
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4 changed files
with
17 additions
and
14 deletions
+17
-14
elphel393.h
u-boot-tree/include/configs/elphel393.h
+3
-3
ezynq_microzed.h
u-boot-tree/include/configs/ezynq/ezynq_microzed.h
+5
-2
zynq_microzed.h
u-boot-tree/include/configs/zynq_microzed.h
+3
-3
zynq_zed.h
u-boot-tree/include/configs/zynq_zed.h
+6
-6
No files found.
u-boot-tree/include/configs/elphel393.h
View file @
8f2cf651
...
...
@@ -22,9 +22,9 @@
/*#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) */
#define PHYS_SDRAM_1_SIZE (1024 * 1024 * 1024)
#define CONFIG_ZYNQ_SERIAL_UART0
*
#if
0
#define CONFIG_ZYNQ_GEM0
#define CONFIG_ZYNQ_SERIAL_UART0
#if
1
//
#define CONFIG_ZYNQ_GEM0
#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0
#endif
...
...
u-boot-tree/include/configs/ezynq/ezynq_microzed.h
View file @
8f2cf651
...
...
@@ -78,13 +78,16 @@
#define CONFIG_EZYNQ_MIO_SDIO_0__PULLUP
#define CONFIG_EZYNQ_MIO_SDCD_0 46
/* any but 7,8 */
#define CONFIG_EZYNQ_MIO_SDCD_0__PULLUP
#define CONFIG_EZYNQ_MIO_SDWP_0 50
/* #any but 7,8 */
#define CONFIG_EZYNQ_MIO_SDWP_0__PULLUP
//
#define CONFIG_EZYNQ_MIO_SDWP_0 50 /* #any but 7,8 */
//
#define CONFIG_EZYNQ_MIO_SDWP_0__PULLUP
#define CONFIG_EZYNQ_MIO_UART_1 48
/* # 8+4*N */
#define CONFIG_EZYNQ_MIO_UART_0 50
/* # 8+4*N */
/* LED will be OFF */
#define CONFIG_EZYNQ_MIO_INOUT_47 OUT
/* Make output, do not set data. Will be set after debug will be over */
#define CONFIG_EZYNQ_MIO_GPIO_OUT_7 1
/* Set selected GPIO output to 0/1 */
#define CONFIG_EZYNQ_UART_DEBUG_CHANNEL 0x0
/*
Red LED - pullup, input - on,
#define CONFIG_EZYNQ_MIO_INOUT_47 OUT
...
...
u-boot-tree/include/configs/zynq_microzed.h
View file @
8f2cf651
...
...
@@ -22,8 +22,8 @@
#define PHYS_SDRAM_1_SIZE (1024 * 1024 * 1024)
#define CONFIG_ZYNQ_SERIAL_UART1
#if
0
#define CONFIG_ZYNQ_GEM0
#if
1
//
#define CONFIG_ZYNQ_GEM0
#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0
#endif
...
...
@@ -60,7 +60,7 @@
#undef CONFIG_SYS_TEXT_BASE
#define CONFIG_BOOTDELAY -1
/* -1 to Disable autoboot */
#define CONFIG_SYS_PROMPT "
ezynq
> "
#define CONFIG_SYS_PROMPT "
microzed
> "
#define CONFIG_SYS_SDRAM_BASE 0x00000000
/* Physical start address of SDRAM. _Must_ be 0 here. */
...
...
u-boot-tree/include/configs/zynq_zed.h
View file @
8f2cf651
...
...
@@ -21,8 +21,8 @@
#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
#define CONFIG_ZYNQ_SERIAL_UART1
#if
0
#define CONFIG_ZYNQ_GEM0
#if
1
//
#define CONFIG_ZYNQ_GEM0
#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0
#endif
...
...
@@ -59,7 +59,7 @@
#undef CONFIG_SYS_TEXT_BASE
#define CONFIG_BOOTDELAY -1
/* -1 to Disable autoboot */
#define CONFIG_SYS_PROMPT "
ezynq
> "
#define CONFIG_SYS_PROMPT "
zedboard
> "
#define CONFIG_SYS_SDRAM_BASE 0x00000000
/* Physical start address of SDRAM. _Must_ be 0 here. */
...
...
@@ -122,10 +122,10 @@
"fpga load 0 ${loadbit_addr} ${filesize}\0" \
"sdboot=echo Copying Linux from SD to RAM... && " \
"mmcinfo && " \
"fatload mmc 0 0x3
0
00000 ${kernel_image} && " \
"fatload mmc 0 0x
2A
00000 ${devicetree_image} && " \
"fatload mmc 0 0x3
A
00000 ${kernel_image} && " \
"fatload mmc 0 0x
34
00000 ${devicetree_image} && " \
"fatload mmc 0 0x2000000 ${ramdisk_image} && " \
"bootm 0x3
000000 0x2000000 0x2A
00000\0" \
"bootm 0x3
A00000 0x2000000 0x34
00000\0" \
"nandboot=echo Copying Linux from NAND flash to RAM... && " \
"nand read 0x3000000 0x100000 ${kernel_size} && " \
"nand read 0x2A00000 0x600000 ${devicetree_size} && " \
...
...
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