-
Andrey Filippov authored6176aa7b
Name |
Last commit
|
Last update |
---|---|---|
.settings | Loading commit data... | |
axi | ||
ddr3 | ||
phy | ||
simulation_modules | ||
util_modules | ||
wrap | ||
.editor_defines | ||
.gitignore | ||
.project | ||
ddrc_control.v | ||
ddrc_status.v | ||
ddrc_test01.v | ||
ddrc_test01.xcf | ||
ddrc_test01.xdc | ||
ddrc_test01_testbench.sav | ||
ddrc_test01_testbench.tf | ||
ddrc_test01_timing.xdc |