Commit e4aa0cef authored by Andrey Filippov's avatar Andrey Filippov

re-testing

parent 3efc55dc
...@@ -16,3 +16,4 @@ x393.prj ...@@ -16,3 +16,4 @@ x393.prj
bitbake-logs bitbake-logs
sysroots sysroots
attic/* attic/*
image
...@@ -2,6 +2,6 @@ ...@@ -2,6 +2,6 @@
, .INIT_08 (256'h000000000024000600000000000000000000000080000C000000000080000800) , .INIT_08 (256'h000000000024000600000000000000000000000080000C000000000080000800)
, .INIT_09 (256'h000000000000000000000000000000000000000000000000FFFFFFFF00000000) , .INIT_09 (256'h000000000000000000000000000000000000000000000000FFFFFFFF00000000)
, .INIT_0B (256'h0000000000000000000000000000003300000000000000000000000000000000) , .INIT_0B (256'h0000000000000000000000000000003300000000000000000000000000000000)
, .INIT_0C (256'h000000000000000000000000000000000000000001010004001000000001FFFE) , .INIT_0C (256'h00000000000000000000000000000000000000000101000A001000000001FFFE)
, .INIT_0D (256'h000001000000000000000040000000000001FFFE000000008000000000000000) , .INIT_0D (256'h000001000000000000000040000000000001FFFE000000008000000000000000)
, .INIT_0E (256'h0000000000000000000000000000000000000000000000000000000040000001) , .INIT_0E (256'h0000000000000000000000000000000000000000000000000000000040000001)
...@@ -97,7 +97,7 @@ ...@@ -97,7 +97,7 @@
// RO: HBA Revision ID // RO: HBA Revision ID
localparam PCI_Header__RID__RID__ADDR = 'h62; localparam PCI_Header__RID__RID__ADDR = 'h62;
localparam PCI_Header__RID__RID__MASK = 'hff; localparam PCI_Header__RID__RID__MASK = 'hff;
localparam PCI_Header__RID__RID__DFLT = 'h4; localparam PCI_Header__RID__RID__DFLT = 'ha;
// RO: Base Class Code: 1 - Mass Storage Device // RO: Base Class Code: 1 - Mass Storage Device
localparam PCI_Header__CC__BCC__ADDR = 'h62; localparam PCI_Header__CC__BCC__ADDR = 'h62;
localparam PCI_Header__CC__BCC__MASK = 'hff000000; localparam PCI_Header__CC__BCC__MASK = 'hff000000;
......
...@@ -28,7 +28,7 @@ __status__ = "Development" ...@@ -28,7 +28,7 @@ __status__ = "Development"
# All unspecified ranges/fields default to fT:RO, fC:0 (readonly, reset value = 0) # All unspecified ranges/fields default to fT:RO, fC:0 (readonly, reset value = 0)
#RID = 0x02 # Revision ID (use for bitstream version) #RID = 0x02 # Revision ID (use for bitstream version)
RID = 0x04 # Revision ID RID = 0x0a # Revision ID
VID = 0xfffe # What to use for non-PCI "vendorID"? VID = 0xfffe # What to use for non-PCI "vendorID"?
DID = 0x0001 DID = 0x0001
SSVID = 0xfffe SSVID = 0xfffe
......
...@@ -1521,6 +1521,8 @@ mem = x393_mem.X393Mem(1,0,1) ...@@ -1521,6 +1521,8 @@ mem = x393_mem.X393Mem(1,0,1)
sata = x393sata.x393sata() sata = x393sata.x393sata()
hex(mem.read_mem(sata.get_reg_address('PCI_Header__RID'))) hex(mem.read_mem(sata.get_reg_address('PCI_Header__RID')))
sata.setup_pio_read_identify_command()
sata.dd_read_dma_ext(142615470, 512, 512) sata.dd_read_dma_ext(142615470, 512, 512)
sata.dd_read_dma_ext(142615472, 512, 512) sata.dd_read_dma_ext(142615472, 512, 512)
...@@ -1529,10 +1531,16 @@ hex(((mem.read_mem(0x80000ffc) >> 10) & 0xffc) + 0x80001000) ...@@ -1529,10 +1531,16 @@ hex(((mem.read_mem(0x80000ffc) >> 10) & 0xffc) + 0x80001000)
Datascope has a ring buffer of 4K: 0x80001000..0x80001fff Datascope has a ring buffer of 4K: 0x80001000..0x80001fff
mem.read_mem(0x80000118) mem.write_mem(0x80000118,0x10) # stop
mem.write_mem(0x80000118,0x10)
dd if=/dev/sdj count=1 skip=142615470 of=/dev/null
s=set()
for i in range(10000):
s.add(mem.read_mem (0x80000ffc) & 0x1ff)
s
hex(mem.read_mem (0x80000ffc))
def get_MAC(): def get_MAC():
with open("/sys/class/net/eth0/address") as sysfile: with open("/sys/class/net/eth0/address") as sysfile:
......
...@@ -38,7 +38,7 @@ ...@@ -38,7 +38,7 @@
`define PRELOAD_BRAMS `define PRELOAD_BRAMS
`define CHECKERS_ENABLED `define CHECKERS_ENABLED
`define use200Mhz 1 `define use200Mhz 1
`define SEND_READ_ERROR //`define SEND_READ_ERROR
/* /*
* using x393_testbench01.tf style, contains a lot of copy-pasted code from there * using x393_testbench01.tf style, contains a lot of copy-pasted code from there
*/ */
......
[*] [*]
[*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI [*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI
[*] Thu Dec 8 01:26:17 2016 [*] Thu Dec 8 02:35:40 2016
[*] [*]
[dumpfile] "/home/eyesis/git/elphel393/fpga-elphel/x393_sata/simulation/tb_ahci-20161207180004761.fst" [dumpfile] "/home/eyesis/git/elphel393/fpga-elphel/x393_sata/simulation/tb_ahci-20161207182625587.fst"
[dumpfile_mtime] "Thu Dec 8 01:00:23 2016" [dumpfile_mtime] "Thu Dec 8 01:26:45 2016"
[dumpfile_size] 4762337 [dumpfile_size] 4764125
[savefile] "/home/eyesis/git/elphel393/fpga-elphel/x393_sata/tb_ahci_01.sav" [savefile] "/home/eyesis/git/elphel393/fpga-elphel/x393_sata/tb_ahci_01.sav"
[timestart] 33243400 [timestart] 0
[size] 1814 1171 [size] 1814 1171
[pos] 1920 0 [pos] 1920 0
*-15.591494 33388300 32882854 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 *-22.591494 33796096 32882854 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] tb_ahci. [treeopen] tb_ahci.
[treeopen] tb_ahci.axi_read_addr. [treeopen] tb_ahci.axi_read_addr.
[treeopen] tb_ahci.dev. [treeopen] tb_ahci.dev.
...@@ -1872,9 +1872,9 @@ tb_ahci.dut.sata_top.ahci_top_i.ahci_fsm_i.tfd_sts[7:0] ...@@ -1872,9 +1872,9 @@ tb_ahci.dut.sata_top.ahci_top_i.ahci_fsm_i.tfd_sts[7:0]
tb_ahci.dut.sata_top.ahci_top_i.ahci_fsm_i.fis_first_vld tb_ahci.dut.sata_top.ahci_top_i.ahci_fsm_i.fis_first_vld
@22 @22
tb_ahci.dut.sata_top.ahci_top_i.ahci_fsm_i.ssts_det[3:0] tb_ahci.dut.sata_top.ahci_top_i.ahci_fsm_i.ssts_det[3:0]
@800200 @c00201
-tmp -tmp
@29 @28
[color] 7 [color] 7
tb_ahci.dut.sata_top.ahci_top_i.ahci_fsm_i.dis_actions tb_ahci.dut.sata_top.ahci_top_i.ahci_fsm_i.dis_actions
@8028 @8028
...@@ -1894,7 +1894,7 @@ tb_ahci.dut.sata_top.ahci_top_i.ahci_fsm_i.fsm_act_done ...@@ -1894,7 +1894,7 @@ tb_ahci.dut.sata_top.ahci_top_i.ahci_fsm_i.fsm_act_done
tb_ahci.dut.sata_top.ahci_top_i.ahci_fsm_i.was_last_action_r tb_ahci.dut.sata_top.ahci_top_i.ahci_fsm_i.was_last_action_r
@200 @200
- -
@1000200 @1401201
-tmp -tmp
@28 @28
[color] 3 [color] 3
......
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