more debugging with the AHCI driver (8ce6dc0e) · Commits · Elphel / x393_sata

.project

+17 −17

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		@@ -52,87 +52,87 @@
		<link>
		<name>vivado_logs/VivadoBitstream.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoBitstream-20160222133823984.log</location>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoBitstream-20160223233437781.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoOpt.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoOpt-20160222133823984.log</location>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoOpt-20160223233437781.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoOptPhys.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoOptPhys-20160222133823984.log</location>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoOptPhys-20160223233437781.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoOptPower.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoOptPower-20160222133823984.log</location>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoOptPower-20160223233437781.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoPlace.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoPlace-20160222133823984.log</location>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoPlace-20160223233437781.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoRoute.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoRoute-20160222133823984.log</location>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoRoute-20160223233437781.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoSynthesis.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoSynthesis-20160222133537458.log</location>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoSynthesis-20160223232408227.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoTimimgSummaryReportImplemented.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoTimimgSummaryReportImplemented-20160222133823984.log</location>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoTimimgSummaryReportImplemented-20160223233437781.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoTimimgSummaryReportSynthesis.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoTimimgSummaryReportSynthesis-20160222133537458.log</location>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoTimimgSummaryReportSynthesis-20160223232408227.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoTimingReportImplemented.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoTimingReportImplemented-20160222133823984.log</location>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoTimingReportImplemented-20160223233437781.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoTimingReportSynthesis.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoTimingReportSynthesis-20160222133537458.log</location>
		<location>/home/andrey/git/x393_sata/vivado_logs/VivadoTimingReportSynthesis-20160223232408227.log</location>
		</link>
		<link>
		<name>vivado_state/x393_sata-opt-phys.dcp</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-opt-phys-20160222133823984.dcp</location>
		<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-opt-phys-20160223233437781.dcp</location>
		</link>
		<link>
		<name>vivado_state/x393_sata-opt-power.dcp</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-opt-power-20160222133823984.dcp</location>
		<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-opt-power-20160223233437781.dcp</location>
		</link>
		<link>
		<name>vivado_state/x393_sata-opt.dcp</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-opt-20160222133823984.dcp</location>
		<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-opt-20160223233437781.dcp</location>
		</link>
		<link>
		<name>vivado_state/x393_sata-place.dcp</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-place-20160222133823984.dcp</location>
		<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-place-20160223233437781.dcp</location>
		</link>
		<link>
		<name>vivado_state/x393_sata-route.dcp</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-route-20160222133823984.dcp</location>
		<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-route-20160223233437781.dcp</location>
		</link>
		<link>
		<name>vivado_state/x393_sata-synth.dcp</name>
		<type>1</type>
		<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-synth-20160222133537458.dcp</location>
		<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-synth-20160223232408227.dcp</location>
		</link>
		</linkedResources>
		</projectDescription>

ahci/ahci_ctrl_stat.v

+3 −1

Original line number	Diff line number	Diff line
		@@ -101,6 +101,7 @@ module ahci_ctrl_stat #(
		input serr_DI, // RWC: PHY Internal Error
		// sirq_PRC,
		// sirq_IF \|\| // sirq_INF
		input serr_EE, // RWC: Internal error (such as elastic buffer overflow or primitive mis-alignment)
		input serr_EP, // RWC: Protocol Error - a violation of SATA protocol detected
		input serr_EC, // RWC: Persistent Communication or Data Integrity Error
		input serr_ET, // RWC: Transient Data Integrity Error (error not recovered by the interface)
		@@ -204,7 +205,8 @@ module ahci_ctrl_stat #(
		{32{serr_DW }} & HBA_PORT__PxSERR__DIAG__W__MASK \| // 'h40000;
		{32{serr_DI }} & HBA_PORT__PxSERR__DIAG__I__MASK \| // 'h20000;
		{32{sirq_PRC}} & HBA_PORT__PxSERR__DIAG__N__MASK \| // 'h10000;
		{32{sirq_IF \| sirq_INF }} & HBA_PORT__PxSERR__ERR__E__MASK \| // 'h800;
		// {32{sirq_IF \| sirq_INF }} & HBA_PORT__PxSERR__ERR__E__MASK \| // 'h800;
		{32{serr_EE}} & HBA_PORT__PxSERR__ERR__E__MASK \| // 'h800;
		{32{serr_EP }} & HBA_PORT__PxSERR__ERR__P__MASK \| // 'h400;

		{32{serr_EC }} & HBA_PORT__PxSERR__ERR__C__MASK \| // 'h200;

ahci/ahci_fsm.v

+9 −3

Original line number	Diff line number	Diff line
		@@ -56,7 +56,7 @@ module ahci_fsm

		// Communication with ahci_ctrl_stat (some are not needed)
		// update register inputs (will write to register memory current value of the corresponding register)
		output pfsm_started, // H: FSM doene, P: FSM started (enable sensing pcmd_st_cleared)
		output pfsm_started, // H: FSM done, P: FSM started (enable sensing pcmd_st_cleared)
		// update register inputs (will write to register memory current value of the corresponding register)
		// Removing - such updates are always done when startimng new state
		/// input update_pending,
		@@ -281,7 +281,7 @@ module ahci_fsm

		reg [1:0] async_pend_r; // waiting to process cominit_got
		reg async_from_st; // chnge to multi-bit if there will be more sources for async transitions
		wire asynq_rq = cominit_got \|\| pcmd_st_cleared;
		wire asynq_rq = (cominit_got && unsolicited_cominit_en) \|\| pcmd_st_cleared;
		// OK to wait for some time fsm_act_busy is supposed to never hang up
		wire async_ackn = !fsm_preload && async_pend_r[0] && ((fsm_actions && !update_busy && !fsm_act_busy) \|\| fsm_transitions[0]); // OK to process async jump
		// reg x_rdy_collision_pend;
		@@ -297,7 +297,8 @@ module ahci_fsm

		wire conditions_ce = // copy all conditions to the register so they will not change while iterating through them
		!fsm_transitions_w && !fsm_transitions[0];

		reg unsolicited_cominit_en; // allow unsolicited COMINITs
		wire en_cominit; // en_cominit

		assign fsm_next = (fsm_preload \|\| (fsm_actions && !update_busy && !fsm_act_busy) \|\| fsm_transitions[0]) && !async_pend_r[0]; // quiet if received cominit is pending
		assign update_all = fsm_jump[0];
		@@ -336,6 +337,10 @@ module ahci_fsm
		localparam LABEL_ST_CLEARED = 11'h008;

		always @ (posedge mclk) begin
		if (hba_rst) unsolicited_cominit_en <= !was_port_rst;
		// else if (en_cominit \|\| comreset_send) unsolicited_cominit_en <= en_cominit;


		if (hba_rst) pgm_jump_addr <= (was_hba_rst \|\| was_port_rst) ? (was_hba_rst? LABEL_HBA_RST:LABEL_PORT_RST) : LABEL_POR;
		// else if (async_pend_r[1]) pgm_jump_addr <= async_from_st? LABEL_ST_CLEARED : LABEL_COMINIT;
		else if (async_pend_r[0]) pgm_jump_addr <= async_from_st? LABEL_ST_CLEARED : LABEL_COMINIT;
		@@ -462,6 +467,7 @@ module ahci_fsm
		.SET_OFFLINE (set_offline), // output reg
		.R_OK (send_R_OK), // output reg
		.R_ERR (send_R_ERR), // output reg
		.EN_COMINIT (en_cominit), // output reg
		// FIS TRANSMIT/WAIT DONE
		.FETCH_CMD (fetch_cmd), // output reg
		.ATAPI_XMIT (atapi_xmit), // output reg

ahci/ahci_sata_layers.v

+4 −3

Original line number	Diff line number	Diff line
		@@ -81,7 +81,7 @@ module ahci_sata_layers #(
		output serr_DW, // RWC: COMMWAKE signal was detected
		output serr_DI, // RWC: PHY Internal Error
		// sirq_PRC,
		// sirq_IF \|\| // sirq_INF
		output serr_EE, // RWC: Internal error (such as elastic buffer overflow or primitive mis-alignment)
		output serr_EP, // RWC: Protocol Error - a violation of SATA protocol detected
		output serr_EC, // RWC: Persistent Communication or Data Integrity Error
		output serr_ET, // RWC: Transient Data Integrity Error (error not recovered by the interface)
		@@ -246,8 +246,9 @@ module ahci_sata_layers #(
		// assign serr_DS = phy_ready && (0); // RWC: Link sequence error
		// assign serr_DC = phy_ready && (0); // RWC: CRC error in Link layer
		// assign serr_DB = phy_ready && (0); // RWC: 10B to 8B decode error
		assign serr_DI = phy_ready && (rxelsfull); // RWC: PHY Internal Error // just debugging
		assign serr_EP = phy_ready && (rxelsempty); // RWC: Protocol Error - a violation of SATA protocol detected // just debugging
		assign serr_EE = phy_ready && (rxelsfull \|\| rxelsempty);
		assign serr_DI = phy_ready && (0); // rxelsfull); // RWC: PHY Internal Error // just debugging
		assign serr_EP = phy_ready && (0); // rxelsempty); // RWC: Protocol Error - a violation of SATA protocol detected // just debugging
		assign serr_EC = phy_ready && (0); // RWC: Persistent Communication or Data Integrity Error
		assign serr_ET = phy_ready && (0); // RWC: Transient Data Integrity Error (error not recovered by the interface)
		assign serr_EM = phy_ready && (0); // RWC: Communication between the device and host was lost but re-established

ahci/ahci_top.v

+9 −1

Original line number	Diff line number	Diff line
		@@ -172,6 +172,7 @@ module ahci_top#(
		input serr_DI, // RWC: PHY Internal Error
		// sirq_PRC,
		// sirq_IF \|\| // sirq_INF
		input serr_EE, // RWC: Internal error (such as elastic buffer overflow or primitive mis-alignment)
		input serr_EP, // RWC: Protocol Error - a violation of SATA protocol detected
		input serr_EC, // RWC: Persistent Communication or Data Integrity Error
		input serr_ET, // RWC: Transient Data Integrity Error (error not recovered by the interface)
		@@ -476,10 +477,16 @@ module ahci_top#(
		wire pxci0; // pxCI current value
		wire hba_rst_done; // HBA reset done - clear GHC.HR (and some other regs)

		wire comreset_send0; // just disabling it


		wire [9:0] last_jump_addr;
		wire [31:0] debug_dma;
		wire [31:0] debug_dma1;
		wire [31:0] debug_dma_h2d;

		assign comreset_send = comreset_send0 && 0;

		// Async FF
		always @ (posedge mrst or posedge mclk) begin
		if (mrst) en_port <= 0;
		@@ -518,7 +525,7 @@ module ahci_top#(

		.phy_ready (phy_ready), // input
		.syncesc_send (syncesc_send), // output
		.comreset_send (comreset_send), // output
		.comreset_send (comreset_send0), // output
		.syncesc_send_done (syncesc_send_done), // input
		.cominit_got (cominit_got), // input
		.set_offline (set_offline), // output
		@@ -834,6 +841,7 @@ wire[1:0] debug_get_fis_busy_r; // output[1:0]
		.serr_DB (serr_DB), // input
		.serr_DW (serr_DW), // input
		.serr_DI (serr_DI), // input
		.serr_EE (serr_EE), // input
		.serr_EP (serr_EP), // input
		.serr_EC (serr_EC), // input
		.serr_ET (serr_ET), // input

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