modified py393sata/ahci_fsm_sequence.py, rebuilt

.project

@@ -52,87 +52,87 @@
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 			<name>vivado_logs/VivadoBitstream.log</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoBitstream-20160311095400893.log</location>
+			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoBitstream-20160312151407716.log</location>
 		</link>
 		<link>
 			<name>vivado_logs/VivadoOpt.log</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoOpt-20160311095400893.log</location>
+			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoOpt-20160312151407716.log</location>
 		</link>
 		<link>
 			<name>vivado_logs/VivadoOptPhys.log</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoOptPhys-20160311095400893.log</location>
+			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoOptPhys-20160312151407716.log</location>
 		</link>
 		<link>
 			<name>vivado_logs/VivadoOptPower.log</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoOptPower-20160311095400893.log</location>
+			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoOptPower-20160312151407716.log</location>
 		</link>
 		<link>
 			<name>vivado_logs/VivadoPlace.log</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoPlace-20160311095400893.log</location>
+			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoPlace-20160312151407716.log</location>
 		</link>
 		<link>
 			<name>vivado_logs/VivadoRoute.log</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoRoute-20160311095400893.log</location>
+			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoRoute-20160312151407716.log</location>
 		</link>
 		<link>
 			<name>vivado_logs/VivadoSynthesis.log</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoSynthesis-20160311095237675.log</location>
+			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoSynthesis-20160312151407716.log</location>
 		</link>
 		<link>
 			<name>vivado_logs/VivadoTimimgSummaryReportImplemented.log</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoTimimgSummaryReportImplemented-20160311095400893.log</location>
+			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoTimimgSummaryReportImplemented-20160312151407716.log</location>
 		</link>
 		<link>
 			<name>vivado_logs/VivadoTimimgSummaryReportSynthesis.log</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoTimimgSummaryReportSynthesis-20160311095237675.log</location>
+			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoTimimgSummaryReportSynthesis-20160312151407716.log</location>
 		</link>
 		<link>
 			<name>vivado_logs/VivadoTimingReportImplemented.log</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoTimingReportImplemented-20160311095400893.log</location>
+			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoTimingReportImplemented-20160312151407716.log</location>
 		</link>
 		<link>
 			<name>vivado_logs/VivadoTimingReportSynthesis.log</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoTimingReportSynthesis-20160311095237675.log</location>
+			<location>/home/andrey/git/x393_sata/vivado_logs/VivadoTimingReportSynthesis-20160312151407716.log</location>
 		</link>
 		<link>
 			<name>vivado_state/x393_sata-opt-phys.dcp</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-opt-phys-20160311095400893.dcp</location>
+			<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-opt-phys-20160312151407716.dcp</location>
 		</link>
 		<link>
 			<name>vivado_state/x393_sata-opt-power.dcp</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-opt-power-20160311095400893.dcp</location>
+			<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-opt-power-20160312151407716.dcp</location>
 		</link>
 		<link>
 			<name>vivado_state/x393_sata-opt.dcp</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-opt-20160311095400893.dcp</location>
+			<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-opt-20160312151407716.dcp</location>
 		</link>
 		<link>
 			<name>vivado_state/x393_sata-place.dcp</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-place-20160311095400893.dcp</location>
+			<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-place-20160312151407716.dcp</location>
 		</link>
 		<link>
 			<name>vivado_state/x393_sata-route.dcp</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-route-20160311095400893.dcp</location>
+			<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-route-20160312151407716.dcp</location>
 		</link>
 		<link>
 			<name>vivado_state/x393_sata-synth.dcp</name>
 			<type>1</type>
-			<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-synth-20160311095237675.dcp</location>
+			<location>/home/andrey/git/x393_sata/vivado_state/x393_sata-synth-20160312151407716.dcp</location>
 		</link>
 	</linkedResources>
 </projectDescription>

generated/action_decoder.v

 /*******************************************************************************
  * Module: action_decoder
- * Date:2016-03-07  
- * Author: auto-generated file, see ahci_fsm_sequence.py
+ * Date:2016-03-12  
+ * Author: auto-generated file, see ahci_fsm_sequence_old.py
  * Description: Decode sequencer code to 1-hot actions
  *******************************************************************************/
 

generated/condition_mux.v

 /*******************************************************************************
  * Module: condition_mux
- * Date:2016-03-07  
- * Author: auto-generated file, see ahci_fsm_sequence.py
+ * Date:2016-03-12  
+ * Author: auto-generated file, see ahci_fsm_sequence_old.py
  * Description: Select condition
  *******************************************************************************/
 

includes/ahxi_fsm_code.vh

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+, .INITP_02 (256'h0000000000000000000000000000000000000000000000000000000082220822)

py393sata/.settings/org.eclipse.core.resources.prefs

 eclipse.preferences.version=1
+encoding/ahci_fsm_sequence.py=utf-8
 encoding/create_ahci_registers.py=utf-8
 encoding/x393sata.py=utf-8

py393sata/ahci_fsm_sequence.py

@@ -42,6 +42,7 @@ condition_mux_verilog_path=  '../generated/condition_mux.v'
 condition_mux_module_name=   'condition_mux'
 condition_mux_fanout =       8 
 code_rom_path=  '../includes/ahxi_fsm_code.vh'
+ahci_fsm_sequence_path=  '../generated/ahci_fsm_sequence.lst'
 #Set actions, conditions to empty string to rebuild list. Then edit order and put here
 actions = ['NOP',
     # CTRL_STAT
@@ -723,6 +724,7 @@ while ln < len(sequence):
     ln += 1
 
 labels = {}
+async_labels=set()
 jumps = set()
 for ln, line in enumerate(sequence):
     if LBL in line:
@@ -731,6 +733,8 @@ for ln, line in enumerate(sequence):
             print ("Duplicate label '%s': line #%d and line # %d"%(label, labels[label], ln))
         else:
             labels[label]=ln
+        if ADDR in line:
+            async_labels.add(label)    
     if GOTO in line:
         jumps.add(line[GOTO])
 
@@ -749,30 +753,55 @@ if not conditions:
         if IF in line:
             if not line[IF] in conditions:
                 conditions.append(line[IF])
-
+listing = []
+listing.append("Checking for undefined labels:")
 print ("Checking for undefined labels:")
 undef_jumps = []
 for label in jumps:
     if not label in labels:
         undef_jumps.append(label)
 if undef_jumps:
-    print ("Undefined jumps:")
+    listing.append("Undefined jumps:")
+    print         ("Undefined jumps:")
     for i,jump in enumerate(undef_jumps):
-        print("%d: '%s'"%(i,jump))
+        listing.append("%d: '%s'"%(i,jump))
+        print         ("%d: '%s'"%(i,jump))
 else:
-    print ("All jumps are to defined labels")
-    
-print ("Checking for unused labels:")
+    listing.append("All jumps are to the defined labels")
+    print         ("All jumps are to the defined labels")
+print         ("")
+listing.append("")
+
+print         ("Checking for unused labels:")
+listing.append("Checking for unused labels:")
 unused_labels = []
 for label in labels:
-    if not label in jumps:
+#    print("label=%s, labels[label] = %s"%(label, str(labels[label])))
+    if (not label in jumps) and (not label in async_labels):
         unused_labels.append(label)
 if unused_labels:
-    print ("Unused labels:")
+    print         ("Unused labels:")
+    listing.append("Unused labels:")
     for i,label in enumerate(unused_labels):
-        print("%d: '%s'"%(i,label))
+        print         ("%d: '%s'"%(i,label))
+        listing.append("%d: '%s'"%(i,label))
 else:
-    print ("All labels are used")
+    print          ("All labels are used")
+    listing.append ("All labels are used")
+print         ("")
+listing.append("")
+
+if async_labels:    
+    print         ("Asynchronous transitions labels:")
+    listing.append("Asynchronous transitions labels:")
+    async_entries={}
+    for label in async_labels:
+        async_entries[labels[label]] = label
+    for k in sorted(async_entries.keys()):
+        listing.append ("0x%03x: %s"%(k,async_entries[k]))
+    print         ("")
+    listing.append("")
+    
 wait_actions=[]
 fast_actions=[]
 for a in actions:
@@ -806,33 +835,28 @@ vals = bin_cnk (*conditions_cnk)
 for i, v in enumerate (conditions):
     condition_vals[v]= vals[i]
     
+listing.append ("Number of lines :  %d"%(len(sequence)))
+listing.append ("Number of labels : %d"%(len(labels)))
+listing.append ("Number of actions : %d"%(len(actions)))
+listing.append ("Number of conditions : %d"%(len(conditions)))
+
 print ("Number of lines :  %d"%(len(sequence)))
 print ("Number of labels : %d"%(len(labels)))
 print ("Number of actions : %d"%(len(actions)))
 print ("Number of conditions : %d"%(len(conditions)))
-#print ("\nActions:")
-#for i,a in enumerate(actions):
-#    print ("%02d: %s"%(i,a))
-print ("\nActions that do not wait for done (%d):"%(len(fast_actions)))
+
+listing.append ("\nActions that do not wait for done (%d):"%(len(fast_actions)))
 for i,a in enumerate(fast_actions):
-#    print ("%02d: %s"%(i,a))
-    print ("%s"%(a))
-print ("\nActions that wait for done (%d):"%(len(wait_actions)))
+    listing.append ("%s"%(a))
+listing.append ("\nActions that wait for done (%d):"%(len(wait_actions)))
 for i,a in enumerate(wait_actions):
-#    print ("%02d: %s"%(i,a))
-    print ("%s"%(a))
+    listing.append ("%s"%(a))
 
 
-print ("\nConditions(%d):"%(len(conditions)))
+listing.append ("\nConditions(%d):"%(len(conditions)))
 for i,c in enumerate(conditions):
-#    print ("%02d: %s"%(i,c))
-    print ("%s"%(c))
+    listing.append ("%s"%(c))
 
-#print ("action_vals=",   action_vals)    
-#print ("condition_vals=",condition_vals)    
-
-#for i, line in enumerate(sequence):
-#    print ("%03x: %s"%(i,line))
 
 if not action_decoder_verilog_path:
     action_decoder_verilog(actions, action_vals, action_decoder_module_name)
@@ -850,25 +874,22 @@ else:
 
 code = code_generator (sequence, action_vals, condition_vals, labels)
 
-#print_params(create_with_parity(code, 18, 0, False),os.path.abspath(os.path.join(os.path.dirname(__file__), code_rom_path)))
 print_params(create_with_parity(code, 18, False),os.path.abspath(os.path.join(os.path.dirname(__file__), code_rom_path)))
 print ("AHCI FSM code data is written to %s"%(os.path.abspath(os.path.join(os.path.dirname(__file__), code_rom_path))))
 
 
-#longest_label = max([len(labels[l]) for l in labels.keys()])
 longest_label = max([len(l) for l in labels])
 longest_act =   max([len(act) for act in actions])
 longest_cond =  max([len(cond) for cond in conditions])
 format_act = "%%%ds do %%s%%s"%(longest_label+1) 
 format_cond = "%%%ds %%%ds goto %%s"%(longest_label+1, longest_cond+3)
-#print ("format_act=", format_act) 
-#print ("format_cond=",format_cond) 
-print ("\n code:")
+listing.append ("\n code:")
 for a,c in enumerate(code):
     l = sequence[a]
     if LBL in l:
-        print()
-    print ("%03x: %05x #"%(a,c),end = "")
+        listing.append("")
+#    listing.append ("%03x: %05x #"%(a,c),end = "")
+    line_start="%03x: %05x #"%(a,c)
     if (ACT in l) or (LBL in l):
         try:
             lbl = l[LBL]+":"
@@ -882,15 +903,19 @@ for a,c in enumerate(code):
         if act.endswith('*'):
             wait = ", WAIT DONE"
             act = act[0:-1]
-        print(format_act%(lbl,act,wait))    
+        listing.append(line_start+(format_act%(lbl,act,wait)))    
     else:
         try:
             cond = "if "+l[IF]
         except:
             cond = "always"
         cond += ' '*(longest_cond+3-len(cond))    
-        print(format_cond%("",cond,l[GOTO]))    
-#    print ("%03x: %05x # %s"%(a,c,str(sequence[a])))
+        listing.append(line_start+(format_cond%("",cond,l[GOTO])))
+            
+with open(os.path.abspath(os.path.join(os.path.dirname(__file__), ahci_fsm_sequence_path)),"w") as lst_file:
+    print ("This file is auto-generated by %s\n\n"%(os.path.basename(__file__)), file=lst_file)
+    for l in listing:
+        print(l,file=lst_file)
 
-#condition_mux_verilog(conditions, condition_vals, 'condition_mux',100, file=None)
+print ("AHCI FSM listing is written to %s"%(os.path.abspath(os.path.join(os.path.dirname(__file__), ahci_fsm_sequence_path))))
             
\ No newline at end of file

system_defines.vh

@@ -7,7 +7,7 @@
   `define USE_DATASCOPE
 //  `define DATASCOPE_INCOMING_RAW
   `define PRELOAD_BRAMS
-  `define AHCI_SATA 1
+//  `define AHCI_SATA 1
   `define DEBUG_ELASTIC  
 // Enviroment-dependent options
   `ifdef IVERILOG

tb/tb_ahci.tf

@@ -72,8 +72,8 @@ reg  [31:0] TESTBENCH_DATA;
 reg  [11:0] TESTBENCH_ID;
 
 reg [639:0] DEVICE_TITLE = 'bz; // to show human-readable state in the GTKWave
-reg  [31:0] DEVICE_DATA;
-reg  [11:0] Device_ID;
+///reg  [31:0] DEVICE_DATA;
+///reg  [11:0] Device_ID;
 
 initial #1 $display("HI THERE");
 initial

top.v

@@ -40,7 +40,7 @@
 `include "system_defines.vh" 
 
 module top #(
-`include "includes/x393_parameters.vh" // SuppressThisWarning VEditor - partially used
+//`include "includes/x393_parameters.vh" // SuppressThisWarning VEditor - partially used
 )
 (
 // sata serial data iface
@@ -164,11 +164,7 @@ axi_hp_clk #(
     .clk_axihp    (hclk), // output
     .locked_axihp () // output // not controlled?
 );
-`ifdef AHCI_SATA
 sata_ahci_top sata_top(
-`else
-sata_top sata_top(
-`endif
     .sata_clk                   (sclk),
     // reliable clock to source drp and cpll lock det circuits
     .reliable_clk               (axi_aclk0),