Commit f8db6dd0 authored by Andrey Filippov's avatar Andrey Filippov

made compressor stop clean, bitstream version 0x039300cd

parent 87900556
This diff is collapsed.
...@@ -35,7 +35,8 @@ ...@@ -35,7 +35,8 @@
* contains all the components and scripts required to completely simulate it * contains all the components and scripts required to completely simulate it
* with at least one of the Free Software programs. * with at least one of the Free Software programs.
*/ */
parameter FPGA_VERSION = 32'h039300cc; //parallel - more jpeg tail -0.268/56, 80.24 % parameter FPGA_VERSION = 32'h039300cd; //parallel - making stop compression clean -0.048/8, 79.50
// parameter FPGA_VERSION = 32'h039300cc; //parallel - more jpeg tail -0.268/56, 80.24 %
// parameter FPGA_VERSION = 32'h039300cb; //parallel - modifying trigger/timestamps -0.050/13 80.38% // parameter FPGA_VERSION = 32'h039300cb; //parallel - modifying trigger/timestamps -0.050/13 80.38%
// parameter FPGA_VERSION = 32'h039300ca; //parallel - and more ... fixed -0.267/46, 80.42% // parameter FPGA_VERSION = 32'h039300ca; //parallel - and more ... fixed -0.267/46, 80.42%
// parameter FPGA_VERSION = 32'h039300c9; //parallel - trying more ...-0.123/32 79.82% // parameter FPGA_VERSION = 32'h039300c9; //parallel - trying more ...-0.123/32 79.82%
......
...@@ -266,6 +266,7 @@ module mcntrl_linear_rw #( ...@@ -266,6 +266,7 @@ module mcntrl_linear_rw #(
wire set_start_delay_w; wire set_start_delay_w;
reg buf_reset_pend; // reset buffer page at next (late)frame sync (compressor should be disabled reg buf_reset_pend; // reset buffer page at next (late)frame sync (compressor should be disabled
// if total number of pages in a frame is not multiple of 4 // if total number of pages in a frame is not multiple of 4
wire chn_dis_delayed = chn_rst || (!chn_en && !busy_r); // reset if real reset or disabled and frame finished
// wire // wire
...@@ -399,6 +400,7 @@ module mcntrl_linear_rw #( ...@@ -399,6 +400,7 @@ module mcntrl_linear_rw #(
// accelerating pre_want: // accelerating pre_want:
// assign pre_want= pre_want_r1 && !want_r && !xfer_start_r[0] && !suspend ; // assign pre_want= pre_want_r1 && !want_r && !xfer_start_r[0] && !suspend ;
// last_block was too late to inclusde in pre_want_r1, moving it here // last_block was too late to inclusde in pre_want_r1, moving it here
assign pre_want= pre_want_r1 && !want_r && !xfer_start_r[0] && !suspend && !last_block && !aborting_r; assign pre_want= pre_want_r1 && !want_r && !xfer_start_r[0] && !suspend && !last_block && !aborting_r;
assign last_in_row_w=(row_left=={{(FRAME_WIDTH_BITS-NUM_XFER_BITS){1'b0}},xfer_num128_r}); assign last_in_row_w=(row_left=={{(FRAME_WIDTH_BITS-NUM_XFER_BITS){1'b0}},xfer_num128_r});
...@@ -549,7 +551,8 @@ wire start_not_partial= xfer_start_r[0] && !xfer_limited_by_mem_page_r; ...@@ -549,7 +551,8 @@ wire start_not_partial= xfer_start_r[0] && !xfer_limited_by_mem_page_r;
// pre_want_r1 <= chn_en && !frame_done_r && busy_r && par_mod_r[PAR_MOD_LATENCY-2] && !(|frame_start_r[4:1]) && !last_block; // pre_want_r1 <= chn_en && !frame_done_r && busy_r && par_mod_r[PAR_MOD_LATENCY-2] && !(|frame_start_r[4:1]) && !last_block;
//last_block is too late for pre_want_r1, moving upsteram //last_block is too late for pre_want_r1, moving upsteram
pre_want_r1 <= chn_en && !frame_done_r && busy_r && par_mod_r[PAR_MOD_LATENCY-2] && !(|frame_start_r[4:1]); // pre_want_r1 <= chn_en && !frame_done_r && busy_r && par_mod_r[PAR_MOD_LATENCY-2] && !(|frame_start_r[4:1]);
pre_want_r1 <= !chn_rst && !frame_done_r && busy_r && par_mod_r[PAR_MOD_LATENCY-2] && !(|frame_start_r[4:1]);
if (mrst) par_mod_r<=0; if (mrst) par_mod_r<=0;
else if (pgm_param_w || else if (pgm_param_w ||
xfer_start_r[0] || xfer_start_r[0] ||
...@@ -635,7 +638,7 @@ wire start_not_partial= xfer_start_r[0] && !xfer_limited_by_mem_page_r; ...@@ -635,7 +638,7 @@ wire start_not_partial= xfer_start_r[0] && !xfer_limited_by_mem_page_r;
if (recalc_r[0]) line_unfinished_relw_r <= curr_y + (cmd_wrmem ? 0: 1); if (recalc_r[0]) line_unfinished_relw_r <= curr_y + (cmd_wrmem ? 0: 1);
// if (mrst || (frame_start_late || !chn_en)) line_unfinished_r <= {FRAME_HEIGHT_BITS{~cmd_wrmem}}; // lowest/highest value until valid // if (mrst || (frame_start_late || !chn_en)) line_unfinished_r <= {FRAME_HEIGHT_BITS{~cmd_wrmem}}; // lowest/highest value until valid
if (mrst || (frame_start_mod || !chn_en)) line_unfinished_r <= {FRAME_HEIGHT_BITS{~cmd_wrmem}}; // lowest/highest value until valid if (mrst || (frame_start_mod || chn_dis_delayed)) line_unfinished_r <= {FRAME_HEIGHT_BITS{~cmd_wrmem}}; // lowest/highest value until valid
else if (recalc_r[2]) line_unfinished_r <= line_unfinished_relw_r + window_y0; else if (recalc_r[2]) line_unfinished_r <= line_unfinished_relw_r + window_y0;
......
...@@ -283,6 +283,7 @@ module mcntrl_tiled_rw#( ...@@ -283,6 +283,7 @@ module mcntrl_tiled_rw#(
reg buf_reset_pend; // reset buffer page at next (late)frame sync (compressor should be disabled reg buf_reset_pend; // reset buffer page at next (late)frame sync (compressor should be disabled
// if total number of pages in a frame is not multiple of 4 // if total number of pages in a frame is not multiple of 4
reg frames_in_sync_r; reg frames_in_sync_r;
wire chn_dis_delayed = chn_rst || (!chn_en && !busy_r); // reset if real reset or disabled and frame finished
assign frames_in_sync = frames_in_sync_r; assign frames_in_sync = frames_in_sync_r;
assign frame_number = frame_number_current; assign frame_number = frame_number_current;
...@@ -349,7 +350,8 @@ module mcntrl_tiled_rw#( ...@@ -349,7 +350,8 @@ module mcntrl_tiled_rw#(
// after channel was disabled frame number reported is incorrect, until updated by master_set // after channel was disabled frame number reported is incorrect, until updated by master_set
// Without this signal compressor was reading data between the time source frame number was updated and this one. // Without this signal compressor was reading data between the time source frame number was updated and this one.
if (!chn_en) frames_in_sync_r <= 0; // if (!chn_en) frames_in_sync_r <= 0;
if (chn_dis_delayed) frames_in_sync_r <= 0; // do not invalidate frames_in_sync_r until busy_r is off
// else if (frame_start_r[2]) frames_in_sync_r <= 1; // else if (frame_start_r[2]) frames_in_sync_r <= 1;
else if (frame_start_r[3]) frames_in_sync_r <= 1; // to match line_unfinished else if (frame_start_r[3]) frames_in_sync_r <= 1; // to match line_unfinished
...@@ -420,7 +422,8 @@ module mcntrl_tiled_rw#( ...@@ -420,7 +422,8 @@ module mcntrl_tiled_rw#(
assign calc_valid= par_mod_r[PAR_MOD_LATENCY-1]; // MSB, longest 0 assign calc_valid= par_mod_r[PAR_MOD_LATENCY-1]; // MSB, longest 0
assign frame_done= frame_done_r; assign frame_done= frame_done_r;
assign frame_finished= frame_finished_r; assign frame_finished= frame_finished_r;
assign pre_want= chn_en && busy_r && !want_r && !xfer_start_r[0] && calc_valid && !last_block && !suspend && !(|frame_start_r) && !aborting_r; // assign pre_want= chn_en && busy_r && !want_r && !xfer_start_r[0] && calc_valid && !last_block && !suspend && !(|frame_start_r) && !aborting_r;
assign pre_want= !chn_rst && busy_r && !want_r && !xfer_start_r[0] && calc_valid && !last_block && !suspend && !(|frame_start_r) && !aborting_r;
assign last_in_row_w=(row_left=={{(FRAME_WIDTH_BITS-MAX_TILE_WIDTH){1'b0}},num_cols_r}); // what if it crosses page? OK, num_cols_r & row_left know that assign last_in_row_w=(row_left=={{(FRAME_WIDTH_BITS-MAX_TILE_WIDTH){1'b0}},num_cols_r}); // what if it crosses page? OK, num_cols_r & row_left know that
// tiles must completely fit window // tiles must completely fit window
// all window should be covered (tiles may extend): // all window should be covered (tiles may extend):
...@@ -640,7 +643,7 @@ wire start_not_partial= xfer_start_r[0] && !xfer_limited_by_mem_page_r; ...@@ -640,7 +643,7 @@ wire start_not_partial= xfer_start_r[0] && !xfer_limited_by_mem_page_r;
*/ */
if (recalc_r[0]) line_unfinished_relw_r <= curr_y + (cmd_wrmem ? 0: tile_rows); if (recalc_r[0]) line_unfinished_relw_r <= curr_y + (cmd_wrmem ? 0: tile_rows);
if (mrst || (frame_start_mod || !chn_en)) line_unfinished_r <= {FRAME_HEIGHT_BITS{~cmd_wrmem}}; // lowest/highest value until valid if (mrst || (frame_start_mod || chn_dis_delayed)) line_unfinished_r <= {FRAME_HEIGHT_BITS{~cmd_wrmem}}; // lowest/highest value until valid
else if (recalc_r[2]) line_unfinished_r <= line_unfinished_relw_r + window_y0; else if (recalc_r[2]) line_unfinished_r <= line_unfinished_relw_r + window_y0;
end end
......
...@@ -2891,6 +2891,151 @@ set_sensor_lens_flat_parameters 2 0 None None None None None 0x1d00 0x1d00 0x ...@@ -2891,6 +2891,151 @@ set_sensor_lens_flat_parameters 2 0 None None None None None 0x1d00 0x1d00 0x
set_sensor_lens_flat_parameters 3 0 None None None None None 0x1d00 0x1d00 0x1d00 0x1d00 set_sensor_lens_flat_parameters 3 0 None None None None None 0x1d00 0x1d00 0x1d00 0x1d00
jpeg_sim_multi 4 jpeg_sim_multi 4
################## Simulate Parallel 17 - free running, aborted frame ####################
./py393/test_mcntrl.py @py393/cocoargs --simulated=localhost:7777
measure_all "*DI"
setup_all_sensors True None 0xf
#Setting ARO for free run mode?
set_sensor_io_ctl all None None 1 # Set ARO low - check if it is still needed?
#use EOF instead of SOF for i2c sequencer advance
set_sensor_i2c_command all False None None None None None None True
#just testing
set_gpio_ports 1 1 # enable software gpio pins and porta (camsync)
set_gpio_pins 0 1 # pin 0 low, pin 1 - high
set_logger_params_file "/home/eyesis/git/x393-neon/attic/imu_config.bin"
##### write_control_register 0x480 0x400 # disable sensor chn 2
reset_camsync_inout 1 # reset all outputs
set_camsync_period 31 # set bit duration
set_camsync_period 0 # disable
set_camsync_delay 0 400
set_camsync_delay 1 100
set_camsync_delay 2 200
set_camsync_delay 3 300
#set_camsync_inout <is_out> <bit_number> <active_positive>
###set_camsync_inout 1 8 0
###set_camsync_inout 0 7 0
reset_camsync_inout 0 # start with internal trigger
#set_camsync_mode <en=None> <en_snd=None> <en_ts_external=None> <triggered_mode=None> <master_chn=None> <chn_en=None>
#### set_camsync_mode 1 1 1 1 0 0xf # keep
set_camsync_mode 1 1 1 0 0 0xf # keep free running mode, do not switch to triggered
set_camsync_period 0 # so next setting period will immadiately trigger
set_camsync_period 8000 # 80 usec #and issue first trigger
set_sensor_histogram_window 0 0 4 4 25 21
set_sensor_histogram_window 1 0 4 4 41 21
set_sensor_histogram_window 2 0 4 4 25 41
set_sensor_histogram_window 3 0 4 4 41 41
r
read_control_register 0x430
read_control_register 0x431
write_cmd_frame_sequencer 0 1 2 0x600 0x48 # compressor q page = 1 // too late for frame 2
set_qtables 0 0 80
set_qtables 0 1 70
#irq coming, image not changing - yes
write_cmd_frame_sequencer 0 1 1 0x686 0x280005 #save 4 more lines than sensor has
write_cmd_frame_sequencer 0 1 1 0x680 0x5507 #enable abort
#write_cmd_frame_sequencer 0 1 1 0x6c6 0x300006 #save 4 more lines that compressor has
write_cmd_frame_sequencer 0 1 2 0x600 0x5 #stop compressor `
write_cmd_frame_sequencer 0 1 2 0x680 0x5405 # stop sensor memory (+0) // sensor memory should be controlled first, (9 commands
write_cmd_frame_sequencer 0 1 2 0x6c0 0x5c49 # stop compressor memory (+0)
write_cmd_frame_sequencer 0 1 3 0x686 0x240005 # correct lines
write_cmd_frame_sequencer 0 1 3 0x680 0x5507 # run sensor memory (+1) Can not be 0
write_cmd_frame_sequencer 0 1 4 0x686 0x280005 #save 4 more lines than sensor has
write_cmd_frame_sequencer 0 1 4 0x6c6 0x300006 #save more lines than compressor needs (sensor provides)
write_cmd_frame_sequencer 0 1 4 0x6c0 0x7d4b # run compressor memory (+2)
write_cmd_frame_sequencer 0 1 4 0x600 0x7 # run compressor (+0)
write_cmd_frame_sequencer 0 1 1 0x600 0x48 # compressor q page = 1
write_cmd_frame_sequencer 0 1 4 0x600 0x40 # compressor q page = 0
read_control_register 0x431
read_control_register 0x430
#testing histograms
write_control_register 0x409 0xc0
#set_sensor_io_dly_hispi all 0x48 0x68 0x68 0x68 0x68
#set_sensor_io_ctl all None None None None None 1 None # load all delays?
compressor_control all None None None None None 2
compressor_interrupt_control all clr
compressor_interrupt_control all en
compressor_control all 3
r
read_status 0x21
r
#set_sensor_lens_flat_parameters <num_sensor> <num_sub_sensor> <AX=None> <AY=None> <BX=None> <BY=None> <C=None> <scales0=None> <scales1=None> <scales2=None> <scales3=None> <fatzero_in=None> <fatzero_out=None> <post_scale=None>
set_sensor_lens_flat_parameters 0 0 None None None None None 0x6000 0x6000 0x6000 0x6000
set_sensor_lens_flat_parameters 1 0 None None None None None 0x6000 0x6000 0x6000 0x6000
set_sensor_lens_flat_parameters 2 0 None None None None None 0x6000 0x6000 0x6000 0x6000
set_sensor_lens_flat_parameters 3 0 None None None None None 0x6000 0x6000 0x6000 0x6000
jpeg_sim_multi 4
set_sensor_lens_flat_parameters 0 0 None None None None None 0x4000 0x4000 0x4000 0x4000
set_sensor_lens_flat_parameters 1 0 None None None None None 0x4000 0x4000 0x4000 0x4000
set_sensor_lens_flat_parameters 2 0 None None None None None 0x4000 0x4000 0x4000 0x4000
set_sensor_lens_flat_parameters 3 0 None None None None None 0x4000 0x4000 0x4000 0x4000
#just a delay
jpeg_sim_multi 1 0xf0 100 46000 #should fail
#control_compressor_memory <num_sensor> <command> <reset_frame=False> <copy_frame=False> <abort_late=False> <verbose=1>
control_compressor_memory 1 "stop"
control_compressor_memory 2 "stop"
#compressor_control <chn> <run_mode=None> <qbank=None> <dc_sub=None> <cmode=None> <multi_frame=None> <bayer=None> <focus_mode=None>
compressor_control 2 1 # supposed to just stop
compressor_control 3 1 # supposed to just stop
jpeg_sim_multi 2 # just channel 0 (and 3)?
jpeg_sim_multi 1 0xf0 100 46000 #should fail
control_compressor_memory 1 "repetitive"
control_compressor_memory 2 "repetitive"
compressor_control 2 3 # repetitive
compressor_control 3 3 # repetitive
jpeg_sim_multi 4
set_sensor_lens_flat_parameters 0 0 None None None None None 0x3000 0x3000 0x3000 0x3000
set_sensor_lens_flat_parameters 1 0 None None None None None 0x3000 0x3000 0x3000 0x3000
set_sensor_lens_flat_parameters 2 0 None None None None None 0x3000 0x3000 0x3000 0x3000
set_sensor_lens_flat_parameters 3 0 None None None None None 0x3000 0x3000 0x3000 0x3000
jpeg_sim_multi 4
set_sensor_lens_flat_parameters 0 0 None None None None None 0x2000 0x2000 0x2000 0x2000
set_sensor_lens_flat_parameters 1 0 None None None None None 0x2000 0x2000 0x2000 0x2000
set_sensor_lens_flat_parameters 2 0 None None None None None 0x2000 0x2000 0x2000 0x2000
set_sensor_lens_flat_parameters 3 0 None None None None None 0x2000 0x2000 0x2000 0x2000
jpeg_sim_multi 4
set_sensor_lens_flat_parameters 0 0 None None None None None 0x1e00 0x1e00 0x1e00 0x1e00
set_sensor_lens_flat_parameters 1 0 None None None None None 0x1e00 0x1e00 0x1e00 0x1e00
set_sensor_lens_flat_parameters 2 0 None None None None None 0x1e00 0x1e00 0x1e00 0x1e00
set_sensor_lens_flat_parameters 3 0 None None None None None 0x1e00 0x1e00 0x1e00 0x1e00
jpeg_sim_multi 4
set_sensor_lens_flat_parameters 0 0 None None None None None 0x1d00 0x1d00 0x1d00 0x1d00
set_sensor_lens_flat_parameters 1 0 None None None None None 0x1d00 0x1d00 0x1d00 0x1d00
set_sensor_lens_flat_parameters 2 0 None None None None None 0x1d00 0x1d00 0x1d00 0x1d00
set_sensor_lens_flat_parameters 3 0 None None None None None 0x1d00 0x1d00 0x1d00 0x1d00
jpeg_sim_multi 4
################## Serial #################### ################## Serial ####################
cd /usr/local/verilog/; test_mcntrl.py @hargs cd /usr/local/verilog/; test_mcntrl.py @hargs
bitstream_set_path /usr/local/verilog/x393_hispi.bit bitstream_set_path /usr/local/verilog/x393_hispi.bit
......
...@@ -71,8 +71,8 @@ def func_encode_mode_scan_tiled (skip_too_late = False, ...@@ -71,8 +71,8 @@ def func_encode_mode_scan_tiled (skip_too_late = False,
@param abort_late abort frame r/w at the next frame sync, if not finished. Wait for pending memory transfers @param abort_late abort frame r/w at the next frame sync, if not finished. Wait for pending memory transfers
""" """
rslt = 0; rslt = 0;
rslt |= (1,0)[chn_reset] << vrlg.MCONTR_LINTILE_EN # inverted rslt |= (1,0)[chn_reset] << vrlg.MCONTR_LINTILE_NRESET # inverted
rslt |= (0,1)[enable] << vrlg.MCONTR_LINTILE_NRESET rslt |= (0,1)[enable] << vrlg.MCONTR_LINTILE_EN
rslt |= (0,1)[write_mem] << vrlg.MCONTR_LINTILE_WRITE rslt |= (0,1)[write_mem] << vrlg.MCONTR_LINTILE_WRITE
rslt |= (extra_pages & ((1 << vrlg.MCONTR_LINTILE_EXTRAPG_BITS) - 1)) << vrlg.MCONTR_LINTILE_EXTRAPG rslt |= (extra_pages & ((1 << vrlg.MCONTR_LINTILE_EXTRAPG_BITS) - 1)) << vrlg.MCONTR_LINTILE_EXTRAPG
rslt |= (0,1)[keep_open] << vrlg.MCONTR_LINTILE_KEEP_OPEN rslt |= (0,1)[keep_open] << vrlg.MCONTR_LINTILE_KEEP_OPEN
......
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