Loading memctrl/cmd_encod_linear_mux.v +39 −18 Original line number Original line Diff line number Diff line Loading @@ -32,6 +32,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row0, // memory row input [ADDRESS_NUMBER-1:0] row0, // memory row input [COLADDR_NUMBER-4:0] start_col0, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col0, // start memory column in 8-bursts input [5:0] num128_0, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_0, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial0, // first of the two halves of a split tile (caused by memory page crossing) input start0, // start generating commands input start0, // start generating commands `endif `endif `ifdef def_scanline_chn1 `ifdef def_scanline_chn1 Loading @@ -39,6 +40,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row1, // memory row input [ADDRESS_NUMBER-1:0] row1, // memory row input [COLADDR_NUMBER-4:0] start_col1, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col1, // start memory column in 8-bursts input [5:0] num128_1, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_1, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial1, // first of the two halves of a split tile (caused by memory page crossing) input start1, // start generating commands input start1, // start generating commands `endif `endif `ifdef def_scanline_chn2 `ifdef def_scanline_chn2 Loading @@ -46,6 +48,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row2, // memory row input [ADDRESS_NUMBER-1:0] row2, // memory row input [COLADDR_NUMBER-4:0] start_col2, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col2, // start memory column in 8-bursts input [5:0] num128_2, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_2, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial2, // first of the two halves of a split tile (caused by memory page crossing) input start2, // start generating commands input start2, // start generating commands `endif `endif `ifdef def_scanline_chn3 `ifdef def_scanline_chn3 Loading @@ -53,6 +56,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row3, // memory row input [ADDRESS_NUMBER-1:0] row3, // memory row input [COLADDR_NUMBER-4:0] start_col3, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col3, // start memory column in 8-bursts input [5:0] num128_3, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_3, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial3, // first of the two halves of a split tile (caused by memory page crossing) input start3, // start generating commands input start3, // start generating commands `endif `endif `ifdef def_scanline_chn4 `ifdef def_scanline_chn4 Loading @@ -60,6 +64,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row4, // memory row input [ADDRESS_NUMBER-1:0] row4, // memory row input [COLADDR_NUMBER-4:0] start_col4, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col4, // start memory column in 8-bursts input [5:0] num128_4, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_4, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial4, // first of the two halves of a split tile (caused by memory page crossing) input start4, // start generating commands input start4, // start generating commands `endif `endif Loading @@ -68,6 +73,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row5, // memory row input [ADDRESS_NUMBER-1:0] row5, // memory row input [COLADDR_NUMBER-4:0] start_col5, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col5, // start memory column in 8-bursts input [5:0] num128_5, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_5, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial5, // first of the two halves of a split tile (caused by memory page crossing) input start5, // start generating commands input start5, // start generating commands `endif `endif Loading @@ -76,6 +82,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row6, // memory row input [ADDRESS_NUMBER-1:0] row6, // memory row input [COLADDR_NUMBER-4:0] start_col6, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col6, // start memory column in 8-bursts input [5:0] num128_6, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_6, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial6, // first of the two halves of a split tile (caused by memory page crossing) input start6, // start generating commands input start6, // start generating commands `endif `endif `ifdef def_scanline_chn7 `ifdef def_scanline_chn7 Loading @@ -83,6 +90,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row7, // memory row input [ADDRESS_NUMBER-1:0] row7, // memory row input [COLADDR_NUMBER-4:0] start_col7, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col7, // start memory column in 8-bursts input [5:0] num128_7, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_7, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial7, // first of the two halves of a split tile (caused by memory page crossing) input start7, // start generating commands input start7, // start generating commands `endif `endif `ifdef def_scanline_chn8 `ifdef def_scanline_chn8 Loading @@ -90,6 +98,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row8, // memory row input [ADDRESS_NUMBER-1:0] row8, // memory row input [COLADDR_NUMBER-4:0] start_col8, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col8, // start memory column in 8-bursts input [5:0] num128_8, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_8, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial8, // first of the two halves of a split tile (caused by memory page crossing) input start8, // start generating commands input start8, // start generating commands `endif `endif `ifdef def_scanline_chn9 `ifdef def_scanline_chn9 Loading @@ -97,6 +106,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row9, // memory row input [ADDRESS_NUMBER-1:0] row9, // memory row input [COLADDR_NUMBER-4:0] start_col9, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col9, // start memory column in 8-bursts input [5:0] num128_9, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_9, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial9, // first of the two halves of a split tile (caused by memory page crossing) input start9, // start generating commands input start9, // start generating commands `endif `endif `ifdef def_scanline_chn10 `ifdef def_scanline_chn10 Loading @@ -104,6 +114,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row10, // memory row input [ADDRESS_NUMBER-1:0] row10, // memory row input [COLADDR_NUMBER-4:0] start_col10, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col10, // start memory column in 8-bursts input [5:0] num128_10, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_10, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial10, // first of the two halves of a split tile (caused by memory page crossing) input start10, // start generating commands input start10, // start generating commands `endif `endif `ifdef def_scanline_chn11 `ifdef def_scanline_chn11 Loading @@ -111,6 +122,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row11, // memory row input [ADDRESS_NUMBER-1:0] row11, // memory row input [COLADDR_NUMBER-4:0] start_col11, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col11, // start memory column in 8-bursts input [5:0] num128_11, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_11, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial11, // first of the two halves of a split tile (caused by memory page crossing) input start11, // start generating commands input start11, // start generating commands `endif `endif `ifdef def_scanline_chn12 `ifdef def_scanline_chn12 Loading @@ -118,6 +130,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row12, // memory row input [ADDRESS_NUMBER-1:0] row12, // memory row input [COLADDR_NUMBER-4:0] start_col12, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col12, // start memory column in 8-bursts input [5:0] num128_12, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_12, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial12, // first of the two halves of a split tile (caused by memory page crossing) input start12, // start generating commands input start12, // start generating commands `endif `endif `ifdef def_scanline_chn13 `ifdef def_scanline_chn13 Loading @@ -125,6 +138,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row13, // memory row input [ADDRESS_NUMBER-1:0] row13, // memory row input [COLADDR_NUMBER-4:0] start_col13, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col13, // start memory column in 8-bursts input [5:0] num128_13, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_13, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial13, // first of the two halves of a split tile (caused by memory page crossing) input start13, // start generating commands input start13, // start generating commands `endif `endif `ifdef def_scanline_chn14 `ifdef def_scanline_chn14 Loading @@ -132,6 +146,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row14, // memory row input [ADDRESS_NUMBER-1:0] row14, // memory row input [COLADDR_NUMBER-4:0] start_col14, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col14, // start memory column in 8-bursts input [5:0] num128_14, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_14, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial14, // first of the two halves of a split tile (caused by memory page crossing) input start14, // start generating commands input start14, // start generating commands `endif `endif `ifdef def_scanline_chn15 `ifdef def_scanline_chn15 Loading @@ -139,12 +154,14 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row15, // memory row input [ADDRESS_NUMBER-1:0] row15, // memory row input [COLADDR_NUMBER-4:0] start_col15, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col15, // start memory column in 8-bursts input [5:0] num128_15, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_15, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial15, // first of the two halves of a split tile (caused by memory page crossing) input start15, // start generating commands input start15, // start generating commands `endif `endif output [2:0] bank, // bank address output [2:0] bank, // bank address output [ADDRESS_NUMBER-1:0] row, // memory row output [ADDRESS_NUMBER-1:0] row, // memory row output [COLADDR_NUMBER-4:0] start_col, // start memory column in 8-bursts output [COLADDR_NUMBER-4:0] start_col, // start memory column in 8-bursts output [5:0] num128, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) output [5:0] num128, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) output partial, // first of the two halves of a split tile (caused by memory page crossing) output start_rd, // start generating commands in cmd_encod_linear_rd output start_rd, // start generating commands in cmd_encod_linear_rd output start_wr // start generating commands in cmd_encod_linear_wr output start_wr // start generating commands in cmd_encod_linear_wr ); ); Loading @@ -152,6 +169,7 @@ module cmd_encod_linear_mux#( reg [ADDRESS_NUMBER-1:0] row_r; // memory row reg [ADDRESS_NUMBER-1:0] row_r; // memory row reg [COLADDR_NUMBER-4:0] start_col_r;// start memory column in 8-bursts reg [COLADDR_NUMBER-4:0] start_col_r;// start memory column in 8-bursts reg [5:0] num128_r; // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) reg [5:0] num128_r; // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) reg partial_r; reg start_rd_r; // start generating commands reg start_rd_r; // start generating commands reg start_wr_r; // start generating commands reg start_wr_r; // start generating commands Loading @@ -159,15 +177,17 @@ module cmd_encod_linear_mux#( wire [ADDRESS_NUMBER-1:0] row_w; // memory row wire [ADDRESS_NUMBER-1:0] row_w; // memory row wire [COLADDR_NUMBER-4:0] start_col_w;// start memory column in 8-bursts wire [COLADDR_NUMBER-4:0] start_col_w;// start memory column in 8-bursts wire [5:0] num128_w; // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) wire [5:0] num128_w; // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) wire partial_w; wire start_rd_w; // start generating commands wire start_rd_w; // start generating commands wire start_wr_w; // start generating commands wire start_wr_w; // start generating commands localparam PAR_WIDTH=3+ADDRESS_NUMBER+COLADDR_NUMBER-3+6+2; localparam PAR_WIDTH=3+ADDRESS_NUMBER+COLADDR_NUMBER-3+6+2+1; localparam [PAR_WIDTH-1:0] PAR_DEFAULT=0; localparam [PAR_WIDTH-1:0] PAR_DEFAULT=0; assign bank = bank_r; assign bank = bank_r; assign row = row_r; assign row = row_r; assign start_col = start_col_r; assign start_col = start_col_r; assign num128 = num128_r; assign num128 = num128_r; assign partial= partial_r; assign start_rd = start_rd_r; assign start_rd = start_rd_r; assign start_wr = start_wr_r; assign start_wr = start_wr_r; localparam [15:0] CHN_RD_MEM={ localparam [15:0] CHN_RD_MEM={ Loading Loading @@ -253,54 +273,54 @@ module cmd_encod_linear_mux#( `endif `endif assign {bank_w, row_w, start_col_w, num128_w, start_rd_w, start_wr_w} = 0 assign {bank_w, row_w, start_col_w, num128_w, partial_w, start_rd_w, start_wr_w} = 0 `ifdef def_scanline_chn0 `ifdef def_scanline_chn0 | (start0?{bank0, row0, start_col0, num128_0,CHN_RD_MEM[0],~CHN_RD_MEM[0]}:PAR_DEFAULT) | (start0?{bank0, row0, start_col0, num128_0, partial0, CHN_RD_MEM[0],~CHN_RD_MEM[0]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn1 `ifdef def_scanline_chn1 | (start1?{bank1, row1, start_col1, num128_1,CHN_RD_MEM[1],~CHN_RD_MEM[1]}:PAR_DEFAULT) | (start1?{bank1, row1, start_col1, num128_1, partial1, CHN_RD_MEM[1],~CHN_RD_MEM[1]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn2 `ifdef def_scanline_chn2 | (start2?{bank2, row2, start_col2, num128_2,CHN_RD_MEM[2],~CHN_RD_MEM[2]}:PAR_DEFAULT) | (start2?{bank2, row2, start_col2, num128_2, partial2, CHN_RD_MEM[2],~CHN_RD_MEM[2]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn3 `ifdef def_scanline_chn3 | (start3?{bank3, row3, start_col3, num128_3,CHN_RD_MEM[3],~CHN_RD_MEM[3]}:PAR_DEFAULT) | (start3?{bank3, row3, start_col3, num128_3, partial3, CHN_RD_MEM[3],~CHN_RD_MEM[3]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn4 `ifdef def_scanline_chn4 | (start4?{bank4, row4, start_col4, num128_4,CHN_RD_MEM[4],~CHN_RD_MEM[4]}:PAR_DEFAULT) | (start4?{bank4, row4, start_col4, num128_4, partial4, CHN_RD_MEM[4],~CHN_RD_MEM[4]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn5 `ifdef def_scanline_chn5 | (start5?{bank5, row5, start_col5, num128_5,CHN_RD_MEM[5],~CHN_RD_MEM[5]}:PAR_DEFAULT) | (start5?{bank5, row5, start_col5, num128_5, partial5, CHN_RD_MEM[5],~CHN_RD_MEM[5]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn6 `ifdef def_scanline_chn6 | (start6?{bank6, row6, start_col6, num128_6,CHN_RD_MEM[6],~CHN_RD_MEM[6]}:PAR_DEFAULT) | (start6?{bank6, row6, start_col6, num128_6, partial6, CHN_RD_MEM[6],~CHN_RD_MEM[6]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn7 `ifdef def_scanline_chn7 | (start7?{bank7, row7, start_col7, num128_7,CHN_RD_MEM[7],~CHN_RD_MEM[7]}:PAR_DEFAULT) | (start7?{bank7, row7, start_col7, num128_7, partial7, CHN_RD_MEM[7],~CHN_RD_MEM[7]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn8 `ifdef def_scanline_chn8 | (start8?{bank8, row8, start_col8, num128_8,CHN_RD_MEM[8],~CHN_RD_MEM[8]}:PAR_DEFAULT) | (start8?{bank8, row8, start_col8, num128_8, partial8, CHN_RD_MEM[8],~CHN_RD_MEM[8]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn9 `ifdef def_scanline_chn9 | (start9?{bank9, row9, start_col9, num128_9,CHN_RD_MEM[9],~CHN_RD_MEM[9]}:PAR_DEFAULT) | (start9?{bank9, row9, start_col9, num128_9, partial9, CHN_RD_MEM[9],~CHN_RD_MEM[9]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn10 `ifdef def_scanline_chn10 | (start10?{bank10, row10, start_col10, num128_10,CHN_RD_MEM[10],~CHN_RD_MEM[10]}:PAR_DEFAULT) | (start10?{bank10, row10, start_col10, num128_10, partial10, CHN_RD_MEM[10],~CHN_RD_MEM[10]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn11 `ifdef def_scanline_chn11 | (start11?{bank11, row11, start_col11, num128_11,CHN_RD_MEM[11],~CHN_RD_MEM[11]}:PAR_DEFAULT) | (start11?{bank11, row11, start_col11, num128_11, partial11, CHN_RD_MEM[11],~CHN_RD_MEM[11]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn12 `ifdef def_scanline_chn12 | (start12?{bank12, row12, start_col12, num128_12,CHN_RD_MEM[12],~CHN_RD_MEM[12]}:PAR_DEFAULT) | (start12?{bank12, row12, start_col12, num128_12, partial12, CHN_RD_MEM[12],~CHN_RD_MEM[12]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn13 `ifdef def_scanline_chn13 | (start13?{bank13, row13, start_col13, num128_13,CHN_RD_MEM[13],~CHN_RD_MEM[13]}:PAR_DEFAULT) | (start13?{bank13, row13, start_col13, num128_13, partial13, CHN_RD_MEM[13],~CHN_RD_MEM[13]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn14 `ifdef def_scanline_chn14 | (start14?{bank14, row14, start_col14, num128_14,CHN_RD_MEM[14],~CHN_RD_MEM[14]}:PAR_DEFAULT) | (start14?{bank14, row14, start_col14, num128_14, partial14, CHN_RD_MEM[14],~CHN_RD_MEM[14]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn15 `ifdef def_scanline_chn15 | (start15?{bank15, row15, start_col15, num128_15,CHN_RD_MEM[15],~CHN_RD_MEM[15]}:PAR_DEFAULT) | (start15?{bank15, row15, start_col15, num128_15, partial15, CHN_RD_MEM[15],~CHN_RD_MEM[15]}:PAR_DEFAULT) `endif `endif ; ; always @ (posedge clk) begin always @ (posedge clk) begin Loading @@ -309,6 +329,7 @@ module cmd_encod_linear_mux#( row_r <= row_w; row_r <= row_w; start_col_r <= start_col_w; start_col_r <= start_col_w; num128_r <= num128_w; num128_r <= num128_w; partial_r <= partial_w; end end start_rd_r <= start_rd_w; start_rd_r <= start_rd_w; start_wr_r <= start_wr_w; start_wr_r <= start_wr_w; Loading memctrl/cmd_encod_linear_rd.v +8 −5 Original line number Original line Diff line number Diff line Loading @@ -47,6 +47,7 @@ module cmd_encod_linear_rd #( input [ADDRESS_NUMBER-1:0] row_in, // memory row input [ADDRESS_NUMBER-1:0] row_in, // memory row input [COLADDR_NUMBER-4:0] start_col, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col, // start memory column in 8-bursts input [NUM_XFER_BITS-1:0] num128_in, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [NUM_XFER_BITS-1:0] num128_in, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input skip_next_page_in, // do not reset external buffer (continue) input start, // start generating commands input start, // start generating commands output reg [31:0] enc_cmd, // encoded commnad output reg [31:0] enc_cmd, // encoded commnad output reg enc_wr, // write encoded command output reg enc_wr, // write encoded command Loading @@ -72,7 +73,7 @@ module cmd_encod_linear_rd #( localparam REPEAT_ADDR=3; localparam REPEAT_ADDR=3; localparam CMD_NOP= 0; // 3-bit normal memory RCW commands (positive logic) localparam CMD_NOP= 0; // 3-bit normal memory RCW commands (positive logic) localparam CMD_READ= 3; localparam CMD_READ= 2; localparam CMD_PRECHARGE=5; localparam CMD_PRECHARGE=5; localparam CMD_ACTIVATE= 4; localparam CMD_ACTIVATE= 4; Loading @@ -80,7 +81,7 @@ module cmd_encod_linear_rd #( reg [COLADDR_NUMBER-4:0] col; // start memory column (3 LSBs should be 0?) // VDT BUG: col is used as a function call parameter! reg [COLADDR_NUMBER-4:0] col; // start memory column (3 LSBs should be 0?) // VDT BUG: col is used as a function call parameter! reg [2:0] bank; // memory bank; reg [2:0] bank; // memory bank; reg [NUM_XFER_BITS-1:0] num128; // number of 128-bit words to transfer reg [NUM_XFER_BITS-1:0] num128; // number of 128-bit words to transfer reg skip_next_page; reg gen_run; reg gen_run; reg gen_run_d; reg gen_run_d; reg [ROM_DEPTH-1:0] gen_addr; // will overrun as stop comes from ROM reg [ROM_DEPTH-1:0] gen_addr; // will overrun as stop comes from ROM Loading Loading @@ -120,6 +121,8 @@ module cmd_encod_linear_rd #( row<=row_in; row<=row_in; col <= start_col; col <= start_col; bank <= bank_in; bank <= bank_in; skip_next_page <= skip_next_page_in; end end // ROM-based (registered output) encoded sequence // ROM-based (registered output) encoded sequence Loading @@ -146,7 +149,7 @@ module cmd_encod_linear_rd #( else enc_wr <= gen_run || gen_run_d; else enc_wr <= gen_run || gen_run_d; if (rst) enc_done <= 0; if (rst) enc_done <= 0; else enc_done <= enc_wr || !gen_run_d; else enc_done <= enc_wr && !gen_run_d; if (rst) enc_cmd <= 0; if (rst) enc_cmd <= 0; else if (rom_cmd==0) enc_cmd <= func_encode_skip ( // encode pause else if (rom_cmd==0) enc_cmd <= func_encode_skip ( // encode pause Loading @@ -162,7 +165,7 @@ module cmd_encod_linear_rd #( rom_r[ENC_DCI], // dci; // DCI disable, both DQ and DQS lines (internal logic and timing sequencer for 0->1 and 1->0) rom_r[ENC_DCI], // dci; // DCI disable, both DQ and DQS lines (internal logic and timing sequencer for 0->1 and 1->0) rom_r[ENC_BUF_WR], // buf_wr; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_WR], // buf_wr; // connect to external buffer (but only if not paused) 1'b0, // buf_rd; // connect to external buffer (but only if not paused) 1'b0, // buf_rd; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT]); // buf_rst; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT] && !skip_next_page); // buf_rst; // connect to external buffer (but only if not paused) else enc_cmd <= func_encode_cmd ( // encode non-NOP command else enc_cmd <= func_encode_cmd ( // encode non-NOP command rom_cmd[1]? rom_cmd[1]? row: row: Loading @@ -179,7 +182,7 @@ module cmd_encod_linear_rd #( rom_r[ENC_BUF_WR], // buf_wr; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_WR], // buf_wr; // connect to external buffer (but only if not paused) 1'b0, // buf_rd; // connect to external buffer (but only if not paused) 1'b0, // buf_rd; // connect to external buffer (but only if not paused) rom_r[ENC_NOP], // nop; // add NOP after the current command, keep other data rom_r[ENC_NOP], // nop; // add NOP after the current command, keep other data rom_r[ENC_BUF_PGNEXT]); // buf_rst; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT] && !skip_next_page); // buf_rst; // connect to external buffer (but only if not paused) end end Loading memctrl/cmd_encod_linear_wr.v +6 −3 Original line number Original line Diff line number Diff line Loading @@ -38,6 +38,7 @@ module cmd_encod_linear_wr #( input [ADDRESS_NUMBER-1:0] row_in, // memory row input [ADDRESS_NUMBER-1:0] row_in, // memory row input [COLADDR_NUMBER-4:0] start_col, // start memory column (3 LSBs should be 0?) input [COLADDR_NUMBER-4:0] start_col, // start memory column (3 LSBs should be 0?) input [NUM_XFER_BITS-1:0] num128_in, // number of 128-bit words to transfer (8*16 bits) - full burst of 8 (0 - full 64) input [NUM_XFER_BITS-1:0] num128_in, // number of 128-bit words to transfer (8*16 bits) - full burst of 8 (0 - full 64) input skip_next_page_in, // do not reset external buffer (continue) input start, // start generating commands input start, // start generating commands output reg [31:0] enc_cmd, // encoded commnad output reg [31:0] enc_cmd, // encoded commnad output reg enc_wr, // write encoded command output reg enc_wr, // write encoded command Loading Loading @@ -73,6 +74,7 @@ module cmd_encod_linear_wr #( reg [COLADDR_NUMBER-4:0] col; // start memory column (3 LSBs should be 0?) // VDT BUG: col is used as a function call parameter! reg [COLADDR_NUMBER-4:0] col; // start memory column (3 LSBs should be 0?) // VDT BUG: col is used as a function call parameter! reg [2:0] bank; // memory bank; reg [2:0] bank; // memory bank; reg [NUM_XFER_BITS:0] num128; // number of 128-bit words to transfer reg [NUM_XFER_BITS:0] num128; // number of 128-bit words to transfer reg skip_next_page; reg gen_run; reg gen_run; reg gen_run_d; reg gen_run_d; Loading Loading @@ -131,6 +133,7 @@ module cmd_encod_linear_wr #( row<=row_in; row<=row_in; col <= start_col; col <= start_col; bank <= bank_in; bank <= bank_in; skip_next_page <= skip_next_page_in; end end // ROM-based (registered output) encoded sequence // ROM-based (registered output) encoded sequence Loading Loading @@ -177,7 +180,7 @@ module cmd_encod_linear_wr #( 1'b0, // dci; // DCI disable, both DQ and DQS lines (internal logic and timing sequencer for 0->1 and 1->0) 1'b0, // dci; // DCI disable, both DQ and DQS lines (internal logic and timing sequencer for 0->1 and 1->0) 1'b0, // buf_wr; // connect to external buffer (but only if not paused) 1'b0, // buf_wr; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_RD] && !cut_buf_rd, //buf_rd;// connect to external buffer (but only if not paused) rom_r[ENC_BUF_RD] && !cut_buf_rd, //buf_rd;// connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT]); // buf_rst; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT] && !skip_next_page); // buf_rst; // connect to external buffer (but only if not paused) else enc_cmd <= func_encode_cmd ( // encode non-NOP command else enc_cmd <= func_encode_cmd ( // encode non-NOP command rom_cmd[1]? rom_cmd[1]? row: row: Loading @@ -194,7 +197,7 @@ module cmd_encod_linear_wr #( 1'b0, // buf_wr; // connect to external buffer (but only if not paused) 1'b0, // buf_wr; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_RD] && !cut_buf_rd, //buf_rd;// connect to external buffer (but only if not paused) rom_r[ENC_BUF_RD] && !cut_buf_rd, //buf_rd;// connect to external buffer (but only if not paused) rom_r[ENC_NOP], // nop; // add NOP after the current command, keep other data rom_r[ENC_NOP], // nop; // add NOP after the current command, keep other data rom_r[ENC_BUF_PGNEXT]); // buf_rst; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT] && !skip_next_page); // buf_rst; // connect to external buffer (but only if not paused) end end Loading memctrl/cmd_encod_tiled_rd.v +4 −4 Original line number Original line Diff line number Diff line Loading @@ -242,7 +242,7 @@ module cmd_encod_tiled_rd #( 4'h7: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (1 << ENC_BUF_WR) | (1 << ENC_DCI) | (1 << ENC_SEL); 4'h7: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (1 << ENC_BUF_WR) | (1 << ENC_DCI) | (1 << ENC_SEL); 4'h8: rom_r <= (ENC_CMD_READ << ENC_CMD_SHIFT) | (1 << ENC_BUF_WR) | (1 << ENC_DCI) | (1 << ENC_SEL); 4'h8: rom_r <= (ENC_CMD_READ << ENC_CMD_SHIFT) | (1 << ENC_BUF_WR) | (1 << ENC_DCI) | (1 << ENC_SEL); 4'h9: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (2 << ENC_PAUSE_SHIFT) | (1 << ENC_BUF_WR) | (1 << ENC_DCI) | (1 << ENC_SEL); 4'h9: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (2 << ENC_PAUSE_SHIFT) | (1 << ENC_BUF_WR) | (1 << ENC_DCI) | (1 << ENC_SEL); 4'ha: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (1 << ENC_DCI) | (1 << ENC_SEL) | (skip_next_page? 1'b0:(1 << ENC_BUF_PGNEXT)); 4'ha: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (1 << ENC_DCI) | (1 << ENC_SEL) | (1 << ENC_BUF_PGNEXT); 4'hb: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (3 << ENC_PAUSE_SHIFT) | (1 << ENC_DCI); 4'hb: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (3 << ENC_PAUSE_SHIFT) | (1 << ENC_DCI); 4'hc: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (1 << ENC_PRE_DONE); 4'hc: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (1 << ENC_PRE_DONE); default:rom_r <= 0; default:rom_r <= 0; Loading Loading @@ -272,7 +272,7 @@ module cmd_encod_tiled_rd #( rom_r[ENC_DCI], // dci; // DCI disable, both DQ and DQS lines (internal logic and timing sequencer for 0->1 and 1->0) rom_r[ENC_DCI], // dci; // DCI disable, both DQ and DQS lines (internal logic and timing sequencer for 0->1 and 1->0) rom_r[ENC_BUF_WR], // buf_wr; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_WR], // buf_wr; // connect to external buffer (but only if not paused) 1'b0, // buf_rd; // connect to external buffer (but only if not paused) 1'b0, // buf_rd; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT]); // buf_rst; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT] && !skip_next_page); // buf_rst; // connect to external buffer (but only if not paused) else enc_cmd <= func_encode_cmd ( // encode non-NOP command else enc_cmd <= func_encode_cmd ( // encode non-NOP command rom_cmd[1]? // activate rom_cmd[1]? // activate row_col_bank[FULL_ADDR_NUMBER-1:COLADDR_NUMBER]: // top combined row,column,bank burst address (excludes 3 CA LSBs), valid/modified @pre_act row_col_bank[FULL_ADDR_NUMBER-1:COLADDR_NUMBER]: // top combined row,column,bank burst address (excludes 3 CA LSBs), valid/modified @pre_act Loading @@ -294,7 +294,7 @@ module cmd_encod_tiled_rd #( rom_r[ENC_BUF_WR], // buf_wr; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_WR], // buf_wr; // connect to external buffer (but only if not paused) 1'b0, // buf_rd; // connect to external buffer (but only if not paused) 1'b0, // buf_rd; // connect to external buffer (but only if not paused) rom_r[ENC_NOP], // nop; // add NOP after the current command, keep other data rom_r[ENC_NOP], // nop; // add NOP after the current command, keep other data rom_r[ENC_BUF_PGNEXT]); // buf_rst; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT] && !skip_next_page); // buf_rst; // connect to external buffer (but only if not paused) end end // move to include?, Yes, after fixing problem with paths // move to include?, Yes, after fixing problem with paths Loading Loading
memctrl/cmd_encod_linear_mux.v +39 −18 Original line number Original line Diff line number Diff line Loading @@ -32,6 +32,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row0, // memory row input [ADDRESS_NUMBER-1:0] row0, // memory row input [COLADDR_NUMBER-4:0] start_col0, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col0, // start memory column in 8-bursts input [5:0] num128_0, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_0, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial0, // first of the two halves of a split tile (caused by memory page crossing) input start0, // start generating commands input start0, // start generating commands `endif `endif `ifdef def_scanline_chn1 `ifdef def_scanline_chn1 Loading @@ -39,6 +40,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row1, // memory row input [ADDRESS_NUMBER-1:0] row1, // memory row input [COLADDR_NUMBER-4:0] start_col1, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col1, // start memory column in 8-bursts input [5:0] num128_1, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_1, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial1, // first of the two halves of a split tile (caused by memory page crossing) input start1, // start generating commands input start1, // start generating commands `endif `endif `ifdef def_scanline_chn2 `ifdef def_scanline_chn2 Loading @@ -46,6 +48,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row2, // memory row input [ADDRESS_NUMBER-1:0] row2, // memory row input [COLADDR_NUMBER-4:0] start_col2, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col2, // start memory column in 8-bursts input [5:0] num128_2, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_2, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial2, // first of the two halves of a split tile (caused by memory page crossing) input start2, // start generating commands input start2, // start generating commands `endif `endif `ifdef def_scanline_chn3 `ifdef def_scanline_chn3 Loading @@ -53,6 +56,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row3, // memory row input [ADDRESS_NUMBER-1:0] row3, // memory row input [COLADDR_NUMBER-4:0] start_col3, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col3, // start memory column in 8-bursts input [5:0] num128_3, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_3, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial3, // first of the two halves of a split tile (caused by memory page crossing) input start3, // start generating commands input start3, // start generating commands `endif `endif `ifdef def_scanline_chn4 `ifdef def_scanline_chn4 Loading @@ -60,6 +64,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row4, // memory row input [ADDRESS_NUMBER-1:0] row4, // memory row input [COLADDR_NUMBER-4:0] start_col4, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col4, // start memory column in 8-bursts input [5:0] num128_4, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_4, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial4, // first of the two halves of a split tile (caused by memory page crossing) input start4, // start generating commands input start4, // start generating commands `endif `endif Loading @@ -68,6 +73,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row5, // memory row input [ADDRESS_NUMBER-1:0] row5, // memory row input [COLADDR_NUMBER-4:0] start_col5, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col5, // start memory column in 8-bursts input [5:0] num128_5, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_5, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial5, // first of the two halves of a split tile (caused by memory page crossing) input start5, // start generating commands input start5, // start generating commands `endif `endif Loading @@ -76,6 +82,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row6, // memory row input [ADDRESS_NUMBER-1:0] row6, // memory row input [COLADDR_NUMBER-4:0] start_col6, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col6, // start memory column in 8-bursts input [5:0] num128_6, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_6, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial6, // first of the two halves of a split tile (caused by memory page crossing) input start6, // start generating commands input start6, // start generating commands `endif `endif `ifdef def_scanline_chn7 `ifdef def_scanline_chn7 Loading @@ -83,6 +90,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row7, // memory row input [ADDRESS_NUMBER-1:0] row7, // memory row input [COLADDR_NUMBER-4:0] start_col7, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col7, // start memory column in 8-bursts input [5:0] num128_7, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_7, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial7, // first of the two halves of a split tile (caused by memory page crossing) input start7, // start generating commands input start7, // start generating commands `endif `endif `ifdef def_scanline_chn8 `ifdef def_scanline_chn8 Loading @@ -90,6 +98,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row8, // memory row input [ADDRESS_NUMBER-1:0] row8, // memory row input [COLADDR_NUMBER-4:0] start_col8, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col8, // start memory column in 8-bursts input [5:0] num128_8, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_8, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial8, // first of the two halves of a split tile (caused by memory page crossing) input start8, // start generating commands input start8, // start generating commands `endif `endif `ifdef def_scanline_chn9 `ifdef def_scanline_chn9 Loading @@ -97,6 +106,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row9, // memory row input [ADDRESS_NUMBER-1:0] row9, // memory row input [COLADDR_NUMBER-4:0] start_col9, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col9, // start memory column in 8-bursts input [5:0] num128_9, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_9, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial9, // first of the two halves of a split tile (caused by memory page crossing) input start9, // start generating commands input start9, // start generating commands `endif `endif `ifdef def_scanline_chn10 `ifdef def_scanline_chn10 Loading @@ -104,6 +114,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row10, // memory row input [ADDRESS_NUMBER-1:0] row10, // memory row input [COLADDR_NUMBER-4:0] start_col10, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col10, // start memory column in 8-bursts input [5:0] num128_10, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_10, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial10, // first of the two halves of a split tile (caused by memory page crossing) input start10, // start generating commands input start10, // start generating commands `endif `endif `ifdef def_scanline_chn11 `ifdef def_scanline_chn11 Loading @@ -111,6 +122,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row11, // memory row input [ADDRESS_NUMBER-1:0] row11, // memory row input [COLADDR_NUMBER-4:0] start_col11, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col11, // start memory column in 8-bursts input [5:0] num128_11, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_11, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial11, // first of the two halves of a split tile (caused by memory page crossing) input start11, // start generating commands input start11, // start generating commands `endif `endif `ifdef def_scanline_chn12 `ifdef def_scanline_chn12 Loading @@ -118,6 +130,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row12, // memory row input [ADDRESS_NUMBER-1:0] row12, // memory row input [COLADDR_NUMBER-4:0] start_col12, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col12, // start memory column in 8-bursts input [5:0] num128_12, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_12, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial12, // first of the two halves of a split tile (caused by memory page crossing) input start12, // start generating commands input start12, // start generating commands `endif `endif `ifdef def_scanline_chn13 `ifdef def_scanline_chn13 Loading @@ -125,6 +138,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row13, // memory row input [ADDRESS_NUMBER-1:0] row13, // memory row input [COLADDR_NUMBER-4:0] start_col13, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col13, // start memory column in 8-bursts input [5:0] num128_13, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_13, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial13, // first of the two halves of a split tile (caused by memory page crossing) input start13, // start generating commands input start13, // start generating commands `endif `endif `ifdef def_scanline_chn14 `ifdef def_scanline_chn14 Loading @@ -132,6 +146,7 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row14, // memory row input [ADDRESS_NUMBER-1:0] row14, // memory row input [COLADDR_NUMBER-4:0] start_col14, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col14, // start memory column in 8-bursts input [5:0] num128_14, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_14, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial14, // first of the two halves of a split tile (caused by memory page crossing) input start14, // start generating commands input start14, // start generating commands `endif `endif `ifdef def_scanline_chn15 `ifdef def_scanline_chn15 Loading @@ -139,12 +154,14 @@ module cmd_encod_linear_mux#( input [ADDRESS_NUMBER-1:0] row15, // memory row input [ADDRESS_NUMBER-1:0] row15, // memory row input [COLADDR_NUMBER-4:0] start_col15, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col15, // start memory column in 8-bursts input [5:0] num128_15, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [5:0] num128_15, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input partial15, // first of the two halves of a split tile (caused by memory page crossing) input start15, // start generating commands input start15, // start generating commands `endif `endif output [2:0] bank, // bank address output [2:0] bank, // bank address output [ADDRESS_NUMBER-1:0] row, // memory row output [ADDRESS_NUMBER-1:0] row, // memory row output [COLADDR_NUMBER-4:0] start_col, // start memory column in 8-bursts output [COLADDR_NUMBER-4:0] start_col, // start memory column in 8-bursts output [5:0] num128, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) output [5:0] num128, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) output partial, // first of the two halves of a split tile (caused by memory page crossing) output start_rd, // start generating commands in cmd_encod_linear_rd output start_rd, // start generating commands in cmd_encod_linear_rd output start_wr // start generating commands in cmd_encod_linear_wr output start_wr // start generating commands in cmd_encod_linear_wr ); ); Loading @@ -152,6 +169,7 @@ module cmd_encod_linear_mux#( reg [ADDRESS_NUMBER-1:0] row_r; // memory row reg [ADDRESS_NUMBER-1:0] row_r; // memory row reg [COLADDR_NUMBER-4:0] start_col_r;// start memory column in 8-bursts reg [COLADDR_NUMBER-4:0] start_col_r;// start memory column in 8-bursts reg [5:0] num128_r; // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) reg [5:0] num128_r; // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) reg partial_r; reg start_rd_r; // start generating commands reg start_rd_r; // start generating commands reg start_wr_r; // start generating commands reg start_wr_r; // start generating commands Loading @@ -159,15 +177,17 @@ module cmd_encod_linear_mux#( wire [ADDRESS_NUMBER-1:0] row_w; // memory row wire [ADDRESS_NUMBER-1:0] row_w; // memory row wire [COLADDR_NUMBER-4:0] start_col_w;// start memory column in 8-bursts wire [COLADDR_NUMBER-4:0] start_col_w;// start memory column in 8-bursts wire [5:0] num128_w; // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) wire [5:0] num128_w; // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) wire partial_w; wire start_rd_w; // start generating commands wire start_rd_w; // start generating commands wire start_wr_w; // start generating commands wire start_wr_w; // start generating commands localparam PAR_WIDTH=3+ADDRESS_NUMBER+COLADDR_NUMBER-3+6+2; localparam PAR_WIDTH=3+ADDRESS_NUMBER+COLADDR_NUMBER-3+6+2+1; localparam [PAR_WIDTH-1:0] PAR_DEFAULT=0; localparam [PAR_WIDTH-1:0] PAR_DEFAULT=0; assign bank = bank_r; assign bank = bank_r; assign row = row_r; assign row = row_r; assign start_col = start_col_r; assign start_col = start_col_r; assign num128 = num128_r; assign num128 = num128_r; assign partial= partial_r; assign start_rd = start_rd_r; assign start_rd = start_rd_r; assign start_wr = start_wr_r; assign start_wr = start_wr_r; localparam [15:0] CHN_RD_MEM={ localparam [15:0] CHN_RD_MEM={ Loading Loading @@ -253,54 +273,54 @@ module cmd_encod_linear_mux#( `endif `endif assign {bank_w, row_w, start_col_w, num128_w, start_rd_w, start_wr_w} = 0 assign {bank_w, row_w, start_col_w, num128_w, partial_w, start_rd_w, start_wr_w} = 0 `ifdef def_scanline_chn0 `ifdef def_scanline_chn0 | (start0?{bank0, row0, start_col0, num128_0,CHN_RD_MEM[0],~CHN_RD_MEM[0]}:PAR_DEFAULT) | (start0?{bank0, row0, start_col0, num128_0, partial0, CHN_RD_MEM[0],~CHN_RD_MEM[0]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn1 `ifdef def_scanline_chn1 | (start1?{bank1, row1, start_col1, num128_1,CHN_RD_MEM[1],~CHN_RD_MEM[1]}:PAR_DEFAULT) | (start1?{bank1, row1, start_col1, num128_1, partial1, CHN_RD_MEM[1],~CHN_RD_MEM[1]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn2 `ifdef def_scanline_chn2 | (start2?{bank2, row2, start_col2, num128_2,CHN_RD_MEM[2],~CHN_RD_MEM[2]}:PAR_DEFAULT) | (start2?{bank2, row2, start_col2, num128_2, partial2, CHN_RD_MEM[2],~CHN_RD_MEM[2]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn3 `ifdef def_scanline_chn3 | (start3?{bank3, row3, start_col3, num128_3,CHN_RD_MEM[3],~CHN_RD_MEM[3]}:PAR_DEFAULT) | (start3?{bank3, row3, start_col3, num128_3, partial3, CHN_RD_MEM[3],~CHN_RD_MEM[3]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn4 `ifdef def_scanline_chn4 | (start4?{bank4, row4, start_col4, num128_4,CHN_RD_MEM[4],~CHN_RD_MEM[4]}:PAR_DEFAULT) | (start4?{bank4, row4, start_col4, num128_4, partial4, CHN_RD_MEM[4],~CHN_RD_MEM[4]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn5 `ifdef def_scanline_chn5 | (start5?{bank5, row5, start_col5, num128_5,CHN_RD_MEM[5],~CHN_RD_MEM[5]}:PAR_DEFAULT) | (start5?{bank5, row5, start_col5, num128_5, partial5, CHN_RD_MEM[5],~CHN_RD_MEM[5]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn6 `ifdef def_scanline_chn6 | (start6?{bank6, row6, start_col6, num128_6,CHN_RD_MEM[6],~CHN_RD_MEM[6]}:PAR_DEFAULT) | (start6?{bank6, row6, start_col6, num128_6, partial6, CHN_RD_MEM[6],~CHN_RD_MEM[6]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn7 `ifdef def_scanline_chn7 | (start7?{bank7, row7, start_col7, num128_7,CHN_RD_MEM[7],~CHN_RD_MEM[7]}:PAR_DEFAULT) | (start7?{bank7, row7, start_col7, num128_7, partial7, CHN_RD_MEM[7],~CHN_RD_MEM[7]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn8 `ifdef def_scanline_chn8 | (start8?{bank8, row8, start_col8, num128_8,CHN_RD_MEM[8],~CHN_RD_MEM[8]}:PAR_DEFAULT) | (start8?{bank8, row8, start_col8, num128_8, partial8, CHN_RD_MEM[8],~CHN_RD_MEM[8]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn9 `ifdef def_scanline_chn9 | (start9?{bank9, row9, start_col9, num128_9,CHN_RD_MEM[9],~CHN_RD_MEM[9]}:PAR_DEFAULT) | (start9?{bank9, row9, start_col9, num128_9, partial9, CHN_RD_MEM[9],~CHN_RD_MEM[9]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn10 `ifdef def_scanline_chn10 | (start10?{bank10, row10, start_col10, num128_10,CHN_RD_MEM[10],~CHN_RD_MEM[10]}:PAR_DEFAULT) | (start10?{bank10, row10, start_col10, num128_10, partial10, CHN_RD_MEM[10],~CHN_RD_MEM[10]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn11 `ifdef def_scanline_chn11 | (start11?{bank11, row11, start_col11, num128_11,CHN_RD_MEM[11],~CHN_RD_MEM[11]}:PAR_DEFAULT) | (start11?{bank11, row11, start_col11, num128_11, partial11, CHN_RD_MEM[11],~CHN_RD_MEM[11]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn12 `ifdef def_scanline_chn12 | (start12?{bank12, row12, start_col12, num128_12,CHN_RD_MEM[12],~CHN_RD_MEM[12]}:PAR_DEFAULT) | (start12?{bank12, row12, start_col12, num128_12, partial12, CHN_RD_MEM[12],~CHN_RD_MEM[12]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn13 `ifdef def_scanline_chn13 | (start13?{bank13, row13, start_col13, num128_13,CHN_RD_MEM[13],~CHN_RD_MEM[13]}:PAR_DEFAULT) | (start13?{bank13, row13, start_col13, num128_13, partial13, CHN_RD_MEM[13],~CHN_RD_MEM[13]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn14 `ifdef def_scanline_chn14 | (start14?{bank14, row14, start_col14, num128_14,CHN_RD_MEM[14],~CHN_RD_MEM[14]}:PAR_DEFAULT) | (start14?{bank14, row14, start_col14, num128_14, partial14, CHN_RD_MEM[14],~CHN_RD_MEM[14]}:PAR_DEFAULT) `endif `endif `ifdef def_scanline_chn15 `ifdef def_scanline_chn15 | (start15?{bank15, row15, start_col15, num128_15,CHN_RD_MEM[15],~CHN_RD_MEM[15]}:PAR_DEFAULT) | (start15?{bank15, row15, start_col15, num128_15, partial15, CHN_RD_MEM[15],~CHN_RD_MEM[15]}:PAR_DEFAULT) `endif `endif ; ; always @ (posedge clk) begin always @ (posedge clk) begin Loading @@ -309,6 +329,7 @@ module cmd_encod_linear_mux#( row_r <= row_w; row_r <= row_w; start_col_r <= start_col_w; start_col_r <= start_col_w; num128_r <= num128_w; num128_r <= num128_w; partial_r <= partial_w; end end start_rd_r <= start_rd_w; start_rd_r <= start_rd_w; start_wr_r <= start_wr_w; start_wr_r <= start_wr_w; Loading
memctrl/cmd_encod_linear_rd.v +8 −5 Original line number Original line Diff line number Diff line Loading @@ -47,6 +47,7 @@ module cmd_encod_linear_rd #( input [ADDRESS_NUMBER-1:0] row_in, // memory row input [ADDRESS_NUMBER-1:0] row_in, // memory row input [COLADDR_NUMBER-4:0] start_col, // start memory column in 8-bursts input [COLADDR_NUMBER-4:0] start_col, // start memory column in 8-bursts input [NUM_XFER_BITS-1:0] num128_in, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input [NUM_XFER_BITS-1:0] num128_in, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64) input skip_next_page_in, // do not reset external buffer (continue) input start, // start generating commands input start, // start generating commands output reg [31:0] enc_cmd, // encoded commnad output reg [31:0] enc_cmd, // encoded commnad output reg enc_wr, // write encoded command output reg enc_wr, // write encoded command Loading @@ -72,7 +73,7 @@ module cmd_encod_linear_rd #( localparam REPEAT_ADDR=3; localparam REPEAT_ADDR=3; localparam CMD_NOP= 0; // 3-bit normal memory RCW commands (positive logic) localparam CMD_NOP= 0; // 3-bit normal memory RCW commands (positive logic) localparam CMD_READ= 3; localparam CMD_READ= 2; localparam CMD_PRECHARGE=5; localparam CMD_PRECHARGE=5; localparam CMD_ACTIVATE= 4; localparam CMD_ACTIVATE= 4; Loading @@ -80,7 +81,7 @@ module cmd_encod_linear_rd #( reg [COLADDR_NUMBER-4:0] col; // start memory column (3 LSBs should be 0?) // VDT BUG: col is used as a function call parameter! reg [COLADDR_NUMBER-4:0] col; // start memory column (3 LSBs should be 0?) // VDT BUG: col is used as a function call parameter! reg [2:0] bank; // memory bank; reg [2:0] bank; // memory bank; reg [NUM_XFER_BITS-1:0] num128; // number of 128-bit words to transfer reg [NUM_XFER_BITS-1:0] num128; // number of 128-bit words to transfer reg skip_next_page; reg gen_run; reg gen_run; reg gen_run_d; reg gen_run_d; reg [ROM_DEPTH-1:0] gen_addr; // will overrun as stop comes from ROM reg [ROM_DEPTH-1:0] gen_addr; // will overrun as stop comes from ROM Loading Loading @@ -120,6 +121,8 @@ module cmd_encod_linear_rd #( row<=row_in; row<=row_in; col <= start_col; col <= start_col; bank <= bank_in; bank <= bank_in; skip_next_page <= skip_next_page_in; end end // ROM-based (registered output) encoded sequence // ROM-based (registered output) encoded sequence Loading @@ -146,7 +149,7 @@ module cmd_encod_linear_rd #( else enc_wr <= gen_run || gen_run_d; else enc_wr <= gen_run || gen_run_d; if (rst) enc_done <= 0; if (rst) enc_done <= 0; else enc_done <= enc_wr || !gen_run_d; else enc_done <= enc_wr && !gen_run_d; if (rst) enc_cmd <= 0; if (rst) enc_cmd <= 0; else if (rom_cmd==0) enc_cmd <= func_encode_skip ( // encode pause else if (rom_cmd==0) enc_cmd <= func_encode_skip ( // encode pause Loading @@ -162,7 +165,7 @@ module cmd_encod_linear_rd #( rom_r[ENC_DCI], // dci; // DCI disable, both DQ and DQS lines (internal logic and timing sequencer for 0->1 and 1->0) rom_r[ENC_DCI], // dci; // DCI disable, both DQ and DQS lines (internal logic and timing sequencer for 0->1 and 1->0) rom_r[ENC_BUF_WR], // buf_wr; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_WR], // buf_wr; // connect to external buffer (but only if not paused) 1'b0, // buf_rd; // connect to external buffer (but only if not paused) 1'b0, // buf_rd; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT]); // buf_rst; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT] && !skip_next_page); // buf_rst; // connect to external buffer (but only if not paused) else enc_cmd <= func_encode_cmd ( // encode non-NOP command else enc_cmd <= func_encode_cmd ( // encode non-NOP command rom_cmd[1]? rom_cmd[1]? row: row: Loading @@ -179,7 +182,7 @@ module cmd_encod_linear_rd #( rom_r[ENC_BUF_WR], // buf_wr; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_WR], // buf_wr; // connect to external buffer (but only if not paused) 1'b0, // buf_rd; // connect to external buffer (but only if not paused) 1'b0, // buf_rd; // connect to external buffer (but only if not paused) rom_r[ENC_NOP], // nop; // add NOP after the current command, keep other data rom_r[ENC_NOP], // nop; // add NOP after the current command, keep other data rom_r[ENC_BUF_PGNEXT]); // buf_rst; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT] && !skip_next_page); // buf_rst; // connect to external buffer (but only if not paused) end end Loading
memctrl/cmd_encod_linear_wr.v +6 −3 Original line number Original line Diff line number Diff line Loading @@ -38,6 +38,7 @@ module cmd_encod_linear_wr #( input [ADDRESS_NUMBER-1:0] row_in, // memory row input [ADDRESS_NUMBER-1:0] row_in, // memory row input [COLADDR_NUMBER-4:0] start_col, // start memory column (3 LSBs should be 0?) input [COLADDR_NUMBER-4:0] start_col, // start memory column (3 LSBs should be 0?) input [NUM_XFER_BITS-1:0] num128_in, // number of 128-bit words to transfer (8*16 bits) - full burst of 8 (0 - full 64) input [NUM_XFER_BITS-1:0] num128_in, // number of 128-bit words to transfer (8*16 bits) - full burst of 8 (0 - full 64) input skip_next_page_in, // do not reset external buffer (continue) input start, // start generating commands input start, // start generating commands output reg [31:0] enc_cmd, // encoded commnad output reg [31:0] enc_cmd, // encoded commnad output reg enc_wr, // write encoded command output reg enc_wr, // write encoded command Loading Loading @@ -73,6 +74,7 @@ module cmd_encod_linear_wr #( reg [COLADDR_NUMBER-4:0] col; // start memory column (3 LSBs should be 0?) // VDT BUG: col is used as a function call parameter! reg [COLADDR_NUMBER-4:0] col; // start memory column (3 LSBs should be 0?) // VDT BUG: col is used as a function call parameter! reg [2:0] bank; // memory bank; reg [2:0] bank; // memory bank; reg [NUM_XFER_BITS:0] num128; // number of 128-bit words to transfer reg [NUM_XFER_BITS:0] num128; // number of 128-bit words to transfer reg skip_next_page; reg gen_run; reg gen_run; reg gen_run_d; reg gen_run_d; Loading Loading @@ -131,6 +133,7 @@ module cmd_encod_linear_wr #( row<=row_in; row<=row_in; col <= start_col; col <= start_col; bank <= bank_in; bank <= bank_in; skip_next_page <= skip_next_page_in; end end // ROM-based (registered output) encoded sequence // ROM-based (registered output) encoded sequence Loading Loading @@ -177,7 +180,7 @@ module cmd_encod_linear_wr #( 1'b0, // dci; // DCI disable, both DQ and DQS lines (internal logic and timing sequencer for 0->1 and 1->0) 1'b0, // dci; // DCI disable, both DQ and DQS lines (internal logic and timing sequencer for 0->1 and 1->0) 1'b0, // buf_wr; // connect to external buffer (but only if not paused) 1'b0, // buf_wr; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_RD] && !cut_buf_rd, //buf_rd;// connect to external buffer (but only if not paused) rom_r[ENC_BUF_RD] && !cut_buf_rd, //buf_rd;// connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT]); // buf_rst; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT] && !skip_next_page); // buf_rst; // connect to external buffer (but only if not paused) else enc_cmd <= func_encode_cmd ( // encode non-NOP command else enc_cmd <= func_encode_cmd ( // encode non-NOP command rom_cmd[1]? rom_cmd[1]? row: row: Loading @@ -194,7 +197,7 @@ module cmd_encod_linear_wr #( 1'b0, // buf_wr; // connect to external buffer (but only if not paused) 1'b0, // buf_wr; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_RD] && !cut_buf_rd, //buf_rd;// connect to external buffer (but only if not paused) rom_r[ENC_BUF_RD] && !cut_buf_rd, //buf_rd;// connect to external buffer (but only if not paused) rom_r[ENC_NOP], // nop; // add NOP after the current command, keep other data rom_r[ENC_NOP], // nop; // add NOP after the current command, keep other data rom_r[ENC_BUF_PGNEXT]); // buf_rst; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT] && !skip_next_page); // buf_rst; // connect to external buffer (but only if not paused) end end Loading
memctrl/cmd_encod_tiled_rd.v +4 −4 Original line number Original line Diff line number Diff line Loading @@ -242,7 +242,7 @@ module cmd_encod_tiled_rd #( 4'h7: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (1 << ENC_BUF_WR) | (1 << ENC_DCI) | (1 << ENC_SEL); 4'h7: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (1 << ENC_BUF_WR) | (1 << ENC_DCI) | (1 << ENC_SEL); 4'h8: rom_r <= (ENC_CMD_READ << ENC_CMD_SHIFT) | (1 << ENC_BUF_WR) | (1 << ENC_DCI) | (1 << ENC_SEL); 4'h8: rom_r <= (ENC_CMD_READ << ENC_CMD_SHIFT) | (1 << ENC_BUF_WR) | (1 << ENC_DCI) | (1 << ENC_SEL); 4'h9: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (2 << ENC_PAUSE_SHIFT) | (1 << ENC_BUF_WR) | (1 << ENC_DCI) | (1 << ENC_SEL); 4'h9: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (2 << ENC_PAUSE_SHIFT) | (1 << ENC_BUF_WR) | (1 << ENC_DCI) | (1 << ENC_SEL); 4'ha: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (1 << ENC_DCI) | (1 << ENC_SEL) | (skip_next_page? 1'b0:(1 << ENC_BUF_PGNEXT)); 4'ha: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (1 << ENC_DCI) | (1 << ENC_SEL) | (1 << ENC_BUF_PGNEXT); 4'hb: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (3 << ENC_PAUSE_SHIFT) | (1 << ENC_DCI); 4'hb: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (3 << ENC_PAUSE_SHIFT) | (1 << ENC_DCI); 4'hc: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (1 << ENC_PRE_DONE); 4'hc: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) | (1 << ENC_PRE_DONE); default:rom_r <= 0; default:rom_r <= 0; Loading Loading @@ -272,7 +272,7 @@ module cmd_encod_tiled_rd #( rom_r[ENC_DCI], // dci; // DCI disable, both DQ and DQS lines (internal logic and timing sequencer for 0->1 and 1->0) rom_r[ENC_DCI], // dci; // DCI disable, both DQ and DQS lines (internal logic and timing sequencer for 0->1 and 1->0) rom_r[ENC_BUF_WR], // buf_wr; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_WR], // buf_wr; // connect to external buffer (but only if not paused) 1'b0, // buf_rd; // connect to external buffer (but only if not paused) 1'b0, // buf_rd; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT]); // buf_rst; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT] && !skip_next_page); // buf_rst; // connect to external buffer (but only if not paused) else enc_cmd <= func_encode_cmd ( // encode non-NOP command else enc_cmd <= func_encode_cmd ( // encode non-NOP command rom_cmd[1]? // activate rom_cmd[1]? // activate row_col_bank[FULL_ADDR_NUMBER-1:COLADDR_NUMBER]: // top combined row,column,bank burst address (excludes 3 CA LSBs), valid/modified @pre_act row_col_bank[FULL_ADDR_NUMBER-1:COLADDR_NUMBER]: // top combined row,column,bank burst address (excludes 3 CA LSBs), valid/modified @pre_act Loading @@ -294,7 +294,7 @@ module cmd_encod_tiled_rd #( rom_r[ENC_BUF_WR], // buf_wr; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_WR], // buf_wr; // connect to external buffer (but only if not paused) 1'b0, // buf_rd; // connect to external buffer (but only if not paused) 1'b0, // buf_rd; // connect to external buffer (but only if not paused) rom_r[ENC_NOP], // nop; // add NOP after the current command, keep other data rom_r[ENC_NOP], // nop; // add NOP after the current command, keep other data rom_r[ENC_BUF_PGNEXT]); // buf_rst; // connect to external buffer (but only if not paused) rom_r[ENC_BUF_PGNEXT] && !skip_next_page); // buf_rst; // connect to external buffer (but only if not paused) end end // move to include?, Yes, after fixing problem with paths // move to include?, Yes, after fixing problem with paths Loading