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x393
Commit daf46a7e authored by Andrey Filippov's avatar Andrey Filippov
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more simulation - histograms, transfer over saxi, writing to video memory

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axi/histogram_saxi.v
View file @ daf46a7e
......@@ -126,7 +126,7 @@ module histogram_saxi#(
reg [1:0] mux_sel;
wire start_w;
reg started;
reg [ATTRIB_WIDTH -1:0] attrib; // to hold frame number, sensor number and burst (color) for the histograms in the buffer
reg [4*ATTRIB_WIDTH -1:0] attrib; // to hold frame number, sensor number and burst (color) for the histograms in the buffer
wire page_sent_mclk; // page sent over saxi - pulse in mclk domain
reg [1:0] page_wr; // page number being written
reg [7:0] page_wa; // 32-bit word address in page being written
......@@ -201,7 +201,7 @@ module histogram_saxi#(
assign rq_in = mux_sel[1] ? (mux_sel[0] ? hist_request3 : hist_request2) : (mux_sel[0] ? hist_request1 : hist_request0);
assign sub_chn_w = mux_sel[1] ? (mux_sel[0] ? hist_chn3 : hist_chn2) : (mux_sel[0] ? hist_chn1 : hist_chn0);
assign frame_w = mux_sel[1] ? (mux_sel[0] ? frame3 : frame2) : (mux_sel[0] ? frame1 : frame0);
assign burst_done_w = dav_r && !dav;
assign burst_done_w = dav_r && !dav && en;
assign hist_grant0 = chn_grant[0];
assign hist_grant1 = chn_grant[1];
assign hist_grant2 = chn_grant[2];
......@@ -288,7 +288,9 @@ module histogram_saxi#(
else if ( burst_done_w && !page_sent_mclk) pages_in_buf_wr <= pages_in_buf_wr + 1;
else if (!burst_done_w && page_sent_mclk) pages_in_buf_wr <= pages_in_buf_wr - 1;
grant <= en && rq_in && !buf_full;
// grant <= en && rq_in && !buf_full && (!started || busy_r); // delay grant until chn_sel is set (first cycle of started)
grant <= en && rq_in && !buf_full && (grant || busy_r); // delay grant until chn_sel is set (first cycle of started)
if (!en) chn_grant <= 0;
else chn_grant <= {4{grant}} & chn_sel;
......@@ -323,7 +325,8 @@ module histogram_saxi#(
else block_run <= {block_run[2:0],block_start_w | (block_run[0] & ~ block_end)};
if (!en_aclk) block_start_r <= 0;
else block_start_r <= {block_run[2:0], block_start_w};
// else block_start_r <= {block_run[2:0], block_start_w};
else block_start_r <= {block_start_r[2:0], block_start_w};
if (block_start_r[0]) attrib_r <= attrib[page_rd * ATTRIB_WIDTH +: ATTRIB_WIDTH];
......@@ -331,7 +334,7 @@ module histogram_saxi#(
if (block_start_r[2]) hist_start_addr[31:12] <= hist_start_page_r + attrib_frame;
if (block_start_r[2]) hist_start_addr[11:10] <= attrib_color;
if (block_start_r[3]) start_addr_r[31:6] <= {hist_start_addr[31:10], 4'b0};
if (arst || block_start_r[3]) start_addr_r[31:6] <= {hist_start_addr[31:10], 4'b0};
else if (saxi_start_burst_w) start_addr_r[31:6] <= start_addr_r[31:6] + 1;
if (!en_aclk) first_burst <= 0;
......
includes/x393_parameters.vh
View file @ daf46a7e
......@@ -325,7 +325,7 @@
parameter SENSI2C_STATUS_REG_REL = 0, // 4 locations" 'h20, 'h22, 'h24, 'h26
parameter SENSIO_STATUS_REG_REL = 1, // 4 locations" 'h21, 'h23, 'h25, 'h27
parameter SENSOR_NUM_HISTOGRAM= 3, // number of histogram channels
parameter HISTOGRAM_RAM_MODE = "NOBUF", // valid: "NOBUF" (32-bits, no buffering), "BUF18", "BUF32"
parameter HISTOGRAM_RAM_MODE = "BUF32", // "NOBUF", // valid: "NOBUF" (32-bits, no buffering), "BUF18", "BUF32"
parameter SENS_NUM_SUBCHN = 3, // number of subchannels for his sensor ports (1..4)
parameter SENS_GAMMA_BUFFER = 0, // 1 - use "shadow" table for clean switching, 0 - single table per channel
......
includes/x393_simulation_parameters.vh
View file @ daf46a7e
......@@ -49,8 +49,8 @@
// parameter SENSOR12BITS_RAMP = 1, // 1 - ramp, 0 - random (now - sensor.dat)
// parameter SENSOR12BITS_NEW_BAYER = 0, // 0 - "old" tiles (16x16, 1 - new - (18x18)
parameter HISTOGRAM_LEFT = 0, //2; // left
parameter HISTOGRAM_TOP = 2, // top
parameter HISTOGRAM_LEFT = 0, // 2; // left
parameter HISTOGRAM_TOP = 8, // 2, // top
parameter HISTOGRAM_WIDTH = 6, // width
parameter HISTOGRAM_HEIGHT = 6, // height
parameter HISTOGRAM_STRAT_PAGE = 20'h12345,
......
sensor/sens_histogram.v
View file @ daf46a7e
This diff is collapsed.
sensor/sens_histogram_mux.v
View file @ daf46a7e
......@@ -62,6 +62,7 @@ module sens_histogram_mux(
reg busy_r;
reg [1:0] mux_sel;
wire start_w;
// reg start_r;
reg started;
wire dav_in;
reg dav_out;
......@@ -122,8 +123,11 @@ module sens_histogram_mux(
if (!en) chn_grant <= 0;
else chn_grant <= {4{grant}} & chn_sel;
rq_out <= en && rq_in;
// start_r <= en & start_w;
if (!en ) rq_out <= 0;
else if (started) rq_out <= 1;
else if (rq_out) rq_out <= rq_in;
// rq_out <= en && rq_in;
end
endmodule
......
sensor/sensor_channel.v
View file @ daf46a7e
......@@ -241,6 +241,8 @@ module sensor_channel#(
output [31:0] hist_data // output[31:0] histogram data
);
localparam HIST_MONOCHROME = 1'b0; // TODO:make it configurable (at expense of extra hardware)
localparam SENSOR_BASE_ADDR = (SENSOR_GROUP_ADDR + SENSOR_NUMBER * SENSOR_BASE_INC);
localparam SENSI2C_STATUS_REG = (SENSI2C_STATUS_REG_BASE + SENSOR_NUMBER * SENSI2C_STATUS_REG_INC + SENSI2C_STATUS_REG_REL);
......@@ -678,7 +680,8 @@ module sensor_channel#(
.hist_do (hist_do0), // output[31:0]
.hist_dv (hist_dv[0]), // output
.cmd_ad (cmd_ad), // input[7:0]
.cmd_stb (cmd_stb) // input
.cmd_stb (cmd_stb), // input
.monochrome (HIST_MONOCHROME) // input
);
else
sens_histogram_dummy sens_histogram_dummy_i (
......@@ -712,7 +715,8 @@ module sensor_channel#(
.hist_do (hist_do1), // output[31:0]
.hist_dv (hist_dv[1]), // output
.cmd_ad (cmd_ad), // input[7:0]
.cmd_stb (cmd_stb) // input
.cmd_stb (cmd_stb), // input
.monochrome (HIST_MONOCHROME) // input
);
else
sens_histogram_dummy sens_histogram_dummy_i (
......@@ -746,7 +750,8 @@ module sensor_channel#(
.hist_do (hist_do2), // output[31:0]
.hist_dv (hist_dv[2]), // output
.cmd_ad (cmd_ad), // input[7:0]
.cmd_stb (cmd_stb) // input
.cmd_stb (cmd_stb), // input
.monochrome (HIST_MONOCHROME) // input
);
else
sens_histogram_dummy sens_histogram_dummy_i (
......@@ -780,7 +785,8 @@ module sensor_channel#(
.hist_do (hist_do3), // output[31:0]
.hist_dv (hist_dv[3]), // output
.cmd_ad (cmd_ad), // input[7:0]
.cmd_stb (cmd_stb) // input
.cmd_stb (cmd_stb), // input
.monochrome (HIST_MONOCHROME) // input
);
else
sens_histogram_dummy sens_histogram_dummy_i (
......@@ -792,7 +798,7 @@ module sensor_channel#(
sens_histogram_mux sens_histogram_mux_i (
.mclk (mclk), // input
.en (!(|hist_nrst)), // input
.en (|hist_nrst), // input
.rq0 (hist_rq[0]), // input
.grant0 (hist_gr[0]), // output
.dav0 (hist_dv[0]), // input
......
sensor/sensor_membuf.v
View file @ daf46a7e
......@@ -24,6 +24,8 @@ module sensor_membuf #(
parameter WADDR_WIDTH=9 // for 36Kb RAM
)(
input pclk,
input prst, // reset @ posedge pclk
input mrst, // reset @ posedge mclk
input [15:0] px_data, // @posedge pclk pixel (pixel pair) data from the sensor channel
input px_valid, // px_data valid
input last_in_line, // valid with px_valid - last px_data in line
......@@ -31,7 +33,7 @@ module sensor_membuf #(
input mclk, // memory interface clock
input rpage_set, // set internal read page to rpage_in (reset pointers)
input rpage_next, // advance to next page (and reset lower bits to 0)
input buf_rd, // read buffer to memory, increment read address (regester enable will be delayed)
input buf_rd, // read buffer to memory, increment read address (register enable will be delayed)
output [63:0] buf_dout, // data out
output page_written // buffer page (full or partial) is written to the memory buffer
......@@ -41,7 +43,7 @@ module sensor_membuf #(
reg [1:0] wpage;
reg [WADDR_WIDTH-1:0] waddr;
reg sim_rst = 1; // jsut for simulation - reset from system reset to the first rpage_set
// reg sim_rst = 1; // jsut for simulation - reset from system reset to the first rpage_set
reg [2:0] rst_pntr;
wire rst_wpntr;
wire inc_wpage_w;
......@@ -49,19 +51,19 @@ module sensor_membuf #(
assign inc_wpage_w = px_valid && (last_in_line || (&waddr));
always @ (posedge mclk) begin
rst_pntr <= {rst_pntr[1] &~rst_pntr[0], rst_pntr[0], rpage_set};
if (rpage_set) sim_rst <= 0;
// if (rpage_set) sim_rst <= 0;
end
always @ (posedge pclk) begin
if (rst_wpntr || (px_valid && last_in_line)) waddr <= 0;
if (prst || rst_wpntr || (px_valid && last_in_line)) waddr <= 0;
else if (px_valid) waddr <= waddr + 1;
if (rst_wpntr) wpage <= 0;
if (prst || rst_wpntr) wpage <= 0;
else if (inc_wpage_w) wpage <= wpage + 1;
end
pulse_cross_clock rst_wpntr_i (
.rst (sim_rst),
.rst (mrst), // sim_rst),
.src_clk (mclk),
.dst_clk (pclk),
.in_pulse (rst_pntr[2]),
......@@ -70,7 +72,7 @@ module sensor_membuf #(
);
pulse_cross_clock page_written_i (
.rst (sim_rst),
.rst (prst), // sim_rst || rpage_set),
.src_clk (pclk),
.dst_clk (mclk),
.in_pulse (inc_wpage_w),
......
sensor/sensors393.v
View file @ daf46a7e
......@@ -512,6 +512,8 @@ module sensors393 #(
.WADDR_WIDTH(9)
) sensor_membuf_i (
.pclk (pclk), // input
.prst (prst), // input
.mrst (mrst), // input
.px_data (px_data[16 * i +: 16]), // input[15:0]
.px_valid (px_valid[i]), // input
.last_in_line (last_in_line[i]), // input
......
x393_testbench02.tf
View file @ daf46a7e
......@@ -1858,6 +1858,8 @@ task setup_sensor_channel;
window_left, // input [31:0] window_left;
window_top); // input [31:0] window_top;
// Enable arbitration of sensor-to-memory controller
enable_memcntrl_en_dis(4'h8 + {2'b0,num_sensor}, 1);
TEST_TITLE = "CAMSYNC_SETUP";
$display("===================== TEST_%s =========================",TEST_TITLE);
......@@ -1952,8 +1954,8 @@ task setup_sensor_channel;
// add mode "DIRECT", "ASAP", "RELATIVE", "ABSOLUTE" and frame number
19'h20000, // 0, // input [18:0] AX;
19'h20000, // 0, // input [18:0] AY;
0, // input [20:0] BX;
0, // input [20:0] BY;
21'h180000, //0, // input [20:0] BX;
21'h180000, //0, // input [20:0] BY;
'h8000, // input [18:0] C;
32768, // input [16:0] scales0;
32768, // input [16:0] scales1;
......@@ -1983,8 +1985,8 @@ task setup_sensor_channel;
0, // input [1:0] subchannel; // subchannel number (for multiplexed images)
HISTOGRAM_LEFT, // input [15:0] left;
HISTOGRAM_TOP, // input [15:0] top;
HISTOGRAM_WIDTH-2, // input [15:0] width_m1; // one less than window width. If 0 - use frame right margin (end of HACT)
HISTOGRAM_HEIGHT-2); // input [15:0] height_m1; // one less than window height. If 0 - use frame bottom margin (end of VACT)
HISTOGRAM_WIDTH-1, // input [15:0] width_m1; // one less than window width. If 0 - use frame right margin (end of HACT)
HISTOGRAM_HEIGHT-1); // input [15:0] height_m1; // one less than window height. If 0 - use frame bottom margin (end of VACT)
set_sensor_histogram_saxi_addr (
num_sensor, // input [1:0] num_sensor; // sensor channel number (0..3)
......
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