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Elphel
x393
Commits
d8258888
Commit
d8258888
authored
Mar 22, 2021
by
Andrey Filippov
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adding trigger decimation
parent
44928b65
Changes
8
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8 changed files
with
123 additions
and
31 deletions
+123
-31
fpga_version.vh
fpga_version.vh
+2
-1
x393_parameters.vh
includes/x393_parameters.vh
+3
-0
vrlg.py
py393/vrlg.py
+9
-0
x393_export_c.py
py393/x393_export_c.py
+8
-1
camsync393.v
timing/camsync393.v
+92
-29
timing393.v
timing/timing393.v
+6
-0
x393.v
x393.v
+3
-0
x393_parallel.bit
x393_parallel.bit
+0
-0
No files found.
fpga_version.vh
View file @
d8258888
...
...
@@ -35,7 +35,8 @@
* contains all the components and scripts required to completely simulate it
* with at least one of the Free Software programs.
*/
parameter FPGA_VERSION = 32'h03931001; // parallel, fixing delays
parameter FPGA_VERSION = 32'h03931002; // parallel, adding camsync trigger decimation
// parameter FPGA_VERSION = 32'h03931001; // parallel, fixing delays // git commit
// parameter FPGA_VERSION = 32'h03930220; // pull down ot serial in to detect sensor presense NOT created
// parameter FPGA_VERSION = 32'h0393021f; // (ext resistor) low_pwr, DIFF_SSTL18_I pclk phase 0.0 mmcm phase -22.5 (multiple of 1.5)
// parameter FPGA_VERSION = 32'h0393021e; // internal 100ohm, low_pwr, LVDS_25 pclk phase 0.0 mmcm phase -22.5 (multiple of 1.5)
...
...
includes/x393_parameters.vh
View file @
d8258888
...
...
@@ -958,6 +958,9 @@
parameter RTC_SEC_USEC_ADDR = 'h32, // ..'h33 address where seconds of the snapshot can be read (microseconds - next address)
parameter RTC_MASK = 'h7fc,
parameter CAMSYNC_MASK = 'h7f8,
parameter CAMSYNC_DECIMATE_ADDR = 'h714,
parameter CAMSYNC_DECIMATE_MASK = 'h7fc,
parameter CAMSYNC_DECIMATE_BITS = 16,
parameter CAMSYNC_MODE = 'h0,
parameter CAMSYNC_TRIG_SRC = 'h1, // setup trigger source
parameter CAMSYNC_TRIG_DST = 'h2, // setup trigger destination line(s)
...
...
py393/vrlg.py
View file @
d8258888
...
...
@@ -217,6 +217,15 @@ CAMSYNC_ADDR__TYPE = str
CAMSYNC_CHN_EN_BIT
=
int
CAMSYNC_CHN_EN_BIT__RAW
=
str
CAMSYNC_CHN_EN_BIT__TYPE
=
str
CAMSYNC_DECIMATE_ADDR
=
int
CAMSYNC_DECIMATE_ADDR__RAW
=
str
CAMSYNC_DECIMATE_ADDR__TYPE
=
str
CAMSYNC_DECIMATE_BITS
=
int
CAMSYNC_DECIMATE_BITS__RAW
=
str
CAMSYNC_DECIMATE_BITS__TYPE
=
str
CAMSYNC_DECIMATE_MASK
=
int
CAMSYNC_DECIMATE_MASK__RAW
=
str
CAMSYNC_DECIMATE_MASK__TYPE
=
str
CAMSYNC_DELAY
=
int
CAMSYNC_DELAY__RAW
=
str
CAMSYNC_DELAY__TYPE
=
str
...
...
py393/x393_export_c.py
View file @
d8258888
...
...
@@ -1113,6 +1113,13 @@ class X393ExportC(object):
((
"X393_CAMSYNC_TRIG_PERIOD"
,
c
,
vrlg
.
CAMSYNC_TRIG_PERIOD
+
ba
,
0
,
z3
,
"u32*"
,
"rw"
,
"CAMSYNC trigger period"
)),
((
"X393_CAMSYNC_TRIG_DELAY"
,
c
,
vrlg
.
CAMSYNC_TRIG_DELAY0
+
ba
,
1
,
z3
,
"u32*"
,
"rw"
,
"CAMSYNC trigger delay"
))]
ba
=
vrlg
.
CAMSYNC_DECIMATE_ADDR
ia
=
0
c
=
"sens_chn"
sdefines
+=
[
((
'CAMSYNC trigger decimation'
,)),
((
"X393_CAMSYNC_TRIG_DECIMATION"
,
c
,
0
+
ba
,
1
,
z3
,
"u32*"
,
"rw"
,
"CAMSYNC trigger decimation"
))]
ba
=
vrlg
.
CMDFRAMESEQ_ADDR_BASE
ia
=
vrlg
.
CMDFRAMESEQ_ADDR_INC
c
=
"sens_chn"
...
...
timing/camsync393.v
View file @
d8258888
This diff is collapsed.
Click to expand it.
timing/timing393.v
View file @
d8258888
...
...
@@ -45,6 +45,9 @@ module timing393 #(
parameter
RTC_SEC_USEC_ADDR
=
'h32
,
// ..'h33 address where seconds of the snapshot can be read (microseconds - next address)
parameter
RTC_MASK
=
'h7fc
,
parameter
CAMSYNC_MASK
=
'h7f8
,
parameter
CAMSYNC_DECIMATE_ADDR
=
'h714
,
parameter
CAMSYNC_DECIMATE_MASK
=
'h7fc
,
parameter
CAMSYNC_DECIMATE_BITS
=
16
,
parameter
CAMSYNC_MODE
=
'h0
,
parameter
CAMSYNC_TRIG_SRC
=
'h1
,
// setup trigger source
parameter
CAMSYNC_TRIG_DST
=
'h2
,
// setup trigger destination line(s)
...
...
@@ -261,6 +264,9 @@ module timing393 #(
camsync393
#(
.
CAMSYNC_ADDR
(
CAMSYNC_ADDR
)
,
.
CAMSYNC_MASK
(
CAMSYNC_MASK
)
,
.
CAMSYNC_DECIMATE_ADDR
(
CAMSYNC_DECIMATE_ADDR
)
,
.
CAMSYNC_DECIMATE_MASK
(
CAMSYNC_DECIMATE_MASK
)
,
.
CAMSYNC_DECIMATE_BITS
(
CAMSYNC_DECIMATE_BITS
)
,
.
CAMSYNC_MODE
(
CAMSYNC_MODE
)
,
.
CAMSYNC_TRIG_SRC
(
CAMSYNC_TRIG_SRC
)
,
.
CAMSYNC_TRIG_DST
(
CAMSYNC_TRIG_DST
)
,
...
...
x393.v
View file @
d8258888
...
...
@@ -2512,6 +2512,9 @@ assign axi_grst = axi_rst_pre;
.
RTC_SEC_USEC_ADDR
(
RTC_SEC_USEC_ADDR
)
,
.
RTC_MASK
(
RTC_MASK
)
,
.
CAMSYNC_MASK
(
CAMSYNC_MASK
)
,
.
CAMSYNC_DECIMATE_ADDR
(
CAMSYNC_DECIMATE_ADDR
)
,
.
CAMSYNC_DECIMATE_MASK
(
CAMSYNC_DECIMATE_MASK
)
,
.
CAMSYNC_DECIMATE_BITS
(
CAMSYNC_DECIMATE_BITS
)
,
.
CAMSYNC_MODE
(
CAMSYNC_MODE
)
,
.
CAMSYNC_TRIG_SRC
(
CAMSYNC_TRIG_SRC
)
,
.
CAMSYNC_TRIG_DST
(
CAMSYNC_TRIG_DST
)
,
...
...
x393_parallel.bit
View file @
d8258888
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