Skip to content

X
x393
Commit d30c9b6a authored by Andrey Filippov's avatar Andrey Filippov
Browse files
Options

Introducing new parameters and other changes to implement raw data out.

parent b482a8ea
Hide whitespace changes
Inline Side-by-side
Showing with 212 additions and 293 deletions
compressor_jp/cmprs_cmd_decode.v
View file @ d30c9b6a
......@@ -73,7 +73,11 @@
// 3 - combine in window only
// [20] == 1 - set Bayer shift
// [19:18] Bayer shift
// [17:16] - unused
// WAS: [17:16] - unused
// [17] == 1 - set BE16 mode
// [16] 0 - BE16 mode (1 - byte stream is little endian 16-bit, file is big endian 16 bits
// [15] == 1 - set single/multi frame mode
// [14] 0 - multiframe (compare frame numbers for 'suspend' output)
// 1 - single frame buffer
......@@ -85,7 +89,15 @@
// 4 - mono, 4 blocks (but still not actual monochrome JPEG as the blocks are scanned in 2x2 macroblocks)
// 5 - jp4, 4 blocks, dc-improved
// 6 - jp4, differential
// 7 - 15 - reserved
// 7 - jp4, 4 blocks, differential
// 8 - jp4, 4 blocks, differential, hdr
// 9 - jp4, 4 blocks, differential, divide by 2
// 10 - jp4, 4 blocks, differential, hdr,divide by 2
// 11 - mono JPEG (not yet implemented)
// 12-13 - RESERVED
// 14 - mono 4 blocks
// 15 - uncompressed
// [8:7] == 0,1 - NOP, 2 - disable, 3 - enable subtracting of average value (DC component), bypassing DCT
// [6] == 1 - enable quantization bank select, 0 - disregard bits [5:3]
// [5:3] = quantization page number (0..7)
......@@ -95,7 +107,7 @@
// 2 - enable compressor, compress single frame from memory (async)
// 3 - enable compressor, enable synchronous compression mode
// TODO WARNING: Switching to/from raw(uncompressed) mode requires stopping/restarting compressor!
module cmprs_cmd_decode#(
// Bit-fields in compressor control word
......@@ -109,6 +121,10 @@ module cmprs_cmd_decode#(
parameter CMPRS_CBIT_CMODE_BITS = 4, // number of bits to control compressor color modes
parameter CMPRS_CBIT_FRAMES = 15, // bit # to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_FRAMES_BITS = 1, // number of bits to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BE16 = 17, // bit # to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BE16_BITS = 1, // number of bits to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BAYER = 20, // bit # to control compressor Bayer shift mode
parameter CMPRS_CBIT_BAYER_BITS = 2, // number of bits to control compressor Bayer shift mode
parameter CMPRS_CBIT_FOCUS = 23, // bit # to control compressor focus display mode
......@@ -118,6 +134,7 @@ module cmprs_cmd_decode#(
// parameter CMPRS_CBIT_RUN_DISABLE = 2'h1, // disable compression of the new frames, finish any already started
parameter CMPRS_CBIT_RUN_STANDALONE = 2'h2, // enable compressor, compress single frame from memory (async)
parameter CMPRS_CBIT_RUN_ENABLE = 2'h3, // enable compressor, enable synchronous compression mode
parameter CMPRS_CBIT_CMODE_JPEG18 = 4'h0, // color 4:2:0
parameter CMPRS_CBIT_CMODE_MONO6 = 4'h1, // mono 4:2:0 (6 blocks)
parameter CMPRS_CBIT_CMODE_JP46 = 4'h2, // jp4, 6 blocks, original
......@@ -131,6 +148,8 @@ module cmprs_cmd_decode#(
parameter CMPRS_CBIT_CMODE_JP4DIFFHDRDIV2 = 4'ha, // jp4, 4 blocks, differential, hdr,divide by 2
parameter CMPRS_CBIT_CMODE_MONO1 = 4'hb, // mono JPEG (not yet implemented)
parameter CMPRS_CBIT_CMODE_MONO4 = 4'he, // mono 4 blocks
parameter CMPRS_CBIT_CMODE_RAW = 4'hf, // uncompressed
parameter CMPRS_CBIT_FRAMES_SINGLE = 0, //1, // use a single-frame buffer for images
parameter CMPRS_COLOR18 = 0, // JPEG 4:2:0 with 18x18 overlapping tiles for de-bayer
......@@ -138,7 +157,8 @@ module cmprs_cmd_decode#(
parameter CMPRS_MONO16 = 2, // JPEG 4:2:0 with 16x16 non-overlapping tiles, color components zeroed
parameter CMPRS_JP4 = 3, // JP4 mode with 16x16 macroblocks
parameter CMPRS_JP4DIFF = 4, // JP4DIFF mode TODO: see if correct
parameter CMPRS_MONO8 = 7, // Regular JPEG monochrome with 8x8 macroblocks (not yet implemented)
parameter CMPRS_RAW = 6, // Not comressed, raw data
parameter CMPRS_MONO8 = 7, // Regular JPEG monochrome with 8x8 macroblocks (not yet implemented)
parameter CMPRS_FRMT_MBCM1 = 0, // bit # of number of macroblock columns minus 1 field in format word
parameter CMPRS_FRMT_MBCM1_BITS = 13, // number of bits in number of macroblock columns minus 1 field in format word
......@@ -152,11 +172,8 @@ module cmprs_cmd_decode#(
parameter CMPRS_CSAT_CR_BITS = 10, // number of bits in red scale field in color saturation word
parameter CMPRS_CORING_BITS = 3 // number of bits in coring mode
//parameter CMPRS_STUFFER_NEG = 1 // stuffer runs @ negedge xclk2x
)(
// input rst,
input xclk, // global clock input, compressor single clock rate
input mclk, // global system/memory clock
input mrst, // @posedge mclk, sync reset
......@@ -165,11 +182,7 @@ module cmprs_cmd_decode#(
input color_sat_we, // input - @mclk write color saturation values
input coring_we, // input - @mclk write coring values
// rs, // 0 - bit modes,
// // 1 - write ntiles;
input [31:0] di, // [15:0] data from CPU (sync to negedge sclk)
// cr_w, // data written to cr (1 cycle long) - just to reset legacy IRQ
// ntiles,//[17:0] - number of tiles in a frame to process
input frame_start, // @mclk
output frame_start_xclk, // frame start, parameters are copied at this pulse
......@@ -183,14 +196,13 @@ module cmprs_cmd_decode#(
output reg sigle_frame_buf, // memory controller uses a single frame buffer (frame_number_* == 0), use other sync
// outputs sync @ posedge xclk:
output reg cmprs_en_xclk, // enable compressor, turn off immedaitely
output reg cmprs_en_late_xclk, // enable stuffer, extends control fields for graceful shutdown
// cmprs_start, // single cycle when single or constant compression is turned on
// cmprs_repeat,// high in repetitive mode
output reg cmprs_en_xclk_jp, // enable compressor, turn off immedaitely
output reg cmprs_en_xclk_raw, // enable compressor, turn off immedaitely
output reg cmprs_en_late_xclk, // enable stuffer, extends control fields for graceful shutdown (should be for raw also?)
// outputs @posedge xclk, frozen when the new frame is requested
output reg [ 2:0] cmprs_qpage, // [2:0] - quantizator page number (0..7)
output reg cmprs_dcsub, // subtract dc level before DCT, restore later
// output reg [ 3:0] cmprs_mode, // [3:0] - compressor mode
// cmprs_shift, // tile shift from top left corner
output reg [ 1:0] cmprs_fmode, //[1:0] - focus mode
output reg [ 1:0] bayer_shift, // additional shift to bayer mosaic
......@@ -208,15 +220,10 @@ module cmprs_cmd_decode#(
output reg [CMPRS_CSAT_CB_BITS-1:0] color_sat_cb, // scale for Cb color component (color saturation)
output reg [CMPRS_CSAT_CR_BITS-1:0] color_sat_cr, // scale for Cr color component (color saturation)
output reg [CMPRS_CORING_BITS-1:0] coring // scale for Cb color component (color saturation)
output reg [CMPRS_CORING_BITS-1:0] coring, // scale for Cb color component (color saturation)
output reg uncompressed,
output reg be16
);
// input is_compressing, // high from start of compressing till EOT (sync to posedge clk)
// abort_compress,
// input stuffer_done_mclk,
// output reg force_flush); // abort compress - generate flush pulse, force end of image over DMA, update counter
reg [30:0] di_r;
reg ctrl_we_r;
......@@ -252,9 +259,11 @@ module cmprs_cmd_decode#(
reg [30:0] format_xclk; // left margin and macroblock rows/columns
reg [23:0] color_sat_xclk; // color saturation values (only 10 LSB in each 12 are used
reg [ 2:0] coring_xclk; // color saturation values (only 10 LSB in each 12 are used
// wire frame_start_xclk;
wire uncompressed_mclk;
assign cmprs_en_mclk = cmprs_en_mclk_r;
assign uncompressed_mclk = cmprs_mode_mclk[3:0] == CMPRS_CBIT_CMODE_RAW;
always @ (posedge mclk) begin
if (mrst) ctrl_we_r <= 0;
......@@ -279,12 +288,14 @@ module cmprs_cmd_decode#(
else if (ctrl_we_r && di_r[CMPRS_CBIT_RUN]) cmprs_run_mclk <= (di_r[CMPRS_CBIT_RUN-1 -:CMPRS_CBIT_RUN_BITS] == CMPRS_CBIT_RUN_ENABLE);
if (mrst) cmprs_standalone <= 0;
// else if (ctrl_we_r) cmprs_standalone <= ctrl_we_r && di_r[CMPRS_CBIT_RUN] && (di_r[CMPRS_CBIT_RUN-1 -:CMPRS_CBIT_RUN_BITS] == CMPRS_CBIT_RUN_STANDALONE);
else cmprs_standalone <= ctrl_we_r && di_r[CMPRS_CBIT_RUN] && (di_r[CMPRS_CBIT_RUN-1 -:CMPRS_CBIT_RUN_BITS] == CMPRS_CBIT_RUN_STANDALONE);
if (mrst) sigle_frame_buf <= 0;
else if (ctrl_we_r && di_r[CMPRS_CBIT_FRAMES]) sigle_frame_buf <= (di_r[CMPRS_CBIT_FRAMES-1 -:CMPRS_CBIT_FRAMES_BITS] == CMPRS_CBIT_FRAMES_SINGLE);
if (mrst) be16 <= 0;
else if (ctrl_we_r && di_r[CMPRS_CBIT_BE16]) be16 <= (di_r[CMPRS_CBIT_BE16-1 -:CMPRS_CBIT_BE16_BITS] == 1);
if (mrst) cmprs_qpage_mclk <= 0;
else if (ctrl_we_r && di_r[CMPRS_CBIT_QBANK]) cmprs_qpage_mclk <= di_r[CMPRS_CBIT_QBANK-1 -:CMPRS_CBIT_QBANK_BITS];
......@@ -316,9 +327,14 @@ module cmprs_cmd_decode#(
always @ (posedge xclk) begin
cmprs_en_xclk <= cmprs_en_mclk_r;
cmprs_en_late_xclk <= cmprs_en_mclk_r || cmprs_en_extend;
if (!cmprs_en_mclk_r) cmprs_en_xclk_jp <= 0;
else if (ctrl_we_xclk) cmprs_en_xclk_jp <= cmprs_en_mclk_r && !uncompressed_mclk;
if (!cmprs_en_mclk_r) cmprs_en_xclk_raw <= 0;
else if (ctrl_we_xclk) cmprs_en_xclk_raw <= cmprs_en_mclk_r && uncompressed_mclk;
end
always @ (posedge xclk) if (ctrl_we_xclk) begin
// cmprs_en_late_xclk <= cmprs_en_mclk_r || cmprs_en_extend;
cmprs_qpage_xclk <= cmprs_qpage_mclk;
cmprs_dcsub_xclk <= cmprs_dcsub_mclk;
cmprs_mode_xclk <= cmprs_mode_mclk;
......@@ -450,6 +466,11 @@ module cmprs_cmd_decode#(
jp4_dc_improved <= 0;
converter_type[2:0] <= CMPRS_MONO8; // 0 - color18, 1 - color20, 2 - mono, 3 - jp4, 4 - jp4-diff
end
CMPRS_CBIT_CMODE_RAW: begin // uncompressed
converter_type[2:0] <= CMPRS_RAW; // 0 - color18, 1 - color20, 2 - mono, 3 - jp4, 4 - jp4-diff
end
default: begin //
ignore_color <= 'bx;
four_blocks <= 'bx;
......@@ -457,6 +478,7 @@ module cmprs_cmd_decode#(
converter_type[2:0] <= 'bx;
end
endcase
uncompressed <= cmprs_mode_xclk[3:0] == CMPRS_CBIT_CMODE_RAW;
end
......
compressor_jp/cmprs_frame_sync.v
View file @ d30c9b6a
......@@ -45,7 +45,6 @@ module cmprs_frame_sync#(
parameter CMPRS_TIMEOUT= 1000 // mclk cycles
)(
// input rst,
input xclk, // global clock input, compressor single clock rate
input mclk, // global system/memory clock
input mrst, // @posedge mclk, sync reset
......@@ -88,7 +87,7 @@ module cmprs_frame_sync#(
output reg force_flush_long, // force flush (abort frame), can be any clock and may last until stuffer_done_mclk
// stuffer will re-clock and extract 0->1 transition
output stuffer_running_mclk,
output reading_frame,
output reading_frame, // @mclk
output frame_started_mclk // use to store frame number
);
/*
......@@ -101,8 +100,6 @@ module cmprs_frame_sync#(
TODO: Simplify logic: instead of frame_start_pend_r - copy frame_number_srtc @ vsync_late, and start frame if it is not reading,
in "run" mode, and frame_number_differ (in multi-frame mode)
*/
// wire vsync_late_mclk; // single mclk cycle, reclocked from vsync_late
// wire frame_started_mclk;
reg bonded_mode;
reg [5:0] frame_start_dst_r;
reg frame_start_pend_r; // postpone frame_start_dst if previous frame was still being read during vsync_late
......@@ -111,14 +108,12 @@ module cmprs_frame_sync#(
reg line_numbers_sync; // src unfinished line number is > this unfinished line number
reg reading_frame_r; // compressor is reading frame data (make sure input is done before starting next frame, otherwise make it a broken frame
// reg broken_frame;
reg aborted_frame;
reg stuffer_running_mclk_r;
reg [CMPRS_TIMEOUT_BITS-1:0] timeout;
reg cmprs_en_extend_r=0;
reg cmprs_en_d;
reg suspend_end; // suspend at the end of the current frame until frame number changes
// reg cmprs_en_xclk;
wire last_mb_started_mclk;
assign frame_start_dst = frame_start_dst_r[0];
assign cmprs_en_extend = cmprs_en_extend_r;
......@@ -126,9 +121,6 @@ module cmprs_frame_sync#(
assign stuffer_running_mclk = stuffer_running_mclk_r;
assign reading_frame = reading_frame_r;
// always @ (posedge xclk) begin
// cmprs_en_xclk <=cmprs_en;
// end
always @ (posedge mclk) begin
if (mrst) cmprs_en_extend_r <= 0;
else if (cmprs_en) cmprs_en_extend_r <= 1;
......@@ -145,28 +137,18 @@ module cmprs_frame_sync#(
cmprs_en_d <= cmprs_en;
// broken_frame <= cmprs_en && cmprs_run && vsync_late && reading_frame_r; // single xclk pulse
aborted_frame <= cmprs_en_d && !cmprs_en && stuffer_running_mclk_r;
if (!stuffer_running_mclk_r ||!cmprs_en_extend_r) force_flush_long <= 0;
// else if (broken_frame || aborted_frame) force_flush_long <= 1;
else if (aborted_frame) force_flush_long <= 1;
// if (!cmprs_en || frame_done || (cmprs_run && vsync_late)) reading_frame_r <= 0;
// last_mb_start[2] is used as emergency turn off reading_frame if memory channel did not generate frame_done (i.e. wrong frame height)
// TODO: Consider the opposite - frame_done, but not got the last MB?
if (!cmprs_en || frame_done || last_mb_started_mclk) reading_frame_r <= 0;
else if (frame_started_mclk) reading_frame_r <= 1;
// if (!cmprs_run || frame_start_dst_r[0]) frame_start_pend_r <= 0;
if (!cmprs_run || frame_start_conf) frame_start_pend_r <= 0;
if (!cmprs_run || frame_start_conf) frame_start_pend_r <= 0;
else if ((cmprs_run && vsync_late && reading_frame_r) ||
(frame_start_dst_r[5] && bonded_mode && frames_numbers_differ)) frame_start_pend_r <= 1;
// else if (frame_start_dst_r[0]) frame_start_pend_r <= 0;
// If started frame differs from tghe source one, needs to comrfess next frame after this is done, without vsync_late
// else if (frame_start_dst_r[5] ) frame_start_pend_r <= bonded_mode && frames_numbers_differ;
// if (!cmprs_en) suspend_end <= 0;
if (!cmprs_run) suspend_end <= 0;
else if (frame_done) suspend_end <= 1;
else if (frame_start_dst_r[3]) suspend_end <= 0;
......@@ -176,7 +158,6 @@ module cmprs_frame_sync#(
cmprs_standalone);
// modified - now bit 0 is disconnected from 1..5, 1 gets from memory channel controller, may be delayed
if (!cmprs_en) frame_start_dst_r[5:1] <=0;
// else frame_start_dst_r[5:1] <= frame_start_dst_r[4:0];
else frame_start_dst_r[5:1] <= {frame_start_dst_r[4:1],frame_start_conf};
if (!cmprs_en) bonded_mode <= 0;
......@@ -188,14 +169,12 @@ module cmprs_frame_sync#(
frames_numbers_differ <= !suspend_end && (frame_number_src != frame_number); // during end of frame, before frame number is incremented
/// line_numbers_sync <= (line_unfinished_src > line_unfinished);
line_numbers_sync <= (line_unfinished_src >= line_unfinished);
suspend <= bonded_mode && (!frames_in_sync || !((sigle_frame_buf ? frames_differ : frames_numbers_differ) || line_numbers_sync));
end
// pulse_cross_clock vsync_late_mclk_i (.rst(xrst), .src_clk(xclk), .dst_clk(mclk), .in_pulse(cmprs_en_xclk && vsync_late), .out_pulse(vsync_late_mclk),.busy());
pulse_cross_clock frame_started_i (.rst(xrst), .src_clk(xclk), .dst_clk(mclk), .in_pulse(frame_started), .out_pulse(frame_started_mclk),.busy());
pulse_cross_clock last_mb_started_i (.rst(xrst), .src_clk(xclk), .dst_clk(mclk), .in_pulse(last_mb_started), .out_pulse(last_mb_started_mclk),.busy());
......
compressor_jp/cmprs_pixel_buf_iface.v
View file @ d30c9b6a
......@@ -117,7 +117,6 @@ module cmprs_pixel_buf_iface #(
reg [ 2:0] mb_col_number; // number of tile column where macrobloc starts - valid 2 cycles before mb_pre_start
wire [ 9:0] extra_start_addr_w = mb_col_number * mb_h_m1; //added to mb_start_addr when non-zero column
reg [ 5:0] extra_start_addr_r;
// reg [ 5:0] mb_h; // macroblock height (lost MSB - OK)
reg [ 9:0] mb_start_addr; // was macroblock_x, noccrected for multi-column. valid with mb_pre_start
assign buf_ra = bufa_r;
......@@ -130,7 +129,6 @@ module cmprs_pixel_buf_iface #(
assign mb_pre_end = mb_pre_end_r;
assign mb_release_buf = mb_release_buf_r;
assign buf_rd = buf_re[1:0];
// assign data_out = do_r;
assign pre_first_out = pre_first_out_r[0];
assign pre2_first_out = pre_first_out_r[1];
`ifdef DEBUG_COMPRESSOR_SCRAMBLE
......@@ -147,7 +145,6 @@ module cmprs_pixel_buf_iface #(
`endif
always @(posedge xclk) begin
// mb_h <= mb_h_m1+1; // macroblock height
mb_col_number <= {macroblock_x[6:5],tile_col_width?1'b0:macroblock_x[4]};
extra_start_addr_r <= extra_start_addr_w[5:0];
mb_start_addr <= {3'b0,macroblock_x} + {extra_start_addr_r,4'b0};
......@@ -164,10 +161,6 @@ module cmprs_pixel_buf_iface #(
//mb_pre_start
if (!frame_en) pre_first_out_r <= 0;
else pre_first_out_r <= {mb_pre_start, pre_first_out_r[CMPRS_BUF_EXTRA_LATENCY + 2 : 1]};
// else pre_first_out_r <= buf_re[CMPRS_BUF_EXTRA_LATENCY+1] && ! buf_re[CMPRS_BUF_EXTRA_LATENCY+2];
// if (!frame_en) pre2_first_out <= 0;
// else pre2_first_out <= buf_re[CMPRS_BUF_EXTRA_LATENCY + 0] && ! buf_re[CMPRS_BUF_EXTRA_LATENCY + 1];
if (mb_pre_start) rows_left <= mb_h_m1;
else if (last_col) rows_left <= rows_left - 1;
......@@ -177,17 +170,14 @@ module cmprs_pixel_buf_iface #(
if (!frame_en) buf_re[CMPRS_BUF_EXTRA_LATENCY+2:1] <= 0;
// if (buf_re[0]) last_col <= 0; // ????
if (!buf_re[0]) last_col <= 0;
else last_col <= (cols_left == 1);
// if (buf_re[0]) last_row <= 0;
if (!buf_re[0]) last_row <= 0;
else if (last_col) last_row <= (rows_left == 1);
first_col <= (mb_pre_start || (last_col && !last_row));
// if (mb_pre_start) row_sa <= {start_page,3'b0,mb_start_addr}; // macroblock_x};
if (mb_pre_start) row_sa <= {start_page,mb_start_addr}; // macroblock_x};
else if (first_col) row_sa <= row_sa + (tile_col_width ? 12'h20:12'h10);
......@@ -207,7 +197,6 @@ module cmprs_pixel_buf_iface #(
else if (last_in_tile) bufa_r[11:10] <= bufa_r[11:10] + 1;
// Most time critical - calculation of the buffer address
// if (mb_pre_start) bufa_r[9:0] <= {3'b0,mb_start_addr}; // macroblock_x};
if (mb_pre_start) bufa_r[9:0] <= {mb_start_addr}; // macroblock_x};
else if (last_col) bufa_r[9:0] <= row_sa[9:0]; // 'bx next cycle after AFTER mb_pre_start
else if (last_in_tile) bufa_r[9:0] <= tile_sa;
......
compressor_jp/compressor393.v
View file @ d30c9b6a
......@@ -78,6 +78,8 @@ module compressor393 # (
parameter CMPRS_CBIT_CMODE_BITS = 4, // number of bits to control compressor color modes
parameter CMPRS_CBIT_FRAMES = 15, // bit # to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_FRAMES_BITS = 1, // number of bits to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BE16 = 17, // bit # to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BE16_BITS = 1, // number of bits to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BAYER = 20, // bit # to control compressor Bayer shift mode
parameter CMPRS_CBIT_BAYER_BITS = 2, // number of bits to control compressor Bayer shift mode
parameter CMPRS_CBIT_FOCUS = 23, // bit # to control compressor focus display mode
......@@ -100,6 +102,7 @@ module compressor393 # (
parameter CMPRS_CBIT_CMODE_JP4DIFFHDRDIV2 = 4'ha, // jp4, 4 blocks, differential, hdr,divide by 2
parameter CMPRS_CBIT_CMODE_MONO1 = 4'hb, // mono JPEG (not yet implemented)
parameter CMPRS_CBIT_CMODE_MONO4 = 4'he, // mono 4 blocks
parameter CMPRS_CBIT_CMODE_RAW = 4'hf, // uncompressed
parameter CMPRS_CBIT_FRAMES_SINGLE = 0, //1, // use a single-frame buffer for images
parameter CMPRS_COLOR18 = 0, // JPEG 4:2:0 with 18x18 overlapping tiles for de-bayer
......@@ -107,7 +110,8 @@ module compressor393 # (
parameter CMPRS_MONO16 = 2, // JPEG 4:2:0 with 16x16 non-overlapping tiles, color components zeroed
parameter CMPRS_JP4 = 3, // JP4 mode with 16x16 macroblocks
parameter CMPRS_JP4DIFF = 4, // JP4DIFF mode TODO: see if correct
parameter CMPRS_MONO8 = 7, // Regular JPEG monochrome with 8x8 macroblocks (not yet implemented)
parameter CMPRS_RAW = 6, // Not comressed, raw data
parameter CMPRS_MONO8 = 7, // Regular JPEG monochrome with 8x8 macroblocks (not yet implemented)
parameter CMPRS_FRMT_MBCM1 = 0, // bit # of number of macroblock columns minus 1 field in format word
parameter CMPRS_FRMT_MBCM1_BITS = 13, // number of bits in number of macroblock columns minus 1 field in format word
......@@ -372,6 +376,8 @@ module compressor393 # (
.CMPRS_CBIT_CMODE_BITS (CMPRS_CBIT_CMODE_BITS),
.CMPRS_CBIT_FRAMES (CMPRS_CBIT_FRAMES),
.CMPRS_CBIT_FRAMES_BITS (CMPRS_CBIT_FRAMES_BITS),
.CMPRS_CBIT_BE16 (CMPRS_CBIT_BE16),
.CMPRS_CBIT_BE16_BITS (CMPRS_CBIT_BE16_BITS),
.CMPRS_CBIT_BAYER (CMPRS_CBIT_BAYER),
.CMPRS_CBIT_BAYER_BITS (CMPRS_CBIT_BAYER_BITS),
.CMPRS_CBIT_FOCUS (CMPRS_CBIT_FOCUS),
......@@ -392,12 +398,14 @@ module compressor393 # (
.CMPRS_CBIT_CMODE_JP4DIFFHDRDIV2 (CMPRS_CBIT_CMODE_JP4DIFFHDRDIV2),
.CMPRS_CBIT_CMODE_MONO1 (CMPRS_CBIT_CMODE_MONO1),
.CMPRS_CBIT_CMODE_MONO4 (CMPRS_CBIT_CMODE_MONO4),
.CMPRS_CBIT_CMODE_RAW (CMPRS_CBIT_CMODE_RAW),
.CMPRS_CBIT_FRAMES_SINGLE (CMPRS_CBIT_FRAMES_SINGLE),
.CMPRS_COLOR18 (CMPRS_COLOR18),
.CMPRS_COLOR20 (CMPRS_COLOR20),
.CMPRS_MONO16 (CMPRS_MONO16),
.CMPRS_JP4 (CMPRS_JP4),
.CMPRS_JP4DIFF (CMPRS_JP4DIFF),
.CMPRS_RAW (CMPRS_RAW),
.CMPRS_MONO8 (CMPRS_MONO8),
.CMPRS_FRMT_MBCM1 (CMPRS_FRMT_MBCM1),
.CMPRS_FRMT_MBCM1_BITS (CMPRS_FRMT_MBCM1_BITS),
......
compressor_jp/huffman_stuffer_meta.v
View file @ d30c9b6a
......@@ -4,7 +4,7 @@
* @date 2015-10-26
* @author Andrey Filippov
*
* @brief Wrapper fior several JPEG/JP4 compression modules. It includes
* @brief Wrapper for several JPEG/JP4 compression modules. It includes
* - Huffman encoder (huffman_snglclk),
* - bit stuffer (bit_stuffer_27_32),
* - escapes 0xff with 0x00 (bit_stuffer_escape)
......@@ -66,7 +66,8 @@ module huffman_stuffer_meta(
// and before the data is needed for output
input ts_pre_stb, // @mclk - 1 cycle before receiving 8 bytes of timestamp data
input [7:0] ts_data, // timestamp data (s0,s1,s2,s3,us0,us1,us2,us3==0)
input color_first, // @fradv_clk only used for timestamp
//TODO: Should be generated fro raw also
input color_first, // @fradv_clk only used for timestamp
// outputs @ negedge clk
output [31:0] data_out, // [31:0] output data
output data_out_valid,// output data valid
......@@ -154,7 +155,8 @@ module huffman_stuffer_meta(
.flush_out (escape_flush_out) // output reg
);
bit_stuffer_metadata bit_stuffer_metadata_i (
// TODO: Insert raw data here, always 4x bytes (actually 16*16*(1..2))
bit_stuffer_raw_metadata bit_stuffer_metadata_i (
.mclk (mclk), // input
.mrst (mrst), // input
.xclk (xclk), // input
......
compressor_jp/jp_channel.v
View file @ d30c9b6a
......@@ -72,6 +72,8 @@ module jp_channel#(
parameter CMPRS_CBIT_CMODE_BITS = 4, // number of bits to control compressor color modes
parameter CMPRS_CBIT_FRAMES = 15, // bit # to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_FRAMES_BITS = 1, // number of bits to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BE16 = 17, // bit # to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BE16_BITS = 1, // number of bits to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BAYER = 20, // bit # to control compressor Bayer shift mode
parameter CMPRS_CBIT_BAYER_BITS = 2, // number of bits to control compressor Bayer shift mode
parameter CMPRS_CBIT_FOCUS = 23, // bit # to control compressor focus display mode
......@@ -94,6 +96,8 @@ module jp_channel#(
parameter CMPRS_CBIT_CMODE_JP4DIFFHDRDIV2 = 4'ha, // jp4, 4 blocks, differential, hdr,divide by 2
parameter CMPRS_CBIT_CMODE_MONO1 = 4'hb, // mono JPEG (not yet implemented)
parameter CMPRS_CBIT_CMODE_MONO4 = 4'he, // mono 4 blocks
parameter CMPRS_CBIT_CMODE_RAW = 4'hf, // uncompressed
parameter CMPRS_CBIT_FRAMES_SINGLE = 0, //1, // use a single-frame buffer for images
parameter CMPRS_COLOR18 = 0, // JPEG 4:2:0 with 18x18 overlapping tiles for de-bayer
......@@ -101,8 +105,12 @@ module jp_channel#(
parameter CMPRS_MONO16 = 2, // JPEG 4:2:0 with 16x16 non-overlapping tiles, color components zeroed
parameter CMPRS_JP4 = 3, // JP4 mode with 16x16 macroblocks
parameter CMPRS_JP4DIFF = 4, // JP4DIFF mode TODO: see if correct
parameter CMPRS_RAW = 6, // Not comressed, raw data
parameter CMPRS_MONO8 = 7, // Regular JPEG monochrome with 8x8 macroblocks (not yet implemented)
// TODO: For raw - use:
// 13 bits hor (x16 bytes), 13 bits vert (x16 lines) + 5 bits (left margin in bytes, skip)
// lines per page?
parameter CMPRS_FRMT_MBCM1 = 0, // bit # of number of macroblock columns minus 1 field in format word
parameter CMPRS_FRMT_MBCM1_BITS = 13, // number of bits in number of macroblock columns minus 1 field in format word
parameter CMPRS_FRMT_MBRM1 = 13, // bit # of number of macroblock rows minus 1 field in format word
......@@ -143,14 +151,12 @@ module jp_channel#(
// Buffer interface (buffer to be a part of the memory controller - it is connected there by a 64-bit data, here - by an 9-bit one
input xfer_reset_page_rd, // from mcntrl_tiled_rw (
input buf_wpage_nxt, // advance to next page memory interface writes to
input buf_we, // @!mclk write buffer from memory, increment write
input [63:0] buf_din, // data out
input page_ready_chn, // single mclk (posedge)
output next_page_chn, // single mclk (posedge): Done with the page in the buffer, memory controller may read more data
// Master(sensor)/slave(compressor) synchronization signals
output frame_start_dst, // @mclk - trigger receive (tiledc) memory channel (it will take care of single/repetitive
// this output either follows vsync_late (reclocks it) or generated in non-bonded mode
......@@ -222,10 +228,13 @@ module jp_channel#(
// Control signals to be defined
wire frame_en; // if 0 - will reset logic immediately (but not page number)
wire frame_en_jp; // if 0 - will reset logic immediately (but not page number)
wire frame_en_raw; // if 0 - will reset logic immediately (but not page number)
wire frame_start_xclk; // re-clocked, parameters are copied at this pulse
wire stuffer_en; // extended enable to allow stuffer to gracefully finish
wire frame_go=frame_en; // start frame: if idle, will start reading data (if available),
wire frame_go_jp=frame_en_jp; // start frame: if idle, will start reading data (if available),
wire frame_go_raw=frame_en_raw; // start frame: if idle, will start reading data (if available),
// if running - will not restart a new frame if 0.
wire [CMPRS_FRMT_LMARG_BITS-1:0] left_marg; // left margin (for not-yet-implemented) mono JPEG (8 lines tile row) can need 7 bits (mod 32 - tile)
wire [CMPRS_FRMT_MBCM1_BITS-1:0] n_blocks_in_row_m1; // number of macroblocks in a macroblock row minus 1
......@@ -267,11 +276,14 @@ module jp_channel#(
wire last_mb; // output
// signals connecting modules: cmprs_pixel_buf_iface_i and chn_rd_buf_i:
// wire [ 7:0] buf_di; // data from the buffer
// wire [11:0] buf_ra; // buffer read address (2 MSB - page number)
wire [ 1:0] buf_rd; // buf {regen, re}
wire [ 7:0] buf_pxd; // 8-bit pixel data from the memory buffer
wire [11:0] buf_ra; // Memory buffer read address
wire [ 1:0] raw_buf_rd; // buf {regen, re} in raw mode
wire [11:0] raw_buf_ra; // Memory buffer read address in raw mode
// signals connecting modules: chn_rd_buf_i and ???:
wire [ 7:0] mb_data_out; // Macroblock data out in scanline order
wire mb_pre_first_out; // Macroblock data out strobe - 1 cycle just before data valid
......@@ -370,12 +382,26 @@ module jp_channel#(
wire [15:0] quant_dc_tdo;// MSB aligned coefficient for the DC component (used in focus module)
wire [ 2:0] cmprs_qpage;
wire [ 2:0] coring_num;
wire uncompressed;
wire raw_be16; // raw bytes in little-endian order need to be converted to big endian 16-bit ones
wire raw_start; // input
wire raw_prefb; // input
wire raw_ts_copy; // input
wire raw_flush; // input
reg dcc_en;
wire [15:0] dccdata; // was not used in late nc353
wire dccvld; // was not used in late nc353
wire next_page_chn_jp;
wire next_page_chn_raw;
assign next_page_chn = next_page_chn_jp | next_page_chn_raw;
assign set_ctrl_reg_w = cmd_we && (cmd_a== CMPRS_CONTROL_REG);
assign set_status_w = cmd_we && (cmd_a== CMPRS_STATUS_CNTRL);
assign set_format_w = cmd_we && (cmd_a== CMPRS_FORMAT);
......@@ -385,11 +411,6 @@ module jp_channel#(
assign set_tables_w = cmd_we && ((cmd_a & 6)== CMPRS_TABLES);
`ifdef USE_XCLK2X
// re-sync to posedge xclk2x
reg xrst2xn;
always @ (negedge xclk2x) xrst2xn <= xrst;
`endif
`ifdef DEBUG_RING
`ifndef USE_XCLK2X
......@@ -456,11 +477,7 @@ module jp_channel#(
`endif
timestamp_to_parallel dbg_timestamp_to_parallel_i (
`ifdef USE_XCLK2X
.clk (~xclk2x), // input
`else
.clk (xclk), // input
`endif
.pre_stb (dbg_ts_rstb), // input
.tdata (dbg_ts_dout), // input[7:0]
.sec (dbg_sec), // output[31:0] reg
......@@ -470,11 +487,7 @@ module jp_channel#(
// cmprs_standalone - use to reset flush
`ifdef USE_XCLK2X
always @ (posedge ~xclk2x) begin
`else
always @ (posedge xclk) begin
`endif
dbg_reset_fifo <= fifo_rst;
if (xrst2xn || dbg_reset_fifo) debug_fifo_in <= 0;
else if (stuffer_dv) debug_fifo_in <= debug_fifo_in + 1;
......@@ -514,8 +527,8 @@ module jp_channel#(
else if (stuffer_running_mclk) dbg_stuffer_ext_running <= 1;
end
always @ (posedge xclk) begin
/// Just for debugging, keeping in both compressed/raw modes
always @ (posedge xclk) begin
if (!frame_en) pre_start_cntr <= 0;
else if (mb_pre_start) pre_start_cntr <= pre_start_cntr + 1;
......@@ -656,11 +669,11 @@ module jp_channel#(
.LOG2WIDTH_RD(3) // 64 bit external interface
) chn_rd_buf_i (
.ext_clk (xclk), // input
.ext_raddr (buf_ra), // input[11:0]
.ext_rd (buf_rd[0]), // input
.ext_regen (buf_rd[1]), // input
.ext_raddr (uncompressed?raw_buf_ra: buf_ra), // input[11:0]
.ext_rd (uncompressed?raw_buf_rd[0]: buf_rd[0]), // input
.ext_regen (uncompressed?raw_buf_rd[1] :buf_rd[1]), // input
.ext_data_out (buf_pxd), // output[7:0]
// .emul64 (1'b0), //emul64), // input Modify buffer addresses (used for JP4 until a 64-wide mode is implemented)
// Memory interface
.wclk (!mclk), // input
.wpage_in (2'b0), // input[1:0]
.wpage_set (xfer_reset_page_rd), // input TODO: Generate @ negedge mclk on frame start
......@@ -681,6 +694,8 @@ module jp_channel#(
.CMPRS_CBIT_CMODE_BITS (CMPRS_CBIT_CMODE_BITS),
.CMPRS_CBIT_FRAMES (CMPRS_CBIT_FRAMES),
.CMPRS_CBIT_FRAMES_BITS (CMPRS_CBIT_FRAMES_BITS),
.CMPRS_CBIT_BE16 (CMPRS_CBIT_BE16),
.CMPRS_CBIT_BE16_BITS (CMPRS_CBIT_BE16_BITS),
.CMPRS_CBIT_BAYER (CMPRS_CBIT_BAYER),
.CMPRS_CBIT_BAYER_BITS (CMPRS_CBIT_BAYER_BITS),
.CMPRS_CBIT_FOCUS (CMPRS_CBIT_FOCUS),
......@@ -701,12 +716,14 @@ module jp_channel#(
.CMPRS_CBIT_CMODE_JP4DIFFHDRDIV2 (CMPRS_CBIT_CMODE_JP4DIFFHDRDIV2),
.CMPRS_CBIT_CMODE_MONO1 (CMPRS_CBIT_CMODE_MONO1),
.CMPRS_CBIT_CMODE_MONO4 (CMPRS_CBIT_CMODE_MONO4),
.CMPRS_CBIT_CMODE_RAW (CMPRS_CBIT_CMODE_RAW),
.CMPRS_CBIT_FRAMES_SINGLE (CMPRS_CBIT_FRAMES_SINGLE),
.CMPRS_COLOR18 (CMPRS_COLOR18),
.CMPRS_COLOR20 (CMPRS_COLOR20),
.CMPRS_MONO16 (CMPRS_MONO16),
.CMPRS_JP4 (CMPRS_JP4),
.CMPRS_JP4DIFF (CMPRS_JP4DIFF),
.CMPRS_RAW (CMPRS_RAW),
.CMPRS_MONO8 (CMPRS_MONO8),
.CMPRS_FRMT_MBCM1 (CMPRS_FRMT_MBCM1),
.CMPRS_FRMT_MBCM1_BITS (CMPRS_FRMT_MBCM1_BITS),
......@@ -720,7 +737,6 @@ module jp_channel#(
.CMPRS_CSAT_CR_BITS (CMPRS_CSAT_CR_BITS),
.CMPRS_CORING_BITS (CMPRS_CORING_BITS)
) cmprs_cmd_decode_i (
// .rst (rst), // input
.xclk (xclk), // input - global clock input, compressor single clock rate
.mclk (mclk), // input - global system/memory clock
.mrst (mrst), // input
......@@ -729,7 +745,6 @@ module jp_channel#(
.color_sat_we (set_color_saturation_w), // input - write color saturation values
.coring_we (set_coring_w), // input - write color saturation values
.di (cmd_data), // input[31:0] - 32-bit data to write to control register (24LSB are used)
// .frame_start (frame_start_dst), // input @mclk
.frame_start (frame_start_conf), // input @mclk
.frame_start_xclk (frame_start_xclk), // output re-clocked, parameters are copied during this pulse
.cmprs_en_mclk (cmprs_en_mclk), // output
......@@ -738,13 +753,14 @@ module jp_channel#(
.cmprs_standalone (cmprs_standalone), // output reg
.sigle_frame_buf (sigle_frame_buf), // output reg
.cmprs_en_xclk (frame_en), // output reg
.cmprs_en_xclk_jp (frame_en_jp), // output reg
.cmprs_en_xclk_raw (frame_en_raw), // output reg
.cmprs_en_late_xclk (stuffer_en), // output reg - extended enable to allow stuffer to gracefully finish
.cmprs_qpage (cmprs_qpage), // output[2:0] reg
.cmprs_dcsub (subtract_dc), // output reg
.cmprs_fmode (cmprs_fmode), // output[1:0] reg
.bayer_shift (bayer_phase), // output[1:0] reg
.ignore_color (ignore_color), // output reg
// .four_blocks (four_blocks), // output reg Not used?
.four_blocks (), // output reg Not used?
.jp4_dc_improved (jp4_dc_improved), // output reg
.converter_type (converter_type), // output[2:0] reg
......@@ -755,7 +771,9 @@ module jp_channel#(
.n_block_rows_m1 (n_block_rows_m1), // output[12:0] reg
.color_sat_cb (m_cb), // output[9:0] reg
.color_sat_cr (m_cr), // output[9:0] reg
.coring (coring_num) // output[2:0] reg
.coring (coring_num), // output[2:0] reg
.uncompressed (uncompressed), // output reg
.be16 (raw_be16) // output reg
);
// set derived parameters from converter_type
......@@ -783,7 +801,6 @@ module jp_channel#(
.CMPRS_TIMEOUT_BITS (CMPRS_TIMEOUT_BITS),
.CMPRS_TIMEOUT (CMPRS_TIMEOUT)
) cmprs_frame_sync_i (
// .rst (rst), // input
.xclk (xclk), // input - global clock input, compressor single clock rate
.mclk (mclk), // input - global system/memory clock
.mrst (mrst), // input
......@@ -814,25 +831,25 @@ module jp_channel#(
.frame_done (frame_done_dst), // input - single-cycle pulse when the full frame (window) was transferred to/from DDR3 memory
.last_mb_started (last_mb && mb_pre2_first_out), // input
.suspend (suspend), // output reg - suspend reading data for this channel - waiting for the source data
.stuffer_running (stuffer_running), // input
.force_flush_long (force_flush_long), // output reg - @ mclk tried to start frame compression before the previous one was finished
.stuffer_running (stuffer_running), // input
.force_flush_long (force_flush_long), // output reg - @ mclk tried to start frame compression before the previous one was finished, raw also
.stuffer_running_mclk(stuffer_running_mclk), // output
.reading_frame (reading_frame), // output
.reading_frame (reading_frame), // output
.frame_started_mclk (frame_started_mclk)
);
cmprs_macroblock_buf_iface cmprs_macroblock_buf_iface_i (
// .rst (rst), // input
.xclk (xclk), // input
.mclk (mclk), // input
.mrst (mrst), // input
.xrst (xrst), // input
.xfer_reset_page_rd (xfer_reset_page_rd), // input
.page_ready_chn (page_ready_chn), // input
.next_page_chn (next_page_chn), // output
.frame_en (frame_en), // input
.next_page_chn (next_page_chn_jp), // output
.frame_en (frame_en_jp), // input
.frame_start_xclk (frame_start_xclk), // input@posedge xclk - parameters are copied @ this pulse
.frame_go (frame_go), // input - do not use - assign to frame_en? Running frames can be controlled by other means
.frame_go (frame_go_jp), // input - do not use - assign to frame_en? Running frames can be controlled by other means
.cmprs_run_mclk (cmprs_run_mclk), // input used to reset frame_pre_run (enable vsync_late for the new frame after stop)
.left_marg (left_marg), // input[4:0]
.n_blocks_in_row_m1 (n_blocks_in_row_m1), // input[12:0]
......@@ -853,6 +870,32 @@ module jp_channel#(
`endif
);
cmprs_raw_buf_iface #(
.FRAME_QUEUE_WIDTH(2)
) cmprs_raw_buf_iface_i (
.xclk (xclk), // input
.mclk (mclk), // input
.mrst (mrst), // input
.xrst (xrst), // input
.xfer_reset_page_rd (xfer_reset_page_rd), // input
.page_ready_chn (page_ready_chn), // input
.next_page_chn (next_page_chn_raw), // output
.frame_en (frame_en_raw), // input
.frame_start_xclk (frame_start_xclk), // input
.frame_go (frame_go_raw), // input
.cmprs_run_mclk (cmprs_run_mclk), // input
.n_blocks_in_row_m1 (n_blocks_in_row_m1), // input[12:0]
.n_block_rows_m1 (n_block_rows_m1), // input[12:0]
.stuffer_running (stuffer_running), // input
.raw_be16 (raw_be16), // input
.buf_ra (raw_buf_ra), // output[11:0]
.buf_rd (raw_buf_rd), // output[1:0]
.raw_start (raw_start), // output
.raw_prefb (raw_prefb), // output
.raw_ts_copy (raw_ts_copy), // output
.raw_flush (raw_flush) // output
);
cmprs_pixel_buf_iface #(
.CMPRS_PREEND_EARLY (6), // TODO:Check / Adjust
.CMPRS_RELEASE_EARLY (16),
......@@ -866,7 +909,7 @@ module jp_channel#(
) cmprs_pixel_buf_iface_i (
.xclk (xclk), // input
.frame_en (frame_en), // input
.frame_en (frame_en_jp), // input
.buf_di (buf_pxd), // input[7:0]
.buf_ra (buf_ra), // output[11:0]
.buf_rd (buf_rd), // output[1:0]
......@@ -882,7 +925,6 @@ module jp_channel#(
.macroblock_x (macroblock_x), // input[6:0]
.data_out (mb_data_out), // output[7:0] // Macroblock data out in scanline order
.pre_first_out (mb_pre_first_out), // output // Macroblock data out strobe - 1 cycle just before data valid == old pre_first_pixel?
// .data_valid (mb_data_valid) // output // Macroblock data out valid
.pre2_first_out (mb_pre2_first_out), // output reg
.data_valid () // output reg // Macroblock data out valid Unused
);
......@@ -896,7 +938,7 @@ module jp_channel#(
.CMPRS_MONO8 (CMPRS_MONO8)
) csconvert_i (
.xclk (xclk), // input
.frame_en (frame_en), // input
.frame_en (frame_en_jp), // input
.converter_type (converter_type), // input[2:0]
.ignore_color (ignore_color), // input
.scale_diff (scale_diff), // input
......@@ -928,7 +970,7 @@ module jp_channel#(
.CMPRS_MONO8 (CMPRS_MONO8)
) cmprs_buf_average_i (
.xclk (xclk), // input
.frame_en (frame_en), // input
.frame_en (frame_en_jp), // input
.converter_type (converter_type), // input[2:0]
.pre_first_in (mb_pre_first_out), // input
.yc_pre_first_out (yc_pre_first_out), // input
......@@ -1011,7 +1053,7 @@ module jp_channel#(
.DSP_P_WIDTH (48)
) dct2d8x8_chen_i (
.clk (xclk), // input
.rst (!frame_en), // input
.rst (!frame_en_jp), // input
.start (dct_start), // input
.xin (yc_nodc), // input[9:0] signed
.last_in (dct_last_in), // output reg
......@@ -1064,7 +1106,7 @@ module jp_channel#(
quantizer393 quantizer393_i (
.clk (xclk), // input
.en (frame_en), // input
.en (frame_en_jp), // input
.mclk (mclk), // input system clock, twqe, twce, ta,tdi - valid @posedge (ra, tdi - 2 cycles ahead (was negedge)
.tser_qe (tser_qe), // input - write to a quantization table
.tser_ce (tser_ce), // input - write to a coring table
......@@ -1099,12 +1141,8 @@ module jp_channel#(
// TODO: Verify focus_sharp393: quantizer output (with strobes) is now 2 cycles later than in 353 (relative to xdct out). Seems to be OK.
focus_sharp393 focus_sharp393_i (
.clk (xclk), // input - pixel clock
`ifdef USE_XCLK2X
.clk2x (xclk2x), // input 2x pixel clock
`else
.clk2x (xclk), // FIXME: fix the module not to use xclk2x
`endif
.en (frame_en), // input
.en (frame_en_jp), // input
.mclk (mclk), // input system clock to write tables
.tser_we (tser_fe), // input - write to a focus sharpness table
......@@ -1128,26 +1166,14 @@ module jp_channel#(
// Format DC components to be output as a mini-frame. Was not used in the late NC353 as the dma1 channel was used for IMU instead of dcc
wire finish_dcc;
`ifdef USE_XCLK2X
wire [15:0] stuffer_do;
`else
wire [31:0] stuffer_do;
`endif
wire stuffer_dv;
wire stuffer_done;
`ifdef USE_XCLK2X
pulse_cross_clock finish_dcc_i (.rst(xrst2xn), .src_clk(~xclk2x), .dst_clk(xclk2x), .in_pulse(stuffer_done), .out_pulse(finish_dcc),.busy());
`else
assign finish_dcc = stuffer_done;
`endif
dcc_sync393 dcc_sync393_i (
`ifdef USE_XCLK2X
.sclk (xclk2x), // input
`else
.sclk (xclk), // input
`endif
.dcc_en (dcc_en), // input xclk rising, sync with start of the frame
.finish_dcc (finish_dcc), // input @ sclk rising
.dcc_vld (dccvld), // input xclk rising
......@@ -1161,7 +1187,7 @@ module jp_channel#(
// encoderDCAC is updated to handle 13-bit signed data instead of the 12-bit. It will limit the values on ot's own
encoderDCAC393 encoderDCAC393_i (
.clk (xclk), // input
.en (frame_en), // input
.en (frame_en_jp), // input
.lasti (color_last), // input - was "last MCU in a frame" (@ stb)
.first_blocki (first_block_color), // input - first block in frame - save fifo write address (@ stb)
.comp_numberi (component_num[2:0]), // input[2:0] - component number 0..2 in color, 0..3 - in jp4diff, >= 4 - don't use (@ stb)
......@@ -1195,141 +1221,12 @@ module jp_channel#(
// wire [2:0] dbg_block_mem_wa;
// wire [2:0] dbg_block_mem_wa_save;
`ifdef USE_XCLK2X
huffman393 i_huffman (
.xclk (xclk), // input
.xclk2x (xclk2x), // input
.en (frame_en), // input
.mclk (mclk), // input system clock to write tables
.tser_we (tser_he), // input - write to a quantization table
.tser_a_not_d (tser_a_not_d), // input - address/not data to tables
.tser_d (tser_d), // input[7:0] - byte-wide data to tables
.di (enc_do[15:0]), // input[15:0] - specially RLL prepared 16-bit data (to FIFO)
.ds (enc_dv), // input - di valid strobe
.rdy (stuffer_rdy), // input - receiver (bit stuffer) is ready to accept data
.do (huff_do[15:0]), // output[15:0] reg
.dl (huff_dl[3:0]), // output[3:0] reg
.dv (huff_dv), // output reg
.flush (flush), // output reg
.last_block (last_block), // output reg
`ifdef DEBUG_RING
.test_lbw (dbg_test_lbw), // output reg ??
.gotLastBlock (dbg_gotLastBlock), // output ?? - unused (was for debug)
`else
.test_lbw (), // output reg ??
.gotLastBlock (), // output ?? - unused (was for debug)
`endif
.clk_flush (hclk), // input
.flush_clk (flush_hclk), // output
`ifdef DEBUG_RING
.fifo_or_full (dbg_fifo_or_full) // FIFO output register full - just for debuging
`else
.fifo_or_full () // FIFO output register full - just for debuging
`endif
);
stuffer393 stuffer393_i (
// .rst (rst), // input
.mclk (mclk), // input
.mrst (mrst), // input
.xrst (xrst), // input
.last_block (last_block), // input @negedge xclk2x - use it to copy timestamp from fifo
.ts_pre_stb (ts_pre_stb), // input 1 cycle before timestamp data, @mclk
.ts_data (ts_data), // input[7:0] 8-byte timestamp data (s0,s1,s2,s3,us0,us1,us2,us3==0)
.color_first (color_first), // input valid @xclk - only for sec/usec
.fradv_clk (xclk), // input
.clk (xclk2x), // input clock - uses negedge inside
.en_in (stuffer_en), //
.flush (flush), // input - flush output data (fill byte with 0, long word with FFs)
.abort (force_flush_long), // @ any, extracts 0->1 and flushes
.stb (huff_dv), // input
.dl (huff_dl), // input[3:0] number of bits to send (0 - 16) (0-16??)
.d (huff_do), // input[15:0] data to shift (only lower huff_dl bits are valid)
// outputs valid @negedge xclk2x
.rdy (stuffer_rdy), // output - enable huffman encoder to proceed. Used as CE for many huffman encoder registers
.q (stuffer_do), // output[15:0] reg - output data
.qv (stuffer_dv), // output reg - output data valid
.done (stuffer_done), // output
`ifdef DEBUG_RING
.flushing (dbg_flushing), // output reg Not used?
`else
.flushing (), // output reg Not used?
`endif
.running (stuffer_running) // from registering timestamp until done
`ifdef DEBUG_RING
, .dbg_etrax_dma (etrax_dma)
,.dbg_ts_rstb (dbg_ts_rstb) // output
,.dbg_ts_dout (dbg_ts_dout) //output [7:0]
`endif
`ifdef debug_stuffer
,.etrax_dma_r(tst_stuf_etrax[3:0]) // [3:0] just for testing
,.test_cntr(test_cntr[3:0])
,.test_cntr1(test_cntr1[7:0])
`endif
);
//cat x393_testbench03-latest.log | grep "COMPRESSOR[32 ]*CHN" > compressors_out32.log
wire eof_written_xclk2xn;
pulse_cross_clock stuffer_done_mclk_i (.rst(xrst2xn), .src_clk(~xclk2x), .dst_clk(mclk), .in_pulse(stuffer_done), .out_pulse(stuffer_done_mclk),.busy());
cmprs_out_fifo cmprs_out_fifo_i (
// source (stuffer) clock domain
.wclk (~xclk2x), // input source clock (2x pixel clock, inverted) - same as stuffer out
.wrst (xrst2xn), // input mostly for simulation
.we (stuffer_dv), // @ posedge(~xclk2x) input write data from stuffer
.wdata ({stuffer_do[7:0],stuffer_do[15:8]}), // input[15:0] data from stuffer module;
.wa_rst (!stuffer_en), // input reset low address bits when stuffer is disabled (to make sure it is multiple of 32 bytes
.wlast (stuffer_done), // input - written last 32 bytes of a frame (flush FIFO) - stuffer_done (has to be later than we)
.eof_written_wclk (eof_written_xclk2xn), // output - AFI had transferred frame data to the system memory
// AFI clock domain
.rclk (hclk), // @posedge(hclk) input - AFI clock
.rrst (hrst), // input - AFI clock
.rst_fifo (fifo_rst), // input - reset FIFO (set read address to write, reset count)
.ren (fifo_ren), // input - fifo read from AFI channel mux
.rdata (fifo_rdata), // output[63:0] - data to AFI channel mux (latency == 2 from fifo_ren)
.eof (fifo_eof), // output single hclk pulse signalling EOF
.eof_written (eof_written), // input single hclk pulse confirming frame data is written to the system memory
.flush_fifo (fifo_flush), // output level signalling that FIFO has data from the current frame (use short AXI burst if needed)
.fifo_count (fifo_count) // output[7:0] - number of 32-byte chunks available in FIFO
);
pulse_cross_clock eof_written_mclk_i (.rst(xrst2xn), .src_clk(~xclk2x), .dst_clk(mclk), .in_pulse(eof_written_xclk2xn), .out_pulse(eof_written_mclk),.busy());
// pulse_cross_clock eof_written_mclk_i (.rst(xrst2xn), .src_clk(~xclk2x), .dst_clk(mclk), .in_pulse(eof_written_xclk2xn), .out_pulse(eof_written_mclk),.busy());
`ifdef DISPLAY_COMPRESSED_DATA
integer dbg_stuffer_word_number;
reg dbg_odd_stuffer_dv;
reg [15:0] dbg_even_stuffer_do;
wire [31:0] dbg_stuffer_do32 = {dbg_even_stuffer_do, stuffer_do};
always @ (negedge xclk2x) begin
if (stuffer_dv && dbg_odd_stuffer_dv) begin
$display ("COMPRESSOR CHN%d 0x%x -> 0x%x", CMPRS_NUMBER, dbg_stuffer_word_number, dbg_stuffer_do32);
end
if (stuffer_done) begin
$display ("COMPRESSOR CHN%d ***** DONE *****",CMPRS_NUMBER);
end
if (stuffer_dv && !dbg_odd_stuffer_dv) dbg_even_stuffer_do = stuffer_do;
if (!stuffer_en || stuffer_done) dbg_stuffer_word_number = 0;
else if (stuffer_dv && dbg_odd_stuffer_dv) dbg_stuffer_word_number = dbg_stuffer_word_number + 1;
if (!stuffer_en) dbg_odd_stuffer_dv = 0;
else if (stuffer_dv) dbg_odd_stuffer_dv = ~dbg_odd_stuffer_dv;
end
`endif
`else
huffman_stuffer_meta huffman_stuffer_meta_i (
huffman_stuffer_raw_meta huffman_stuffer_meta_i (
.mclk (mclk), // input
.mrst (mrst), // input
.xclk (xclk), // input
.en_huffman (frame_en), // input
.en_huffman (frame_en_jp), // input
.en_stuffer (stuffer_en), // input
.abort_stuffer (force_flush_long), // input
.tser_we (tser_he), // input
......@@ -1340,6 +1237,15 @@ module jp_channel#(
.ts_pre_stb (ts_pre_stb), // input
.ts_data (ts_data), // input[7:0]
.color_first (color_first), // input valid @xclk - only for sec/usec
.raw_mode (uncompressed), // input
.raw_be16 (1'b0), // raw_be16), // input
.raw_bytes (buf_pxd), // input[7:0]
.raw_start (raw_start), // input
.raw_prefb (raw_prefb), // input
.raw_ts_copy (raw_ts_copy), // input
.raw_flush (raw_flush), // input
.data_out (stuffer_do), // output[31:0]
.data_out_valid (stuffer_dv), // output
.done (stuffer_done), // output
......@@ -1394,7 +1300,6 @@ module jp_channel#(
end
`endif
`endif
// TODO: Add status module to combine/FF, re-clock status signals
......
includes/x393_parameters.vh
View file @ d30c9b6a
......@@ -713,6 +713,8 @@
parameter CMPRS_CBIT_CMODE_BITS = 4, // number of bits to control compressor color modes
parameter CMPRS_CBIT_FRAMES = 15, // bit # to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_FRAMES_BITS = 1, // number of bits to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BE16 = 17, // bit # to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BE16_BITS = 1, // number of bits to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BAYER = 20, // bit # to control compressor Bayer shift mode
parameter CMPRS_CBIT_BAYER_BITS = 2, // number of bits to control compressor Bayer shift mode
parameter CMPRS_CBIT_FOCUS = 23, // bit # to control compressor focus display mode
......@@ -735,6 +737,7 @@
parameter CMPRS_CBIT_CMODE_JP4DIFFHDRDIV2 = 4'ha, // jp4, 4 blocks, differential, hdr,divide by 2
parameter CMPRS_CBIT_CMODE_MONO1 = 4'hb, // mono JPEG (not yet implemented)
parameter CMPRS_CBIT_CMODE_MONO4 = 4'he, // mono, 4 blocks (but still not actual monochrome JPEG as the blocks are scanned in 2x2 macroblocks)
parameter CMPRS_CBIT_CMODE_RAW = 4'hf, // uncompressed
parameter CMPRS_CBIT_FRAMES_SINGLE = 0, //1, // use a single-frame buffer for images
......@@ -743,6 +746,7 @@
parameter CMPRS_MONO16 = 2, // JPEG 4:2:0 with 16x16 non-overlapping tiles, color components zeroed
parameter CMPRS_JP4 = 3, // JP4 mode with 16x16 macroblocks
parameter CMPRS_JP4DIFF = 4, // JP4DIFF mode TODO: see if correct
parameter CMPRS_RAW = 6, // Not comressed, raw data
parameter CMPRS_MONO8 = 7, // Regular JPEG monochrome with 8x8 macroblocks (not yet implemented)
parameter CMPRS_FRMT_MBCM1 = 0, // bit # of number of macroblock columns minus 1 field in format word
......
memctrl/mcntrl393.v
View file @ d30c9b6a
......@@ -588,6 +588,7 @@ module mcntrl393 #(
wire [3:0] cmprs_channel_pgm_en;
wire [3:0] cmprs_reject = 4'h0;
wire [3:0] cmprs_start_rdlin;
wire [3:0] cmprs_start_rd16;
wire [3:0] cmprs_start_rd32;
wire [11:0] cmprs_bank; // output[2:0]
......@@ -597,6 +598,7 @@ module mcntrl393 #(
wire [4*MAX_TILE_WIDTH-1:0] cmprs_num_rows_m1; // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
wire [4*MAX_TILE_HEIGHT-1:0] cmprs_num_cols_m1; // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
wire [3:0] cmprs_keep_open; // start generating commands
wire [4*6-1:0] cmprs_num128; // output[5:0]
wire [3:0] cmprs_partial; // output
wire [3:0] cmprs_seq_done; // input : sequence over
// assign cmprs_page_ready = cmprs_seq_done;// mcntrl_tiled_rw does not generate page_ready pulse as it is the same as xfer_done input
......@@ -1161,7 +1163,8 @@ module mcntrl393 #(
`endif
);
mcntrl_tiled_rw #(
mcntrl_tiled_linear_rw #(
.ADDRESS_NUMBER (ADDRESS_NUMBER),
.COLADDR_NUMBER (COLADDR_NUMBER),
.FRAME_WIDTH_BITS (FRAME_WIDTH_BITS),
......@@ -1198,7 +1201,6 @@ module mcntrl393 #(
.MCONTR_LINTILE_DIS_NEED (MCONTR_LINTILE_DIS_NEED),
.MCONTR_LINTILE_COPY_FRAME (MCONTR_LINTILE_COPY_FRAME),
.MCONTR_LINTILE_ABORT_LATE (MCONTR_LINTILE_ABORT_LATE)
) mcntrl_tiled_rd_compressor_i (
.mrst (mrst), // input
.mclk (mclk), // input
......@@ -1221,6 +1223,8 @@ module mcntrl393 #(
.xfer_want (cmprs_want[i]), // output
.xfer_need (cmprs_need[i]), // output
.xfer_grant (cmprs_channel_pgm_en[i]), // input
.xfer_start_lin_rd (cmprs_start_rdlin[i]), // output
.xfer_start_lin_wr (), // output
.xfer_start_rd (cmprs_start_rd16[i]), // output // TODO: start rd (wr too?) linear
.xfer_start_wr (), // output
.xfer_start32_rd (cmprs_start_rd32[i]), // output
......@@ -1233,34 +1237,12 @@ module mcntrl393 #(
.num_rows_m1 (cmprs_num_rows_m1[i * MAX_TILE_WIDTH +: MAX_TILE_WIDTH]), // output[5:0]
.num_cols_m1 (cmprs_num_cols_m1[i * MAX_TILE_HEIGHT +: MAX_TILE_HEIGHT]), // output[5:0]
.keep_open (cmprs_keep_open[i]), // output
.xfer_num128 (cmprs_num128[i * 6 +: 6]), // output[5:0] //** new**
.xfer_partial (cmprs_partial[i]), // output
.xfer_page_done (cmprs_seq_done[i]), // input
.xfer_page_rst_wr (), // output
.xfer_page_rst_rd (cmprs_xfer_reset_page_rd[i]) // output @negedge
);
/*
.xfer_num128 (sens_num128[i * 6 +: 6]), // output[5:0]
.xfer_partial (sens_partial[i]), // output
.xfer_done (sens_seq_done[i]), // input : page sequence over
.xfer_page_rst_wr (sens_rpage_set[i]), // output @ posedge mclk
.xfer_page_rst_rd (), // output @ negedge mclk
.xfer_skipped (sens_xfer_skipped[i]), // output reg
.cmd_wrmem () // output
.xfer_num128 (lin_rw_chn3_num128), // output[5:0]
.xfer_partial (lin_rw_chn3_partial), // output
.xfer_done (seq_done3), // input : sequence over
.xfer_page_rst_wr (xfer_reset_page3_wr), // output
.xfer_page_rst_rd (xfer_reset_page3_rd), // output
.xfer_skipped (), // output reg
.cmd_wrmem () // output
// assign cmd_wrmem = mode_reg[MCONTR_LINTILE_WRITE];// 0: read from memory, 1:write to memory
*/
end
endgenerate
......@@ -1663,6 +1645,32 @@ module mcntrl393 #(
.partial11 (sens_partial[3]), // input
.start11_wr (sens_start_wr[3]), // input
.bank12 (cmprs_bank[0 * 3 +: 3]), // input[2:0]
.row12 (cmprs_row[0 * ADDRESS_NUMBER +: ADDRESS_NUMBER]), // input[14:0]
.start_col12 (cmprs_col[0 * COL_WDTH +: COL_WDTH]), // input[6:0]
.num128_12 (cmprs_num128[0 * 6 +: 6]), // input[5:0]
.partial12 (cmprs_partial[0]), // input
.start12_rd (cmprs_start_rdlin[0]), // input
.bank13 (cmprs_bank[1 * 3 +: 3]), // input[2:0]
.row13 (cmprs_row[1 * ADDRESS_NUMBER +: ADDRESS_NUMBER]), // input[14:0]
.start_col13 (cmprs_col[1 * COL_WDTH +: COL_WDTH]), // input[6:0]
.num128_13 (cmprs_num128[1 * 6 +: 6]), // input[5:0]
.partial13 (cmprs_partial[1]), // input
.start13_rd (cmprs_start_rdlin[1]), // input
.bank14 (cmprs_bank[2 * 3 +: 3]), // input[2:0]
.row14 (cmprs_row[2 * ADDRESS_NUMBER +: ADDRESS_NUMBER]), // input[14:0]
.start_col14 (cmprs_col[2 * COL_WDTH +: COL_WDTH]), // input[6:0]
.num128_10 (cmprs_num128[2 * 6 +: 6]), // input[5:0]
.partial14 (cmprs_partial[2]), // input
.start14_rd (cmprs_start_rdlin[2]), // input
.bank15 (cmprs_bank[3 * 3 +: 3]), // input[2:0]
.row15 (cmprs_row[3 * ADDRESS_NUMBER +: ADDRESS_NUMBER]), // input[14:0]
.start_col15 (cmprs_col[3 * COL_WDTH +: COL_WDTH]), // input[6:0]
.num128_15 (cmprs_num128[3 * 6 +: 6]), // input[5:0]
.partial15 (cmprs_partial[3]), // input
.start15_rd (cmprs_start_rdlin[3]), // input
.bank (lin_rw_bank), // output[2:0]
.row (lin_rw_row), // output[14:0]
.start_col (lin_rw_col), // output[6:0]
......
system_defines.vh
View file @ d30c9b6a
......@@ -46,7 +46,7 @@
// https://forums.xilinx.com/t5/Embedded-Processor-System-Design/AXI4-Bursts-4KB-Address-Boundary-Limitation/td-p/216413
// Interconnect does not have 4K limit, and compressed data can only go to interconnect (memory), so it is OK to violate AXI specs here
`define AXI_4K_LIMIT_DISABLE // Current x393 code (only simulation modules) does not have it implemented, defining it causes mismatch synth/sim
`define DEBUG_COMPRESSOR_SCRAMBLE
`define DEBUG_COMPRESSOR_SCRAMBLE // ======== WTF? ======== is undefined in synthesis mode
`define DEBUG_DCT1D // undefine after debugging is over
// `define USE_OLD_DCT
......@@ -188,32 +188,32 @@
`define def_scanline_chn11
`undef def_tiled_chn11
// chn 12 is tiled read (compressor channel 0)
// chn 12 is tiled read + scanline read (for Tiff) (compressor channel 0)
`define def_enable_mem_chn12
`define def_read_mem_chn12
`undef def_write_mem_chn12
`undef def_scanline_chn12
`define def_scanline_chn12
`define def_tiled_chn12
// chn 12 is tiled read (compressor channel 1)
// chn 13 is tiled read + scanline read (for Tiff) (compressor channel 1)
`define def_enable_mem_chn13
`define def_read_mem_chn13
`undef def_write_mem_chn13
`undef def_scanline_chn13
`define def_scanline_chn13
`define def_tiled_chn13
// chn 12 is tiled read (compressor channel 2)
// chn 14 is tiled read + scanline read (for Tiff) (compressor channel 2)
`define def_enable_mem_chn14
`define def_read_mem_chn14
`undef def_write_mem_chn14
`undef def_scanline_chn14
`define def_scanline_chn14
`define def_tiled_chn14
// chn 12 is tiled read (compressor channel 3)
// chn 15 is tiled read + scanline read (for Tiff) (compressor channel 3)
`define def_enable_mem_chn15
`define def_read_mem_chn15
`undef def_write_mem_chn15
`undef def_scanline_chn15
`define def_scanline_chn15
`define def_tiled_chn15
`endif
\ No newline at end of file
x393.v
View file @ d30c9b6a
......@@ -2043,6 +2043,8 @@ assign axi_grst = axi_rst_pre;
.CMPRS_CBIT_CMODE_BITS (CMPRS_CBIT_CMODE_BITS),
.CMPRS_CBIT_FRAMES (CMPRS_CBIT_FRAMES),
.CMPRS_CBIT_FRAMES_BITS (CMPRS_CBIT_FRAMES_BITS),
.CMPRS_CBIT_BE16 (CMPRS_CBIT_BE16),
.CMPRS_CBIT_BE16_BITS (CMPRS_CBIT_BE16_BITS),
.CMPRS_CBIT_BAYER (CMPRS_CBIT_BAYER),
.CMPRS_CBIT_BAYER_BITS (CMPRS_CBIT_BAYER_BITS),
.CMPRS_CBIT_FOCUS (CMPRS_CBIT_FOCUS),
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment