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x393
Commit c4db5df9 authored by Andrey Filippov's avatar Andrey Filippov
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working with telemetry frame

parent 9d60666b
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sensor/sens_lepton3.v
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...@@ -304,12 +304,13 @@ module sens_lepton3 #( ...@@ -304,12 +304,13 @@ module sens_lepton3 #(
(dbg_sel[1]?( dbg_sel[0]? dbg_sources[3]:dbg_sources[2]):( dbg_sel[0]? dbg_sources[1]: dbg_sources[0])); (dbg_sel[1]?( dbg_sel[0]? dbg_sources[3]:dbg_sources[2]):( dbg_sel[0]? dbg_sources[1]: dbg_sources[0]));
assign dbg_sources[0] = dbg_running; assign dbg_sources[0] = dbg_running;
assign dbg_sources[2:1] = dbg_vsync_rdy; assign dbg_sources[1] = dbg_will_sync; //
assign dbg_sources[3] = dbg_state[0]; // discard_segment; assign dbg_sources[2] = dbg_vsync_rdy[1]; //
assign dbg_sources[4] = dbg_state[1]; // in_busy; assign dbg_sources[3] = discard_segment; // dbg_state[0]; //
assign dbg_sources[5] = dbg_state[2]; // out_busy; assign dbg_sources[4] = in_busy; // dbg_state[1]; //
assign dbg_sources[6] = dbg_state[3]; // hact; assign dbg_sources[5] = out_busy; // dbg_state[2]; //
assign dbg_sources[7] = dbg_state[4]; // dbg_will_sync; // dbg_segment_stb; // sof; assign dbg_sources[6] = hact; // dbg_state[3]; //
assign dbg_sources[7] = sof; // dbg_state[4]; //
//dbg_will_sync dbg_state //dbg_will_sync dbg_state
......
sensor/vospi_segment_61.v
View file @ c4db5df9
...@@ -45,7 +45,7 @@ module vospi_segment_61#( ...@@ -45,7 +45,7 @@ module vospi_segment_61#(
parameter VOSPI_SEGMENT_FIRST = 1, parameter VOSPI_SEGMENT_FIRST = 1,
parameter VOSPI_SEGMENT_LAST = 4, parameter VOSPI_SEGMENT_LAST = 4,
parameter VOSPI_PACKET_FIRST = 0, parameter VOSPI_PACKET_FIRST = 0,
parameter VOSPI_PACKET_LAST = 60, parameter VOSPI_PACKET_LAST = 60, // with telemetry
parameter VOSPI_PACKET_TTT = 20, // line number where segment number is provided parameter VOSPI_PACKET_TTT = 20, // line number where segment number is provided
parameter VOSPI_SOF_TO_HACT = 2, // clock cycles from SOF to HACT parameter VOSPI_SOF_TO_HACT = 2, // clock cycles from SOF to HACT
parameter VOSPI_HACT_TO_HACT_EOF = 2 // minimal clock cycles from HACT to HACT or to EOF parameter VOSPI_HACT_TO_HACT_EOF = 2 // minimal clock cycles from HACT to HACT or to EOF
...@@ -61,6 +61,7 @@ module vospi_segment_61#( ...@@ -61,6 +61,7 @@ module vospi_segment_61#(
input vsync, // from GPIO[3], 70 usec on, period ~10ms (should be re-sampled to pclk input vsync, // from GPIO[3], 70 usec on, period ~10ms (should be re-sampled to pclk
input vsync_use, // if set - wait for vsync to read a segment input vsync_use, // if set - wait for vsync to read a segment
input resync_disable, // disable re-synchronizing packets using discard signature @pclk input resync_disable, // disable re-synchronizing packets using discard signature @pclk
// input use_telemetry, // use 61- packets per segment (last segment = 60), 0 - 60 packets
// runs a single frame // runs a single frame
// SPI signals // SPI signals
output spi_clken, // enable clock on spi_clk output spi_clken, // enable clock on spi_clk
......
simulation_modules/simul_lwir160x120_vospi.v
View file @ c4db5df9
...@@ -48,6 +48,7 @@ module simul_lwir160x120_vospi # ( ...@@ -48,6 +48,7 @@ module simul_lwir160x120_vospi # (
parameter FRAME_PERIOD = 946969, // 26.4 fps @25 MHz parameter FRAME_PERIOD = 946969, // 26.4 fps @25 MHz
parameter SEGMENT_PERIOD = 5100, // min 05063? // 10000, // 236742, // 26.4 fps @25 MHz parameter SEGMENT_PERIOD = 5100, // min 05063? // 10000, // 236742, // 26.4 fps @25 MHz
parameter SEGMENTS_SEQ = 8, // 12 With ITAR parameter SEGMENTS_SEQ = 8, // 12 With ITAR
parameter SEGMENT_START = 7, // 0,
parameter FRAME_DELAY = 100, // mclk period to start first frame 1 parameter FRAME_DELAY = 100, // mclk period to start first frame 1
parameter MS_PERIOD = 25 // ahould actually be 25000 parameter MS_PERIOD = 25 // ahould actually be 25000
...@@ -360,7 +361,7 @@ always @ (posedge mclk) begin ...@@ -360,7 +361,7 @@ always @ (posedge mclk) begin
if (segment_run) packed_data[copy_wa_full] <= copy_din; // copy_d; if (segment_run) packed_data[copy_wa_full] <= copy_din; // copy_d;
if (rst) segments_cntr <= 0; if (rst) segments_cntr <= SEGMENT_START;
else if (segment_done) segments_cntr <= (segments_cntr == (SEGMENTS_SEQ - 1)) ? 0: (segments_cntr + 1); else if (segment_done) segments_cntr <= (segments_cntr == (SEGMENTS_SEQ - 1)) ? 0: (segments_cntr + 1);
......
x393_vospi.bit
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x393_vospi.timing_summary_impl
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x393_vospi_utilization.report
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Copyright 1986-2017 Xilinx, Inc. All Rights Reserved. Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.
------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------
| Tool Version : Vivado v.2017.4 (lin64) Build 2086221 Fri Dec 15 20:54:30 MST 2017 | Tool Version : Vivado v.2017.4 (lin64) Build 2086221 Fri Dec 15 20:54:30 MST 2017
| Date : Thu Apr 25 18:21:12 2019 | Date : Thu Apr 25 19:12:25 2019
| Host : elphel-desktop running 64-bit Ubuntu 14.04.5 LTS | Host : elphel-desktop running 64-bit Ubuntu 14.04.5 LTS
| Command : report_utilization -file vivado_build/x393_vospi_utilization.report | Command : report_utilization -file vivado_build/x393_vospi_utilization.report
| Design : x393 | Design : x393
...@@ -31,13 +31,13 @@ Table of Contents ...@@ -31,13 +31,13 @@ Table of Contents
+----------------------------+-------+-------+-----------+-------+ +----------------------------+-------+-------+-----------+-------+
| Site Type | Used | Fixed | Available | Util% | | Site Type | Used | Fixed | Available | Util% |
+----------------------------+-------+-------+-----------+-------+ +----------------------------+-------+-------+-----------+-------+
| Slice LUTs | 42018 | 0 | 78600 | 53.46 | | Slice LUTs | 42007 | 0 | 78600 | 53.44 |
| LUT as Logic | 38662 | 0 | 78600 | 49.19 | | LUT as Logic | 38653 | 0 | 78600 | 49.18 |
| LUT as Memory | 3356 | 0 | 26600 | 12.62 | | LUT as Memory | 3354 | 0 | 26600 | 12.61 |
| LUT as Distributed RAM | 2802 | 0 | | | | LUT as Distributed RAM | 2802 | 0 | | |
| LUT as Shift Register | 554 | 0 | | | | LUT as Shift Register | 552 | 0 | | |
| Slice Registers | 54031 | 0 | 157200 | 34.37 | | Slice Registers | 54028 | 0 | 157200 | 34.37 |
| Register as Flip Flop | 54031 | 0 | 157200 | 34.37 | | Register as Flip Flop | 54028 | 0 | 157200 | 34.37 |
| Register as Latch | 0 | 0 | 157200 | 0.00 | | Register as Latch | 0 | 0 | 157200 | 0.00 |
| F7 Muxes | 34 | 0 | 39300 | 0.09 | | F7 Muxes | 34 | 0 | 39300 | 0.09 |
| F8 Muxes | 0 | 0 | 19650 | 0.00 | | F8 Muxes | 0 | 0 | 19650 | 0.00 |
...@@ -59,7 +59,7 @@ Table of Contents ...@@ -59,7 +59,7 @@ Table of Contents
| 8 | Yes | - | Set | | 8 | Yes | - | Set |
| 672 | Yes | - | Reset | | 672 | Yes | - | Reset |
| 1025 | Yes | Set | - | | 1025 | Yes | Set | - |
| 52326 | Yes | Reset | - | | 52323 | Yes | Reset | - |
+-------+--------------+-------------+--------------+ +-------+--------------+-------------+--------------+
...@@ -69,27 +69,27 @@ Table of Contents ...@@ -69,27 +69,27 @@ Table of Contents
+-------------------------------------------+-------+-------+-----------+-------+ +-------------------------------------------+-------+-------+-----------+-------+
| Site Type | Used | Fixed | Available | Util% | | Site Type | Used | Fixed | Available | Util% |
+-------------------------------------------+-------+-------+-----------+-------+ +-------------------------------------------+-------+-------+-----------+-------+
| Slice | 16521 | 0 | 19650 | 84.08 | | Slice | 16758 | 0 | 19650 | 85.28 |
| SLICEL | 10871 | 0 | | | | SLICEL | 11056 | 0 | | |
| SLICEM | 5650 | 0 | | | | SLICEM | 5702 | 0 | | |
| LUT as Logic | 38662 | 0 | 78600 | 49.19 | | LUT as Logic | 38653 | 0 | 78600 | 49.18 |
| using O5 output only | 1 | | | | | using O5 output only | 4 | | | |
| using O6 output only | 30058 | | | | | using O6 output only | 30042 | | | |
| using O5 and O6 | 8603 | | | | | using O5 and O6 | 8607 | | | |
| LUT as Memory | 3356 | 0 | 26600 | 12.62 | | LUT as Memory | 3354 | 0 | 26600 | 12.61 |
| LUT as Distributed RAM | 2802 | 0 | | | | LUT as Distributed RAM | 2802 | 0 | | |
| using O5 output only | 2 | | | | | using O5 output only | 2 | | | |
| using O6 output only | 84 | | | | | using O6 output only | 84 | | | |
| using O5 and O6 | 2716 | | | | | using O5 and O6 | 2716 | | | |
| LUT as Shift Register | 554 | 0 | | | | LUT as Shift Register | 552 | 0 | | |
| using O5 output only | 288 | | | | | using O5 output only | 284 | | | |
| using O6 output only | 216 | | | | | using O6 output only | 216 | | | |
| using O5 and O6 | 50 | | | | | using O5 and O6 | 52 | | | |
| LUT Flip Flop Pairs | 24344 | 0 | 78600 | 30.97 | | LUT Flip Flop Pairs | 24321 | 0 | 78600 | 30.94 |
| fully used LUT-FF pairs | 4516 | | | | | fully used LUT-FF pairs | 4523 | | | |
| LUT-FF pairs with one unused LUT output | 17647 | | | | | LUT-FF pairs with one unused LUT output | 17611 | | | |
| LUT-FF pairs with one unused Flip Flop | 17543 | | | | | LUT-FF pairs with one unused Flip Flop | 17555 | | | |
| Unique Control Sets | 4715 | | | | | Unique Control Sets | 4740 | | | |
+-------------------------------------------+-------+-------+-----------+-------+ +-------------------------------------------+-------+-------+-----------+-------+
* Note: Review the Control Sets Report for more information regarding control sets. * Note: Review the Control Sets Report for more information regarding control sets.
...@@ -196,12 +196,12 @@ Table of Contents ...@@ -196,12 +196,12 @@ Table of Contents
+------------------------+-------+----------------------+ +------------------------+-------+----------------------+
| Ref Name | Used | Functional Category | | Ref Name | Used | Functional Category |
+------------------------+-------+----------------------+ +------------------------+-------+----------------------+
| FDRE | 52326 | Flop & Latch | | FDRE | 52323 | Flop & Latch |
| LUT3 | 11324 | LUT | | LUT3 | 11324 | LUT |
| LUT6 | 10227 | LUT | | LUT6 | 10228 | LUT |
| LUT2 | 8359 | LUT | | LUT2 | 8361 | LUT |
| LUT4 | 7956 | LUT | | LUT4 | 7952 | LUT |
| LUT5 | 7807 | LUT | | LUT5 | 7803 | LUT |
| RAMD32 | 4126 | Distributed Memory | | RAMD32 | 4126 | Distributed Memory |
| CARRY4 | 2725 | CarryLogic | | CARRY4 | 2725 | CarryLogic |
| LUT1 | 1592 | LUT | | LUT1 | 1592 | LUT |
......
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