reg[FRAME_WIDTH_BITS:0]row_left;// number of 8-bursts left in the current row
reg[FRAME_WIDTH_BITS:0]row_left;// number of 8-bursts left in the current row
reglast_in_row;
reglast_in_row;
reg[COLADDR_NUMBER-3:0]mem_page_left;// number of 8-bursts left in the pointed memory page
reg[COLADDR_NUMBER-3:0]mem_page_left;// number of 8-bursts left in the pointed memory page
reg[COLADDR_NUMBER-4:0]line_start_page_left;// number of 8-burst left in the memory page from the start of the frame line
reg[COLADDR_NUMBER-4:0]line_start_page_left;// number of 8-burst left in the memory page from the start of the frame line
reg[NUM_XFER_BITS:0]lim_by_xfer;// number of bursts left limited by the longest transfer (currently 64)
reg[NUM_XFER_BITS:0]lim_by_xfer;// number of bursts left limited by the longest transfer (currently 64)
// reg [MAX_TILE_WIDTH:0] lim_by_tile_width; // number of bursts left limited by the longest transfer (currently 64)
// reg [MAX_TILE_WIDTH:0] lim_by_tile_width; // number of bursts left limited by the longest transfer (currently 64)
wire[COLADDR_NUMBER-3:0]remainder_in_xfer;//remainder_tile_width; // number of bursts postponed to the next partial tile (because of the page crossing) MSB-sign
wire[COLADDR_NUMBER-3:0]remainder_in_xfer;//remainder_tile_width; // number of bursts postponed to the next partial tile (because of the page crossing) MSB-sign
regcontinued_xfer;//continued_tile; // this is a continued tile (caused by page crossing) - only once
regcontinued_xfer;//continued_tile; // this is a continued tile (caused by page crossing) - only once
reg[NUM_XFER_BITS-1:0]leftover;//[MAX_TILE_WIDTH-1:0] leftover_cols; // valid with continued_tile, number of columns left
reg[NUM_XFER_BITS-1:0]leftover;//[MAX_TILE_WIDTH-1:0] leftover_cols; // valid with continued_tile, number of columns left
reg[NUM_XFER_BITS:0]xfer_num128_r;// number of 128-bit words to transfer (8*16 bits) - full bursts of 8
reg[NUM_XFER_BITS:0]xfer_num128_r;// number of 128-bit words to transfer (8*16 bits) - full bursts of 8
// reg [NUM_XFER_BITS-1:0] xfer_num128_m1_r; // number of 128-bit words to transfer minus 1 (8*16 bits) - full bursts of 8
// reg [NUM_XFER_BITS-1:0] xfer_num128_m1_r; // number of 128-bit words to transfer minus 1 (8*16 bits) - full bursts of 8
wirepgm_param_w;// program one of the parameters, invalidate calculated results for PAR_MOD_LATENCY
wirepgm_param_w;// program one of the parameters, invalidate calculated results for PAR_MOD_LATENCY
reg[2:0]xfer_start_r;// 1 hot started by xfer start only (not by parameter change)
reg[2:0]xfer_start_r;// 1 hot started by xfer start only (not by parameter change)
regxfer_start_rd_r;
regxfer_start_rd_r;
regxfer_start_wr_r;
regxfer_start_wr_r;
reg[PAR_MOD_LATENCY-1:0]par_mod_r;
reg[PAR_MOD_LATENCY-1:0]par_mod_r;
reg[PAR_MOD_LATENCY-1:0]recalc_r;// 1-hot CE for re-calculating registers
reg[PAR_MOD_LATENCY-1:0]recalc_r;// 1-hot CE for re-calculating registers
// SuppressWarnings VEditor unused
// SuppressWarnings VEditor unused
...
@@ -210,7 +209,6 @@ module mcntrl_linear_rw #(
...
@@ -210,7 +209,6 @@ module mcntrl_linear_rw #(
regframe_finished_r;
regframe_finished_r;
wirelast_in_row_w;
wirelast_in_row_w;
wirelast_row_w;
wirelast_row_w;
// wire last_block_w;
reglast_block;
reglast_block;
reg[MCNTRL_SCANLINE_PENDING_CNTR_BITS-1:0]pending_xfers;// number of requested,. but not finished block transfers
reg[MCNTRL_SCANLINE_PENDING_CNTR_BITS-1:0]pending_xfers;// number of requested,. but not finished block transfers
reg[NUM_RC_BURST_BITS-1:0]row_col_r;
reg[NUM_RC_BURST_BITS-1:0]row_col_r;
...
@@ -258,7 +256,6 @@ module mcntrl_linear_rw #(
...
@@ -258,7 +256,6 @@ module mcntrl_linear_rw #(
reg[LAST_FRAME_BITS-1:0]frame_number_current;
reg[LAST_FRAME_BITS-1:0]frame_number_current;
regis_last_frame;
regis_last_frame;
// reg [2:0] frame_start_r;
reg[4:0]frame_start_r;// increased length to have time from line_unfinished to suspend (external)
reg[4:0]frame_start_r;// increased length to have time from line_unfinished to suspend (external)
reg[FRAME_WIDTH_BITS:0]frame_full_width;// (programmed) increment combined row/col when moving to the next line
reg[FRAME_WIDTH_BITS:0]frame_full_width;// (programmed) increment combined row/col when moving to the next line
...
@@ -270,6 +267,7 @@ module mcntrl_linear_rw #(
...
@@ -270,6 +267,7 @@ module mcntrl_linear_rw #(
reg[FRAME_HEIGHT_BITS-1:0]window_y0;// (programmed) window top
reg[FRAME_HEIGHT_BITS-1:0]window_y0;// (programmed) window top
reg[FRAME_WIDTH_BITS-1:0]start_x;// (programmed) normally 0, copied to curr_x on frame_start_late
reg[FRAME_WIDTH_BITS-1:0]start_x;// (programmed) normally 0, copied to curr_x on frame_start_late
reg[FRAME_HEIGHT_BITS-1:0]start_y;// (programmed) normally 0, copied to curr_y on frame_start_late
reg[FRAME_HEIGHT_BITS-1:0]start_y;// (programmed) normally 0, copied to curr_y on frame_start_late
regxfer_done_d;// xfer_done delayed by 1 cycle (also includes xfer_skipped)
regxfer_done_d;// xfer_done delayed by 1 cycle (also includes xfer_skipped)
reg[MCNTRL_SCANLINE_DLY_WIDTH-1:0]start_delay;// how much to delay frame start
reg[MCNTRL_SCANLINE_DLY_WIDTH-1:0]start_delay;// how much to delay frame start