Commit 9a7406b4 authored by Andrey Filippov's avatar Andrey Filippov

synchromized molre frame parameter transitions

parent 4bb4f227
[*]
[*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI
[*] Tue Sep 6 05:52:12 2016
[*] Wed Sep 7 07:20:21 2016
[*]
[dumpfile] "/home/eyesis/git/x393-neon/simulation/x393_dut-20160905230400021.fst"
[dumpfile_mtime] "Tue Sep 6 05:45:49 2016"
[dumpfile_size] 211215977
[dumpfile] "/home/eyesis/git/x393-neon/simulation/x393_dut-20160906212704383.fst"
[dumpfile_mtime] "Wed Sep 7 07:20:01 2016"
[dumpfile_size] 411501315
[savefile] "/home/eyesis/git/x393-neon/cocotb/x393_cocotb_02.sav"
[timestart] 0
[size] 1836 1171
[pos] 1920 23
*-25.560389 111820833 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[pos] 1928 23
*-26.595917 254087388 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] x393_dut.
[treeopen] x393_dut.ddr3_i.ddr3_i.
[treeopen] x393_dut.simul_axi_master_wdata_i.
......@@ -24,6 +24,7 @@
[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_status_i.
[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].
[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.
[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.
[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_pixel_buf_iface_i.
[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[2].jp_channel_i.
[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[2].jp_channel_i.cmprs_pixel_buf_iface_i.
......@@ -46,6 +47,7 @@
[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.
[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[1].
[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[1].mcntrl_linear_wr_sensor_i.
[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[1].mcntrl_tiled_rd_compressor_i.
[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[2].
[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[3].
[treeopen] x393_dut.x393_i.sensors393_i.
......@@ -57,8 +59,8 @@
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[2].
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[3].
[treeopen] x393_dut.x393_i.timing393_i.
[sst_width] 272
[signals_width] 287
[sst_width] 278
[signals_width] 428
[sst_expanded] 1
[sst_vpaned_height] 641
@820
......@@ -538,11 +540,19 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_membuf_i.wpage[1:0]
@800200
-compressor_0
-linear
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.set_mode_w
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.mode_reg[12:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.mode_reg[14:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.window_height[16:0]
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.skip_too_late
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.abort_en
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.aborting_r
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.pending_xfers[1:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.pre_want
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.want_r
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.xfer_grant
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_done
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.set_mode_w
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_start_late
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_start_pending
@c00022
......@@ -578,8 +588,31 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.dout_r[15:
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.dout_valid
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.xfer_want
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.xfer_grant
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.xfer_start_wr
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.xfer_done
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.xfer_done_d
@c00028
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.pending_xfers[1:0]
@28
(0)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.pending_xfers[1:0]
(1)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.pending_xfers[1:0]
@1401200
-group_end
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_finished
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_done
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.xfer_done_d
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.busy_r
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_number[15:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.start_range_addr[21:0]
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.skip_run
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_number_cntr[15:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_start_r[4:0]
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.busy_r
@200
-other channels below
@22
......@@ -605,6 +638,13 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_membuf_i.buf_rd
@22
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_membuf_i.buf_dout[63:0]
@200
-
@1000200
-membuf
-linear
@c00200
-other_channels
@200
-channels 3-2-1 below
@28
x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_membuf_i.buf_rd
......@@ -618,21 +658,94 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_membuf_i.buf_dout[63
x393_dut.x393_i.sensors393_i.sensor_channel_block[1].sensor_membuf_i.buf_rd
@22
x393_dut.x393_i.sensors393_i.sensor_channel_block[1].sensor_membuf_i.buf_dout[63:0]
@200
-channel1 below
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.buf_we
@c00022
x393_dut.x393_i.mcntrl393_i.cmprs_frame_start_dst[3:0]
@28
(0)x393_dut.x393_i.mcntrl393_i.cmprs_frame_start_dst[3:0]
(1)x393_dut.x393_i.mcntrl393_i.cmprs_frame_start_dst[3:0]
(2)x393_dut.x393_i.mcntrl393_i.cmprs_frame_start_dst[3:0]
(3)x393_dut.x393_i.mcntrl393_i.cmprs_frame_start_dst[3:0]
@1401200
-group_end
@c00022
x393_dut.x393_i.compressor393_i.frame_start_dst[3:0]
@28
(0)x393_dut.x393_i.compressor393_i.frame_start_dst[3:0]
(1)x393_dut.x393_i.compressor393_i.frame_start_dst[3:0]
(2)x393_dut.x393_i.compressor393_i.frame_start_dst[3:0]
(3)x393_dut.x393_i.compressor393_i.frame_start_dst[3:0]
@1401200
-group_end
@200
-channel1 below
@22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.buf_din[63:0]
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.frame_start_dst
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_dst
@c00022
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
@28
(0)x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
(1)x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
(2)x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
(3)x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
(4)x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
(5)x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
@1401200
-group_end
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.cmprs_run
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.vsync_late
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.reading_frame_r
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_pend_r
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_done
@22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_number_src[15:0]
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_number[15:0]
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.suspend_end
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frames_numbers_differ
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frames_in_sync
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_dst
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_conf
@c00022
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
@28
(0)x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
(1)x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
(2)x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
(3)x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
(4)x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
(5)x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
@1401200
-group_end
@800200
-tile_chn1
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[1].mcntrl_tiled_rd_compressor_i.frame_start
@200
-
@1000200
-membuf
-linear
@200
-
-tile_chn1
@1401200
-other_channels
@800200
-tile
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[14:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.window_height[16:0]
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.abort_en
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.aborting_r
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_conf
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.busy_r
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_mod
@8022
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_r[4:0]
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.set_mode_w
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.chn_en
......@@ -643,14 +756,50 @@ x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.fram
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_r[4:0]
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_finished
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.last_row_w
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.last_in_row_w
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.last_block
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_done
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.line_start_addr[21:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.next_frame_start_addr[21:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.start_range_addr[21:0]
@28
(2)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_r[4:0]
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.next_frame_start_addr[21:0]
@28
(4)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_r[4:0]
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.start_addr[21:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.start_addr_r[21:0]
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.rst_frame_num_w
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.buf_reset_pend
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.is_last_frame
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_mod
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_en
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.xfer_page_rst_rd
@29
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.xfer_page_rst_pos
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.calc_valid
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.pre_want
(4)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_r[4:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.start_not_partial
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.next_page
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.page_cntr[2:0]
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.need_r
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.cmd_extra_pages[1:0]
@8022
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.page_cntr[2:0]
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.disable_need
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.pre_want
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.xfer_want
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.xfer_grant
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.xfer_start32_rd
......@@ -660,6 +809,8 @@ x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.xfer
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.rowcol_inc[13:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.num_cols_m1[5:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.num_rows_m1[5:0]
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.suspend
@1000200
-tile
@c00200
......@@ -685,9 +836,54 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_en_mcl
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_run_mclk
@200
-
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.vsync_late
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.reading_frame
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.frame_done
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.frame_start_dst
@c08022
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
@28
(0)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
(1)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
(2)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
(3)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
(4)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
(5)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.frame_start_dst_r[5:0]
@1401200
-group_end
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.cmprs_run
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.mb_pre_start
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.last_mb
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.mb_pre2_first_out
@800200
-cmprs_pixel_buffer_ifacde
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_pixel_buf_iface_i.mb_release_buf
@22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_pixel_buf_iface_i.period_cntr[8:0]
@200
-
@1000200
-cmprs_pixel_buffer_ifacde
@800200
-cmprs_macroblock
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.buf_ready_w
@8022
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.buf_diff[2:0]
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.reset_page_rd
@22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.needed_page[2:0]
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.page_ready
@22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.next_valid[2:0]
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.next_page_chn
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.xfer_reset_page_rd
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.cmprs_run_xclk
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.frame_en_r
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.first_mb
......@@ -697,12 +893,12 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macrob
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.mb_pre_start[8:0]
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.frame_que_cntr[2:0]
@800028
@c08028
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.frame_finish_r[1:0]
@28
(0)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.frame_finish_r[1:0]
(1)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.frame_finish_r[1:0]
@1001200
@1401200
-group_end
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.frame_finish_w
......@@ -720,7 +916,7 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macrob
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.mb_rows_left[12:0]
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.mb_last_row
@800022
@c00022
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.mb_pre_start[8:0]
@28
(0)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.mb_pre_start[8:0]
......@@ -732,17 +928,38 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macrob
(6)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.mb_pre_start[8:0]
(7)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.mb_pre_start[8:0]
(8)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.mb_pre_start[8:0]
@1001200
@1401200
-group_end
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.first_mb
@22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.dct_pipeline_delay_cntr[5:0]
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.page_ready_chn
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.page_ready
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.next_page_chn
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.multipulse_cross_clock_i.we
@22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.multipulse_cross_clock_i.num_pulses[2:0]
@200
-
@1000200
-cmprs_macroblock
@c00023
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_mod
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_en
@c08022
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_r[4:0]
@28
(0)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_r[4:0]
(1)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_r[4:0]
(2)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_r[4:0]
(3)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_r[4:0]
(4)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_r[4:0]
@1401200
-group_end
@c00022
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.mbl_x_last_r[7:3]
@28
(0)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.mbl_x_last_r[7:3]
......@@ -750,7 +967,7 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macrob
(2)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.mbl_x_last_r[7:3]
(3)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.mbl_x_last_r[7:3]
(4)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.mbl_x_last_r[7:3]
@1401201
@1401200
-group_end
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.reset_page_rd
......@@ -962,7 +1179,7 @@ x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_n
-
@1401200
-scanline_linear
@800200
@c00200
-mcntrl_tiled
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start
......@@ -997,24 +1214,6 @@ x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.fram
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_finished
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.xfer_page_rst_r
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.chn_rst
@c00022
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
@28
(0)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(1)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(2)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(3)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(4)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(5)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(6)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(7)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(8)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(9)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(10)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(11)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
@1401200
-group_end
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.chn_en
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.pre_want
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.master_set
......@@ -1026,8 +1225,9 @@ x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.susp
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.xfer_want
@200
-
@1000200
@1401200
-mcntrl_tiled
@1000200
-follow_master
@c00200
-compressors_all
......@@ -1993,9 +2193,9 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.vsync_late
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.hclk
@1401200
-compressor_channel0
@c00200
@800200
-interrupts
@800022
@c00022
x393_dut.irq_r[8:0]
@28
(0)x393_dut.irq_r[8:0]
......@@ -2007,7 +2207,7 @@ x393_dut.irq_r[8:0]
(6)x393_dut.irq_r[8:0]
(7)x393_dut.irq_r[8:0]
(8)x393_dut.irq_r[8:0]
@1001200
@1401200
-group_end
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_status_i.is_r
......@@ -2031,7 +2231,7 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_status
-group_end
@200
-
@1401200
@1000200
-interrupts
@c00200
-afi0_mux
......
......@@ -68,6 +68,9 @@ module cmprs_frame_sync#(
output frame_start_dst, // @mclk - trigger receive (tiled) memory channel (it will take care of single/repetitive
// this output either follows vsync_late (reclocks it) or generated in non-bonded mode
// (compress from memory)
input frame_start_conf, // memory controller confirmed frame_start_dst - normally delayed by 1 clock,
// or more if there were outstanding memory transactions.
input [FRAME_HEIGHT_BITS-1:0] line_unfinished_src,// number of the current (unfinished ) line, in the source (sensor) channel (RELATIVE TO FRAME, NOT WINDOW?)
input [LAST_FRAME_BITS-1:0] frame_number_src, // current frame number (for multi-frame ranges) in the source (sensor) channel
input frame_done_src, // single-cycle pulse when the full frame (window) was transferred to/from DDR3 memory
......@@ -77,7 +80,8 @@ module cmprs_frame_sync#(
input [FRAME_HEIGHT_BITS-1:0] line_unfinished, // number of the current (unfinished ) line in this (compressor) channel
input [LAST_FRAME_BITS-1:0] frame_number, // current frame number (for multi-frame ranges) in this (compressor channel
input frames_in_sync, // frame number in destination memory channel is valid for bonded mode
input frame_done, // input - single-cycle pulse when the full frame (window) was transferred to/from DDR3 memory
input frame_done, // input - single-cycle pulse when the full frame (window) was transferred to/from DDR3 memory\
input last_mb_started, // @ xclk - last mb started running, safe to assume memory channel is done
output reg suspend, // suspend reading data for this channel - waiting for the source data
input stuffer_running, // @xclk2x stuffer is running/flushing
......@@ -115,6 +119,7 @@ module cmprs_frame_sync#(
reg cmprs_en_d;
reg suspend_end; // suspend at the end of the current frame until frame number changes
// reg cmprs_en_xclk;
wire last_mb_started_mclk;
assign frame_start_dst = frame_start_dst_r[0];
assign cmprs_en_extend = cmprs_en_extend_r;
......@@ -128,6 +133,7 @@ module cmprs_frame_sync#(
if (mrst) cmprs_en_extend_r <= 0;
else if (cmprs_en) cmprs_en_extend_r <= 1;
else if ((timeout == 0) || !stuffer_running_mclk_r) cmprs_en_extend_r <= 0;
end
always @ (posedge mclk) begin
......@@ -139,21 +145,21 @@ module cmprs_frame_sync#(
cmprs_en_d <= cmprs_en;
/// broken_frame <= cmprs_en && cmprs_run && vsync_late && reading_frame_r; // single xclk pulse
// broken_frame <= cmprs_en && cmprs_run && vsync_late && reading_frame_r; // single xclk pulse
aborted_frame <= cmprs_en_d && !cmprs_en && stuffer_running_mclk_r;
if (!stuffer_running_mclk_r ||!cmprs_en_extend_r) force_flush_long <= 0;
/// else if (broken_frame || aborted_frame) force_flush_long <= 1;
// else if (broken_frame || aborted_frame) force_flush_long <= 1;
else if (aborted_frame) force_flush_long <= 1;
/// if (!cmprs_en || frame_done || (cmprs_run && vsync_late)) reading_frame_r <= 0;
if (!cmprs_en || frame_done ) reading_frame_r <= 0;
// if (!cmprs_en || frame_done || (cmprs_run && vsync_late)) reading_frame_r <= 0;
// last_mb_start[2] is used as emergency turn off reading_frame if memory channel did not generate frame_done (i.e. wrong frame height)
// TODO: Consider the opposite - frame_done, but not got the last MB?
if (!cmprs_en || frame_done || last_mb_started_mclk) reading_frame_r <= 0;
else if (frame_started_mclk) reading_frame_r <= 1;
// if (!cmprs_en || frame_start_dst_r[0]) frame_start_pend_r <= 0;
if (!cmprs_run || frame_start_dst_r[0]) frame_start_pend_r <= 0;
// else if (cmprs_run && vsync_late && reading_frame_r) frame_start_pend_r <= 1;
// if (!cmprs_run || frame_start_dst_r[0]) frame_start_pend_r <= 0;
if (!cmprs_run || frame_start_conf) frame_start_pend_r <= 0;
else if ((cmprs_run && vsync_late && reading_frame_r) ||
(frame_start_dst_r[5] && bonded_mode && frames_numbers_differ)) frame_start_pend_r <= 1;
// else if (frame_start_dst_r[0]) frame_start_pend_r <= 0;
......@@ -168,8 +174,10 @@ module cmprs_frame_sync#(
frame_start_dst_r[0] <= cmprs_en && (cmprs_run ?
((vsync_late && !reading_frame_r) || (frame_start_pend_r && frame_done)):
cmprs_standalone);
// modified - now bit 0 is disconnected from 1..5, 1 gets from memory channel controller, may be delayed
if (!cmprs_en) frame_start_dst_r[5:1] <=0;
else frame_start_dst_r[5:1] <= frame_start_dst_r[4:0];
// else frame_start_dst_r[5:1] <= frame_start_dst_r[4:0];
else frame_start_dst_r[5:1] <= {frame_start_dst_r[4:1],frame_start_conf};
if (!cmprs_en) bonded_mode <= 0;
else if (cmprs_run) bonded_mode <= 1;
......@@ -188,6 +196,8 @@ module cmprs_frame_sync#(
// pulse_cross_clock vsync_late_mclk_i (.rst(xrst), .src_clk(xclk), .dst_clk(mclk), .in_pulse(cmprs_en_xclk && vsync_late), .out_pulse(vsync_late_mclk),.busy());
pulse_cross_clock frame_started_i (.rst(xrst), .src_clk(xclk), .dst_clk(mclk), .in_pulse(frame_started), .out_pulse(frame_started_mclk),.busy());
pulse_cross_clock last_mb_started_i (.rst(xrst), .src_clk(xclk), .dst_clk(mclk), .in_pulse(last_mb_started), .out_pulse(last_mb_started_mclk),.busy());
endmodule
......@@ -169,6 +169,8 @@ module compressor393 # (
output [3:0] frame_start_dst, // @mclk - trigger receive (tiledc) memory channel (it will take care of single/repetitive
// these output either follows vsync_late (reclocks it) or generated in non-bonded mode
// (compress from memory)
input [3:0] frame_start_conf, // memory controller confirmed frame_start_dst - normally delayed by 1 clock,
// or more if there were outstanding memory transactions.
input [4*FRAME_HEIGHT_BITS-1:0] line_unfinished_src,// number of the current (unfinished ) line, in the source (sensor) channel (RELATIVE TO FRAME, NOT WINDOW?)
input [4*LAST_FRAME_BITS-1:0] frame_number_src, // current frame number (for multi-frame ranges) in the source (sensor) channel
input [3:0] frame_done_src, // single-cycle pulse when the full frame (window) was transferred to/from DDR3 memory
......@@ -438,6 +440,7 @@ module compressor393 # (
.next_page_chn (next_page[i]), // output
.frame_start_dst (frame_start_dst[i]), // output
.frame_start_conf (frame_start_conf[i]), // input
.line_unfinished_src (line_unfinished_src[FRAME_HEIGHT_BITS * i +: FRAME_HEIGHT_BITS]), // input[15:0]
.frame_number_src (frame_number_src[LAST_FRAME_BITS * i +: LAST_FRAME_BITS]), // input[15:0]
.frame_done_src (frame_done_src[i]), // input
......
......@@ -155,6 +155,9 @@ module jp_channel#(
output frame_start_dst, // @mclk - trigger receive (tiledc) memory channel (it will take care of single/repetitive
// this output either follows vsync_late (reclocks it) or generated in non-bonded mode
// (compress from memory)
input frame_start_conf, // memory controller confirmed frame_start_dst - normally delayed by 1 clock,
// or more if there were outstanding memory transactions.
input [FRAME_HEIGHT_BITS-1:0] line_unfinished_src,// number of the current (unfinished ) line, in the source (sensor) channel (RELATIVE TO FRAME, NOT WINDOW?)
input [LAST_FRAME_BITS-1:0] frame_number_src, // current frame number (for multi-frame ranges) in the source (sensor) channel
input frame_done_src, // single-cycle pulse when the full frame (window) was transferred to/from DDR3 memory
......@@ -582,7 +585,8 @@ module jp_channel#(
.rst (!cmprs_en_mclk),
.src_clk (mclk),
.dst_clk (hclk),
.in_pulse (frame_start_dst),
// .in_pulse (frame_start_dst),
.in_pulse (frame_start_conf),
.out_pulse (dbg_frame_start_hclk),
.busy ());
......@@ -725,7 +729,8 @@ module jp_channel#(
.color_sat_we (set_color_saturation_w), // input - write color saturation values
.coring_we (set_coring_w), // input - write color saturation values
.di (cmd_data), // input[31:0] - 32-bit data to write to control register (24LSB are used)
.frame_start (frame_start_dst), // input @mclk
// .frame_start (frame_start_dst), // input @mclk
.frame_start (frame_start_conf), // input @mclk
.frame_start_xclk (frame_start_xclk), // output re-clocked, parameters are copied during this pulse
.cmprs_en_mclk (cmprs_en_mclk), // output
.cmprs_en_extend (cmprs_en_extend), // input
......@@ -796,6 +801,8 @@ module jp_channel#(
.frame_start_dst (frame_start_dst), // output reg @mclk - trigger receive (tiled) memory channel (it will take care of
// single/repetitive modes itself this output either follows vsync_late (reclocks it)
// or generated in non-bonded mode (compress from memory once)
.frame_start_conf (frame_start_conf), // input: memory controller confirmed cmprs_frame_start_dst - normally delayed by 1 clock,
// or more if there were outstanding memory transactions.
.line_unfinished_src(line_unfinished_src), // input[15:0] - number of the current (unfinished ) line, in the source (sensor) channel
.frame_number_src (frame_number_src), // input[15:0] - current frame number (for multi-frame ranges) in the source (sensor) channel
.frame_done_src (frame_done_src), // input - single-cycle pulse when the full frame (window) was transferred to/from DDR3 memory
......@@ -804,7 +811,8 @@ module jp_channel#(
.line_unfinished (line_unfinished_dst), // input[15:0] - number of the current (unfinished ) line in this (compressor) channel
.frame_number (frame_number_dst), // input[15:0] - current frame number (for multi-frame ranges) in this (compressor channel
.frames_in_sync (frames_in_sync), // frame number in destination memory channel is valid for bonded mode
.frame_done (frame_done_dst), // input - single-cycle pulse when the full frame (window) was transferred to/from DDR3 memory
.frame_done (frame_done_dst), // input - single-cycle pulse when the full frame (window) was transferred to/from DDR3 memory
.last_mb_started (last_mb && mb_pre2_first_out), // input
.suspend (suspend), // output reg - suspend reading data for this channel - waiting for the source data
.stuffer_running (stuffer_running), // input
.force_flush_long (force_flush_long), // output reg - @ mclk tried to start frame compression before the previous one was finished
......
......@@ -35,7 +35,7 @@
* contains all the components and scripts required to completely simulate it
* with at least one of the Free Software programs.
*/
parameter FPGA_VERSION = 32'h039300ae; // parallel, increasing sesnsor-channels maximal delays to 12 bits
parameter FPGA_VERSION = 32'h039300ae; // parallel, increasing sesnsor-channels maximal delays to 12 bits -0.091/25, 79.89%
// parameter FPGA_VERSION = 32'h039300ad; // parallel, resetting frame_pre_run. All met, 79.97%
// parameter FPGA_VERSION = 32'h039300ac; // parallel, adding reset needed_page in compressor -0.012 (2), 79.39%
// parameter FPGA_VERSION = 32'h039300ab; // parallel, more on frame sync in compressor All met, 79.04%
......
......@@ -298,6 +298,7 @@
parameter MCONTR_LINTILE_DIS_NEED = 11, // disable 'need' request
parameter MCONTR_LINTILE_SKIP_LATE = 12, // skip actual R/W operation when it is too late, advance pointers
parameter MCONTR_LINTILE_COPY_FRAME = 13, // copy frame number from the master channel (single event, not a persistent mode)
parameter MCONTR_LINTILE_ABORT_LATE = 14, // abort frame if not finished by the new frame sync (wait pending memory)
parameter MCNTRL_SCANLINE_DLY_WIDTH = 12, // delay start pulse by 1..64 mclk
parameter MCNTRL_SCANLINE_DLY_DEFAULT = 63, // initial delay value for start pulse
......
......@@ -262,6 +262,7 @@ module mcntrl393 #(
parameter MCONTR_LINTILE_DIS_NEED = 11, // disable 'need' request
parameter MCONTR_LINTILE_SKIP_LATE = 12, // skip actual R/W operation when it is too late, advance pointers
parameter MCONTR_LINTILE_COPY_FRAME = 13, // copy frame number from the master channel (single event, not a persistent mode)
parameter MCONTR_LINTILE_ABORT_LATE = 14, // abort frame if not finished by the new frame sync (wait pending memory)
parameter MCNTRL_SCANLINE_DLY_WIDTH = 12, // delay start pulse by 1..64 mclk
parameter MCNTRL_SCANLINE_DLY_DEFAULT = 63 // initial delay value for start pulse
......@@ -343,6 +344,7 @@ module mcntrl393 #(
input [3:0] cmprs_frame_start_dst, // @mclk - trigger receive (tiledc) memory channel (it will take care of single/repetitive
// these output either follows vsync_late (reclocks it) or generated in non-bonded mode
// (compress from memory)
output [3:0] cmprs_frame_start_conf, // @mclk lags by 1 from cmprs_frame_start_dst, more if there are outstanding memory transactions
output [4*FRAME_HEIGHT_BITS-1:0] cmprs_line_unfinished_src,// number of the current (unfinished ) line, in the source (sensor) channel (RELATIVE TO FRAME, NOT WINDOW?)
output [4*LAST_FRAME_BITS-1:0] cmprs_frame_number_src, // current frame number (for multi-frame ranges) in the source (sensor) channel
output [3:0] cmprs_frame_done_src, // single-cycle pulse when the full frame (window) was transferred to/from DDR3 memory
......@@ -1116,6 +1118,7 @@ module mcntrl393 #(
.MCONTR_LINTILE_REPEAT (MCONTR_LINTILE_REPEAT),
.MCONTR_LINTILE_DIS_NEED (MCONTR_LINTILE_DIS_NEED),
.MCONTR_LINTILE_SKIP_LATE (MCONTR_LINTILE_SKIP_LATE),
.MCONTR_LINTILE_ABORT_LATE (MCONTR_LINTILE_ABORT_LATE),
.MCNTRL_SCANLINE_DLY_WIDTH (MCNTRL_SCANLINE_DLY_WIDTH),
.MCNTRL_SCANLINE_DLY_DEFAULT (MCNTRL_SCANLINE_DLY_DEFAULT)
) mcntrl_linear_wr_sensor_i (
......@@ -1191,7 +1194,9 @@ module mcntrl393 #(
.MCONTR_LINTILE_SINGLE (MCONTR_LINTILE_SINGLE),
.MCONTR_LINTILE_REPEAT (MCONTR_LINTILE_REPEAT),
.MCONTR_LINTILE_DIS_NEED (MCONTR_LINTILE_DIS_NEED),
.MCONTR_LINTILE_COPY_FRAME (MCONTR_LINTILE_COPY_FRAME)
.MCONTR_LINTILE_COPY_FRAME (MCONTR_LINTILE_COPY_FRAME),
.MCONTR_LINTILE_ABORT_LATE (MCONTR_LINTILE_ABORT_LATE)
) mcntrl_tiled_rd_compressor_i (
.mrst (mrst), // input
.mclk (mclk), // input
......@@ -1201,6 +1206,7 @@ module mcntrl393 #(
.status_rq (status_cmprs_rq[i]), // output
.status_start (status_cmprs_start[i]), // input
.frame_start (cmprs_frame_start_dst[i]), // input
.frame_start_conf (cmprs_frame_start_conf[i]), // output
.next_page (cmprs_next_page[i]), // input compressor consumed page cmprs_buf_wpage_nxt?
.frame_done (cmprs_frame_done_dst[i]), // output
.frame_finished (), // output
......@@ -1270,6 +1276,7 @@ module mcntrl393 #(
.MCONTR_LINTILE_REPEAT (MCONTR_LINTILE_REPEAT),
.MCONTR_LINTILE_DIS_NEED (MCONTR_LINTILE_DIS_NEED),
.MCONTR_LINTILE_SKIP_LATE (MCONTR_LINTILE_SKIP_LATE),
.MCONTR_LINTILE_ABORT_LATE (MCONTR_LINTILE_ABORT_LATE),
.MCNTRL_SCANLINE_DLY_WIDTH (MCNTRL_SCANLINE_DLY_WIDTH),
.MCNTRL_SCANLINE_DLY_DEFAULT (MCNTRL_SCANLINE_DLY_DEFAULT)
......@@ -1345,6 +1352,7 @@ module mcntrl393 #(
.MCONTR_LINTILE_REPEAT (MCONTR_LINTILE_REPEAT),
.MCONTR_LINTILE_DIS_NEED (MCONTR_LINTILE_DIS_NEED),
.MCONTR_LINTILE_SKIP_LATE (MCONTR_LINTILE_SKIP_LATE),
.MCONTR_LINTILE_ABORT_LATE (MCONTR_LINTILE_ABORT_LATE),
.MCNTRL_SCANLINE_DLY_WIDTH (MCNTRL_SCANLINE_DLY_WIDTH),
.MCNTRL_SCANLINE_DLY_DEFAULT (MCNTRL_SCANLINE_DLY_DEFAULT)
) mcntrl_linear_rw_chn3_i (
......@@ -1418,7 +1426,8 @@ module mcntrl393 #(
.MCONTR_LINTILE_RST_FRAME (MCONTR_LINTILE_RST_FRAME),
.MCONTR_LINTILE_SINGLE (MCONTR_LINTILE_SINGLE),
.MCONTR_LINTILE_REPEAT (MCONTR_LINTILE_REPEAT),
.MCONTR_LINTILE_DIS_NEED (MCONTR_LINTILE_DIS_NEED)
.MCONTR_LINTILE_DIS_NEED (MCONTR_LINTILE_DIS_NEED),
.MCONTR_LINTILE_ABORT_LATE (MCONTR_LINTILE_ABORT_LATE)
) mcntrl_tiled_rw_chn2_i (
.mrst (mrst), // input
.mclk (mclk), // input
......@@ -1428,6 +1437,7 @@ module mcntrl393 #(
.status_rq (status_tiled_chn2_rq), // output
.status_start (status_tiled_chn2_start), // input
.frame_start (frame_start_chn2), // input
.frame_start_conf (), // output
.next_page (next_page_chn2), // input
.frame_done (frame_done_chn2), // output
.frame_finished (), // output
......@@ -1490,7 +1500,8 @@ module mcntrl393 #(
.MCONTR_LINTILE_RST_FRAME (MCONTR_LINTILE_RST_FRAME),
.MCONTR_LINTILE_SINGLE (MCONTR_LINTILE_SINGLE),
.MCONTR_LINTILE_REPEAT (MCONTR_LINTILE_REPEAT),
.MCONTR_LINTILE_DIS_NEED (MCONTR_LINTILE_DIS_NEED)
.MCONTR_LINTILE_DIS_NEED (MCONTR_LINTILE_DIS_NEED),
.MCONTR_LINTILE_ABORT_LATE (MCONTR_LINTILE_ABORT_LATE)
) mcntrl_tiled_rw_chn4_i (
.mrst (mrst), // input
.mclk (mclk), // input
......@@ -1500,6 +1511,7 @@ module mcntrl393 #(
.status_rq (status_tiled_chn4_rq), // output
.status_start (status_tiled_chn4_start), // input
.frame_start (frame_start_chn4), // input
.frame_start_conf (), // output
.next_page (next_page_chn4), // input
.frame_done (frame_done_chn4), // output
.frame_finished (), // output
......
......@@ -78,6 +78,7 @@ module mcntrl_linear_rw #(
parameter MCONTR_LINTILE_REPEAT = 10, // read/write pages until disabled
parameter MCONTR_LINTILE_DIS_NEED = 11, // disable 'need' request
parameter MCONTR_LINTILE_SKIP_LATE = 12, // skip actual R/W operation when it is too late, advance pointers
parameter MCONTR_LINTILE_ABORT_LATE = 14, // abort frame if not finished by the new frame sync (wait pending memory)
// TODO NC393: This delay may be too long for serail sensors. Make them always start to fill the
// first buffer page, waiting for the request from mcntrl_linear during that first page. And if it will arrive -
......@@ -176,9 +177,11 @@ module mcntrl_linear_rw #(
reg [PAR_MOD_LATENCY-1:0] recalc_r; // 1-hot CE for re-calculating registers
// SuppressWarnings VEditor unused
wire calc_valid; // calculated registers have valid values
wire chn_en; // enable requests by channel (continue ones in progress), enable frame_start_late inputs
wire chn_rst; // resets command, including fifo;
reg chn_rst_d; // delayed by 1 cycle do detect turning off
wire chn_en; // enable requests by channel (continue ones in progress), enable frame_start_late inputs
wire chn_rst; // resets command, including fifo;
reg chn_rst_d; // delayed by 1 cycle do detect turning off
wire abort_en; // enable frame abort (mode register bit)
reg aborting_r; // waiting pending memory transactions at if the frame was not finished at frame sync
// reg xfer_reset_page_r;