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Elphel
x393
Commits
96100b61
Commit
96100b61
authored
Dec 14, 2017
by
Andrey Filippov
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Plain Diff
fixed sequencing
parent
30ad4d73
Changes
2
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2 changed files
with
39 additions
and
14 deletions
+39
-14
mclt16x16.v
dsp/mclt16x16.v
+3
-1
mclt_test_01.sav
mclt_test_01.sav
+36
-13
No files found.
dsp/mclt16x16.v
View file @
96100b61
...
...
@@ -175,6 +175,7 @@ module mclt16x16#(
if
(
in_busy
[
10
])
pix_wnd_r2
<=
{
2'b00
,
pix_wnd_r
[
PIXEL_WIDTH
+
WND_WIDTH
-
1
-:
DTT_IN_WIDTH
-
2
]
};
if
(
in_busy
[
10
])
begin
/// if (in_busy[9]) begin
mpix_use_r
<=
mpix_use_d
;
var_first_r
<=
var_first_d
;
mpix_sgn_r
<=
mpix_sgn_d
;
...
...
@@ -309,7 +310,8 @@ D11 - negate for mode 3 (SS)
)
dly_var_first_i
(
.
clk
(
clk
)
,
// input
.
rst
(
rst
)
,
// input
.
dly
(
4'h8
)
,
// input[3:0]
/// .dly (4'h8), // input[3:0]
.
dly
(
4'h9
)
,
// input[3:0]
.
din
(
in_busy
[
0
]
&&
(
in_cntr
[
1
:
0
]
==
0
))
,
// input[0:0]
.
dout
(
var_first_d
)
// output[0:0]
)
;
...
...
mclt_test_01.sav
View file @
96100b61
[*]
[*] GTKWave Analyzer v3.3.78 (w)1999-2016 BSI
[*] Thu Dec 14 0
2:04:25
2017
[*] Thu Dec 14 0
6:19:18
2017
[*]
[dumpfile] "/home/eyesis/nc393/elphel393/fpga-elphel/x393_branch_dct/simulation/mclt_test_01-201712131
85819967
.fst"
[dumpfile_mtime] "Thu Dec 14 0
1:58:22
2017"
[dumpfile_size] 9356
15
[dumpfile] "/home/eyesis/nc393/elphel393/fpga-elphel/x393_branch_dct/simulation/mclt_test_01-201712131
95034071
.fst"
[dumpfile_mtime] "Thu Dec 14 0
2:50:36
2017"
[dumpfile_size] 9356
52
[savefile] "/home/eyesis/nc393/elphel393/fpga-elphel/x393_branch_dct/mclt_test_01.sav"
[timestart] 0
[timestart]
36560
0
[size] 1920 1171
[pos] -1921 -1
*-
21.521639 833
5000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
*-
15.459125 41
5000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] mclt_test_01.
[treeopen] mclt_test_01.mclt16x16_i.
[sst_width]
446
[signals_width]
198
[sst_width]
242
[signals_width]
275
[sst_expanded] 1
[sst_vpaned_height] 344
@800200
...
...
@@ -37,7 +37,7 @@ mclt_test_01.mpixel_d[15:0]
@28
mclt_test_01.pre_last_in
mclt_test_01.pre_first_out
@802
3
@802
2
mclt_test_01.out_addr[7:0]
@28
mclt_test_01.dv
...
...
@@ -49,7 +49,7 @@ mclt_test_01.pre_last_out
-top
@800200
-mclt16x16
@
c
00022
@
8
00022
mclt_test_01.mclt16x16_i.in_busy[16:0]
@28
(0)mclt_test_01.mclt16x16_i.in_busy[16:0]
...
...
@@ -69,10 +69,29 @@ mclt_test_01.mclt16x16_i.in_busy[16:0]
(14)mclt_test_01.mclt16x16_i.in_busy[16:0]
(15)mclt_test_01.mclt16x16_i.in_busy[16:0]
(16)mclt_test_01.mclt16x16_i.in_busy[16:0]
@1
4
01200
@1
0
01200
-group_end
@22
mclt_test_01.mclt16x16_i.in_cntr[7:0]
mclt_test_01.mclt16x16_i.fold_rom_out[17:0]
mclt_test_01.mclt16x16_i.mpix_a_w[7:0]
@28
mclt_test_01.mclt16x16_i.mpix_use
@22
mclt_test_01.mclt16x16_i.window_w[17:0]
mclt_test_01.mclt16x16_i.window_r[17:0]
mclt_test_01.mclt16x16_i.mpixel_a[7:0]
mclt_test_01.mclt16x16_i.mpixel_d[15:0]
mclt_test_01.mclt16x16_i.mpixel_d_r[15:0]
mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]
@23
mclt_test_01.mclt16x16_i.pix_wnd_r2[24:0]
@28
mclt_test_01.mclt16x16_i.mpix_use_d
@22
mclt_test_01.mclt16x16_i.mpix_sgn_w[3:0]
mclt_test_01.mclt16x16_i.mpix_sgn_d[3:0]
mclt_test_01.mclt16x16_i.mpix_sgn_r[3:0]
@28
mclt_test_01.mclt16x16_i.pre_busy
mclt_test_01.mclt16x16_i.pre_busy_r
...
...
@@ -224,6 +243,10 @@ mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]
-group_end
@8420
mclt_test_01.mclt16x16_i.pix_wnd_r2[24:0]
@28
mclt_test_01.mclt16x16_i.var_first_d
mclt_test_01.mclt16x16_i.var_first_r
mclt_test_01.mclt16x16_i.var_last
@8022
mclt_test_01.mclt16x16_i.mode_mux[1:0]
@8420
...
...
@@ -236,7 +259,7 @@ mclt_test_01.mclt16x16_i.dtt_r_page
mclt_test_01.mclt16x16_i.dtt_r_data_w[35:0]
@8420
mclt_test_01.mclt16x16_i.dtt_r_data[24:0]
@
c
00200
@
8
00200
-ddt_in_ram
@28
mclt_test_01.mclt16x16_i.ram18p_var_w_var_r_dtt_in_i.we
...
...
@@ -251,7 +274,7 @@ mclt_test_01.mclt16x16_i.ram18p_var_w_var_r_dtt_in_i.regen
mclt_test_01.mclt16x16_i.ram18p_var_w_var_r_dtt_in_i.data_out[35:0]
@200
-
@1
401
200
@1
000
200
-ddt_in_ram
@28
mclt_test_01.mclt16x16_i.dtt_r_re
...
...
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