Commit 96092048 authored by Andrey Filippov's avatar Andrey Filippov

synchronizing i2c frame number with command sequence frame number

parent 36d3e40a
...@@ -62,52 +62,52 @@ ...@@ -62,52 +62,52 @@
<link> <link>
<name>vivado_logs/VivadoBitstream.log</name> <name>vivado_logs/VivadoBitstream.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20160507151954677.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20160508121344091.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoOpt.log</name> <name>vivado_logs/VivadoOpt.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoOpt-20160507151954677.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoOpt-20160508121344091.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoOptPhys.log</name> <name>vivado_logs/VivadoOptPhys.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoOptPhys-20160507151954677.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoOptPhys-20160508121344091.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoOptPower.log</name> <name>vivado_logs/VivadoOptPower.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoOptPower-20160507151954677.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoOptPower-20160508121344091.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoPlace.log</name> <name>vivado_logs/VivadoPlace.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoPlace-20160507151954677.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoPlace-20160508121344091.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoRoute.log</name> <name>vivado_logs/VivadoRoute.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoRoute-20160507151954677.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoRoute-20160508121344091.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoSynthesis.log</name> <name>vivado_logs/VivadoSynthesis.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoSynthesis-20160507151111576.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoSynthesis-20160508120724364.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoTimimgSummaryReportImplemented.log</name> <name>vivado_logs/VivadoTimimgSummaryReportImplemented.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-20160507151954677.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-20160508121344091.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoTimimgSummaryReportSynthesis.log</name> <name>vivado_logs/VivadoTimimgSummaryReportSynthesis.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportSynthesis-20160507151111576.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportSynthesis-20160508120724364.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoTimingReportSynthesis.log</name> <name>vivado_logs/VivadoTimingReportSynthesis.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportSynthesis-20160507151111576.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportSynthesis-20160508120724364.log</location>
</link> </link>
<link> <link>
<name>vivado_state/x393-opt-phys.dcp</name> <name>vivado_state/x393-opt-phys.dcp</name>
...@@ -127,7 +127,7 @@ ...@@ -127,7 +127,7 @@
<link> <link>
<name>vivado_state/x393-synth.dcp</name> <name>vivado_state/x393-synth.dcp</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_state/x393-synth-20160507151111576.dcp</location> <location>/home/andrey/git/x393/vivado_state/x393-synth-20160508120724364.dcp</location>
</link> </link>
</linkedResources> </linkedResources>
</projectDescription> </projectDescription>
...@@ -32,7 +32,8 @@ ...@@ -32,7 +32,8 @@
* with at least one of the Free Software programs. * with at least one of the Free Software programs.
*******************************************************************************/ *******************************************************************************/
parameter FPGA_VERSION = 32'h03930088; // Fixing circbuf rollover pointers bug parameter FPGA_VERSION = 32'h03930089; // Auto-synchronizing io2c sequencers with the command ones
// parameter FPGA_VERSION = 32'h03930088; // Fixing circbuf rollover pointers bug (only one path violated)
// parameter FPGA_VERSION = 32'h03930087; // Fixed default 90% quantization table // parameter FPGA_VERSION = 32'h03930087; // Fixed default 90% quantization table
// parameter FPGA_VERSION = 32'h03930087; // Synchronizing i2c sequencer frame number with that of a command sequencer // parameter FPGA_VERSION = 32'h03930087; // Synchronizing i2c sequencer frame number with that of a command sequencer
// parameter FPGA_VERSION = 32'h03930086; // Adding byte-wide JTAG read to speed-up 10359 load // parameter FPGA_VERSION = 32'h03930086; // Adding byte-wide JTAG read to speed-up 10359 load
......
...@@ -198,6 +198,8 @@ module sensor_channel#( ...@@ -198,6 +198,8 @@ module sensor_channel#(
parameter SENSI2C_IBUF_LOW_PWR= "TRUE", parameter SENSI2C_IBUF_LOW_PWR= "TRUE",
parameter SENSI2C_SLEW = "SLOW", parameter SENSI2C_SLEW = "SLOW",
parameter NUM_FRAME_BITS = 4,
`ifndef HISPI `ifndef HISPI
//sensor_fifo parameters //sensor_fifo parameters
parameter SENSOR_DATA_WIDTH = 12, parameter SENSOR_DATA_WIDTH = 12,
...@@ -322,6 +324,9 @@ module sensor_channel#( ...@@ -322,6 +324,9 @@ module sensor_channel#(
input trigger_mode, // running in triggered mode (0 - free running mode) input trigger_mode, // running in triggered mode (0 - free running mode)
input trig_in, // per-sensor trigger input input trig_in, // per-sensor trigger input
input [NUM_FRAME_BITS-1:0] frame_num_seq, // frame number from the command sequencer (to sync i2c)
// 16/8-bit mode data to memory (8-bits are packed by 2 in 16 mode @posedge pclk // 16/8-bit mode data to memory (8-bits are packed by 2 in 16 mode @posedge pclk
output [15:0] dout, // @posedge pclk output [15:0] dout, // @posedge pclk
output dout_valid, // in 8-bit mode continues pixel flow have dout_valid alternating on/off output dout_valid, // in 8-bit mode continues pixel flow have dout_valid alternating on/off
...@@ -637,7 +642,8 @@ module sensor_channel#( ...@@ -637,7 +642,8 @@ module sensor_channel#(
.SENSI2C_DRIVE (SENSI2C_DRIVE), .SENSI2C_DRIVE (SENSI2C_DRIVE),
.SENSI2C_IBUF_LOW_PWR (SENSI2C_IBUF_LOW_PWR), .SENSI2C_IBUF_LOW_PWR (SENSI2C_IBUF_LOW_PWR),
.SENSI2C_IOSTANDARD (SENSI2C_IOSTANDARD), .SENSI2C_IOSTANDARD (SENSI2C_IOSTANDARD),
.SENSI2C_SLEW (SENSI2C_SLEW) .SENSI2C_SLEW (SENSI2C_SLEW),
.NUM_FRAME_BITS (NUM_FRAME_BITS)
) sensor_i2c_io_i ( ) sensor_i2c_io_i (
.mrst (mrst), // input .mrst (mrst), // input
.mclk (mclk), // input .mclk (mclk), // input
...@@ -647,6 +653,7 @@ module sensor_channel#( ...@@ -647,6 +653,7 @@ module sensor_channel#(
.status_rq (sens_i2c_status_rq), // output .status_rq (sens_i2c_status_rq), // output
.status_start (sens_i2c_status_start), // input .status_start (sens_i2c_status_start), // input
.frame_sync (sof_out_mclk), // input .frame_sync (sof_out_mclk), // input
.frame_num_seq (frame_num_seq), // input[3:0]
.scl (sns_scl), // inout .scl (sns_scl), // inout
.sda (sns_sda) // inout .sda (sns_sda) // inout
); );
......
...@@ -32,7 +32,7 @@ ...@@ -32,7 +32,7 @@
* with at least one of the Free Software programs. * with at least one of the Free Software programs.
*******************************************************************************/ *******************************************************************************/
`timescale 1ns/1ps `timescale 1ns/1ps
`undef I2C_FRAME_INDEPENDENT
module sensor_i2c#( module sensor_i2c#(
parameter SENSI2C_ABS_ADDR = 'h410, parameter SENSI2C_ABS_ADDR = 'h410,
parameter SENSI2C_REL_ADDR = 'h420, parameter SENSI2C_REL_ADDR = 'h420,
...@@ -67,7 +67,8 @@ module sensor_i2c#( ...@@ -67,7 +67,8 @@ module sensor_i2c#(
parameter SENSI2C_TBL_NBRD_BITS = 3, parameter SENSI2C_TBL_NBRD_BITS = 3,
parameter SENSI2C_TBL_NABRD = 19, // number of address bytes for read (0 - 1 byte, 1 - 2 bytes) parameter SENSI2C_TBL_NABRD = 19, // number of address bytes for read (0 - 1 byte, 1 - 2 bytes)
parameter SENSI2C_TBL_DLY = 20, // bit delay (number of mclk periods in 1/4 of SCL period) parameter SENSI2C_TBL_DLY = 20, // bit delay (number of mclk periods in 1/4 of SCL period)
parameter SENSI2C_TBL_DLY_BITS= 8 parameter SENSI2C_TBL_DLY_BITS= 8,
parameter NUM_FRAME_BITS = 4
)( )(
input mrst, // @ posedge mclk input mrst, // @ posedge mclk
input mclk, // global clock, half DDR3 clock, synchronizes all I/O through the command port input mclk, // global clock, half DDR3 clock, synchronizes all I/O through the command port
...@@ -81,6 +82,7 @@ module sensor_i2c#( ...@@ -81,6 +82,7 @@ module sensor_i2c#(
output status_rq, // input request to send status downstream output status_rq, // input request to send status downstream
input status_start,// Acknowledge of the first status packet byte (address) input status_start,// Acknowledge of the first status packet byte (address)
input frame_sync, // @posedge mclk increment/reset frame number input frame_sync, // @posedge mclk increment/reset frame number
input [NUM_FRAME_BITS-1:0] frame_num_seq, // frame number from the command sequencer (to sync i2c)
input sda_in, // i2c SDA input input sda_in, // i2c SDA input
input scl_in, // i2c SCL input input scl_in, // i2c SCL input
output scl_out, // i2c SCL output output scl_out, // i2c SCL output
...@@ -178,10 +180,16 @@ module sensor_i2c#( ...@@ -178,10 +180,16 @@ module sensor_i2c#(
wire sda_en_hard; wire sda_en_hard;
wire scl_hard; wire scl_hard;
`ifdef I2C_FRAME_INDEPENDENT
localparam sync_to_seq = -;
`else
reg sync_to_seq;
`endif
assign set_ctrl_w = we_cmd && ((wa & ~SENSI2C_CTRL_MASK) == SENSI2C_CTRL );// ==0 assign set_ctrl_w = we_cmd && ((wa & ~SENSI2C_CTRL_MASK) == SENSI2C_CTRL );// ==0
assign set_status_w = we_cmd && ((wa & ~SENSI2C_CTRL_MASK) == SENSI2C_STATUS );// ==0 assign set_status_w = we_cmd && ((wa & ~SENSI2C_CTRL_MASK) == SENSI2C_STATUS );// ==0
assign pre_wpage0_inc = (!wen && !(|wen_r) && !wpage0_inc[0]) && (req_clr || reset_on) ; assign pre_wpage0_inc = (!wen && !(|wen_r) && !wpage0_inc[0]) && (req_clr || reset_on) ;
/// assign pre_wpage0_inc = (!wen && !(|wen_r) && !(|wpage0_inc)) && (req_clr || reset_on) ;
assign fifo_wr_pointers_outw = fifo_wr_pointers_ram[wpage_wr[3:0]]; // valid next after command assign fifo_wr_pointers_outw = fifo_wr_pointers_ram[wpage_wr[3:0]]; // valid next after command
assign fifo_wr_pointers_outr = fifo_wr_pointers_ram[page_r[3:0]]; assign fifo_wr_pointers_outr = fifo_wr_pointers_ram[page_r[3:0]];
...@@ -308,12 +316,18 @@ module sensor_i2c#( ...@@ -308,12 +316,18 @@ module sensor_i2c#(
// request to clear pointer(s)? for one page - during reset or delayed frame sync (if previous was not finished) // request to clear pointer(s)? for one page - during reset or delayed frame sync (if previous was not finished)
req_clr <= frame_sync || (req_clr && !wpage0_inc[0]); req_clr <= frame_sync || (req_clr && !wpage0_inc[0]);
`ifndef I2C_FRAME_INDEPENDENT
sync_to_seq <= frame_sync || (reset_on && ( wpage0[3:0] == 4'hf));
`endif
if (reset_cmd) wpage0 <= 0; if (reset_cmd) wpage0 <= 0;
// else if (frame_0) wpage0 <= 0; else if (wpage0_inc[0]) wpage0 <= wpage0 + 1;
else if (wpage0_inc[0]) wpage0<=wpage0+1; else if (sync_to_seq) wpage0 <= frame_num_seq;
if (reset_cmd) wpage_prev<=4'hf; if (reset_cmd) wpage_prev <= 4'hf;
else if (wpage0_inc[0]) wpage_prev<=wpage0; else if (wpage0_inc[0]) wpage_prev <= wpage0;
else if (sync_to_seq) wpage_prev <= frame_num_seq - 1 ;
if (we_abs) wpage_wr <= ((wa==wpage_prev)? wpage0[3:0] : wa); if (we_abs) wpage_wr <= ((wa==wpage_prev)? wpage0[3:0] : wa);
...@@ -333,10 +347,15 @@ module sensor_i2c#( ...@@ -333,10 +347,15 @@ module sensor_i2c#(
i2c_cmd_we <= !reset_cmd && wen_fifo; // [0]; i2c_cmd_we <= !reset_cmd && wen_fifo; // [0];
// signals related to reading from i2c FIFO // signals related to reading from i2c FIFO
if (reset_on) page_r<=0; `ifdef I2C_FRAME_INDEPENDENT
else if (page_r_inc[0]) page_r<=page_r+1; if (reset_on) page_r <= 0;
else if (page_r_inc[0]) page_r <= page_r+1;
`else
if (reset_on) page_r <= frame_num_seq;
else if (page_r_inc[0]) page_r <= page_r+1;
`endif
//############ rpointer should startt not from 0, but form valuie in another RAM???
if (reset_cmd || page_r_inc[0]) rpointer[5:0] <= 6'h0; if (reset_cmd || page_r_inc[0]) rpointer[5:0] <= 6'h0;
else if (i2c_run_d && ! i2c_run) rpointer[5:0] <= rpointer[5:0] + 1; else if (i2c_run_d && ! i2c_run) rpointer[5:0] <= rpointer[5:0] + 1;
......
...@@ -75,7 +75,8 @@ module sensor_i2c_io#( ...@@ -75,7 +75,8 @@ module sensor_i2c_io#(
`else `else
parameter SENSI2C_IOSTANDARD = "LVCMOS25", parameter SENSI2C_IOSTANDARD = "LVCMOS25",
`endif `endif
parameter SENSI2C_SLEW = "SLOW" parameter SENSI2C_SLEW = "SLOW",
parameter NUM_FRAME_BITS = 4
)( )(
input mrst, // @mclk input mrst, // @mclk
input mclk, // global clock, half DDR3 clock, synchronizes all I/O through the command port input mclk, // global clock, half DDR3 clock, synchronizes all I/O through the command port
...@@ -85,6 +86,7 @@ module sensor_i2c_io#( ...@@ -85,6 +86,7 @@ module sensor_i2c_io#(
output status_rq, // input request to send status downstream output status_rq, // input request to send status downstream
input status_start,// Acknowledge of the first status packet byte (address) input status_start,// Acknowledge of the first status packet byte (address)
input frame_sync, // increment/reset frame number input frame_sync, // increment/reset frame number
input [NUM_FRAME_BITS-1:0] frame_num_seq, // frame number from the command sequencer (to sync i2c)
inout scl, inout scl,
inout sda inout sda
); );
...@@ -126,7 +128,8 @@ module sensor_i2c_io#( ...@@ -126,7 +128,8 @@ module sensor_i2c_io#(
.SENSI2C_TBL_NBRD_BITS (SENSI2C_TBL_NBRD_BITS), .SENSI2C_TBL_NBRD_BITS (SENSI2C_TBL_NBRD_BITS),
.SENSI2C_TBL_NABRD (SENSI2C_TBL_NABRD), // number of address bytes for read (0 - 1 byte, 1 - 2 bytes) .SENSI2C_TBL_NABRD (SENSI2C_TBL_NABRD), // number of address bytes for read (0 - 1 byte, 1 - 2 bytes)
.SENSI2C_TBL_DLY (SENSI2C_TBL_DLY), // bit delay (number of mclk periods in 1/4 of SCL period) .SENSI2C_TBL_DLY (SENSI2C_TBL_DLY), // bit delay (number of mclk periods in 1/4 of SCL period)
.SENSI2C_TBL_DLY_BITS (SENSI2C_TBL_DLY_BITS) .SENSI2C_TBL_DLY_BITS (SENSI2C_TBL_DLY_BITS),
.NUM_FRAME_BITS (NUM_FRAME_BITS)
) sensor_i2c_i ( ) sensor_i2c_i (
.mrst (mrst), // input .mrst (mrst), // input
.mclk (mclk), // input .mclk (mclk), // input
...@@ -136,6 +139,7 @@ module sensor_i2c_io#( ...@@ -136,6 +139,7 @@ module sensor_i2c_io#(
.status_rq (status_rq), // output .status_rq (status_rq), // output
.status_start (status_start), // input .status_start (status_start), // input
.frame_sync (frame_sync), // input .frame_sync (frame_sync), // input
.frame_num_seq (frame_num_seq), // input[3:0]
.scl_in (scl_in), // input .scl_in (scl_in), // input
.sda_in (sda_in), // input .sda_in (sda_in), // input
.scl_out (scl_out), // output .scl_out (scl_out), // output
......
...@@ -437,6 +437,10 @@ module sensors393 #( ...@@ -437,6 +437,10 @@ module sensors393 #(
wire [3:0] hist_dvalid; wire [3:0] hist_dvalid;
wire [127:0] hist_data; wire [127:0] hist_data;
wire [4*NUM_FRAME_BITS-1:0] frame_num = {frame_num3, frame_num2, frame_num1, frame_num0};
always @ (posedge mclk) begin always @ (posedge mclk) begin
cmd_ad <= cmd_ad_in; cmd_ad <= cmd_ad_in;
cmd_stb <= cmd_stb_in; cmd_stb <= cmd_stb_in;
...@@ -579,6 +583,7 @@ module sensors393 #( ...@@ -579,6 +583,7 @@ module sensors393 #(
.SENSI2C_IBUF_LOW_PWR (SENSI2C_IBUF_LOW_PWR), .SENSI2C_IBUF_LOW_PWR (SENSI2C_IBUF_LOW_PWR),
.SENSI2C_IOSTANDARD (SENSI2C_IOSTANDARD), .SENSI2C_IOSTANDARD (SENSI2C_IOSTANDARD),
.SENSI2C_SLEW (SENSI2C_SLEW), .SENSI2C_SLEW (SENSI2C_SLEW),
.NUM_FRAME_BITS (NUM_FRAME_BITS),
`ifndef HISPI `ifndef HISPI
.SENSOR_DATA_WIDTH (SENSOR_DATA_WIDTH), .SENSOR_DATA_WIDTH (SENSOR_DATA_WIDTH),
.SENSOR_FIFO_2DEPTH (SENSOR_FIFO_2DEPTH), .SENSOR_FIFO_2DEPTH (SENSOR_FIFO_2DEPTH),
...@@ -669,7 +674,7 @@ module sensors393 #( ...@@ -669,7 +674,7 @@ module sensors393 #(
.status_start (status_start_chn[i]), // input .status_start (status_start_chn[i]), // input
.trigger_mode (trigger_mode), // input .trigger_mode (trigger_mode), // input
.trig_in (trig_in[i]), // input .trig_in (trig_in[i]), // input
.frame_num_seq(frame_num[NUM_FRAME_BITS*i +:NUM_FRAME_BITS]), // input[3:0]
.dout (px_data[16 * i +: 16]), // output[15:0] .dout (px_data[16 * i +: 16]), // output[15:0]
.dout_valid (px_valid[i]), // output .dout_valid (px_valid[i]), // output
.last_in_line (last_in_line[i]), // output .last_in_line (last_in_line[i]), // output
......
No preview for this file type
[*] [*]
[*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI [*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI
[*] Sat May 7 17:52:27 2016 [*] Sun May 8 03:34:28 2016
[*] [*]
[dumpfile] "/home/andrey/git/x393/simulation/x393_testbench03-20160506233430553.fst" [dumpfile] "/home/andrey/git/x393/simulation/x393_testbench03-20160507180624832.fst"
[dumpfile_mtime] "Sat May 7 06:20:13 2016" [dumpfile_mtime] "Sun May 8 00:54:54 2016"
[dumpfile_size] 165938716 [dumpfile_size] 169675454
[savefile] "/home/andrey/git/x393/x393_testbench04.sav" [savefile] "/home/andrey/git/x393/x393_testbench04.sav"
[timestart] 152226900 [timestart] 40584000
[size] 1823 1180 [size] 1823 1180
[pos] 1919 0 [pos] 1919 0
*-16.640839 152500000 255683333 256143333 274856667 275790000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 *-17.720415 40842388 255683333 256143333 274856667 275790000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] x393_testbench03. [treeopen] x393_testbench03.
[treeopen] x393_testbench03.read_compressor_frame_irq. [treeopen] x393_testbench03.read_compressor_frame_irq.
[treeopen] x393_testbench03.read_contol_register_irq. [treeopen] x393_testbench03.read_contol_register_irq.
...@@ -41,12 +41,15 @@ ...@@ -41,12 +41,15 @@
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i. [treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1]. [treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i. [treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sensor_i2c_io_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2]. [treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i. [treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.sensor_i2c_io_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[3]. [treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[3].
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i. [treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.
[treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.sens_parallel12_i. [treeopen] x393_testbench03.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.sensor_i2c_io_i.
[sst_width] 281 [sst_width] 412
[signals_width] 429 [signals_width] 429
[sst_expanded] 1 [sst_expanded] 1
[sst_vpaned_height] 578 [sst_vpaned_height] 578
...@@ -318,7 +321,7 @@ x393_testbench03.sim_soc_interrupts_i.inta[8:0] ...@@ -318,7 +321,7 @@ x393_testbench03.sim_soc_interrupts_i.inta[8:0]
- -
@1000200 @1000200
-sim_soc_interrupts -sim_soc_interrupts
@800200 @c00200
-interrupts -interrupts
@28 @28
x393_testbench03.MAIN_GO x393_testbench03.MAIN_GO
...@@ -396,7 +399,6 @@ x393_testbench03.IRQ_CMPRS_POINTER_0[25:0] ...@@ -396,7 +399,6 @@ x393_testbench03.IRQ_CMPRS_POINTER_0[25:0]
x393_testbench03.IRQ_CMPRS_POINTER_1[25:0] x393_testbench03.IRQ_CMPRS_POINTER_1[25:0]
x393_testbench03.IRQ_CMPRS_POINTER_2[25:0] x393_testbench03.IRQ_CMPRS_POINTER_2[25:0]
x393_testbench03.IRQ_CMPRS_POINTER_3[25:0] x393_testbench03.IRQ_CMPRS_POINTER_3[25:0]
@23
x393_testbench03.IRQ_CMPRS_DONE[3:0] x393_testbench03.IRQ_CMPRS_DONE[3:0]
@28 @28
x393_testbench03.sim_soc_interrupts_i.clk x393_testbench03.sim_soc_interrupts_i.clk
...@@ -913,7 +915,7 @@ x393_testbench03.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.cmd_we ...@@ -913,7 +915,7 @@ x393_testbench03.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.cmd_we
@22 @22
x393_testbench03.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.wpage_asap[3:0] x393_testbench03.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.wpage_asap[3:0]
x393_testbench03.x393_i.frame_num[15:0] x393_testbench03.x393_i.frame_num[15:0]
@1000200 @1401200
-interrupts -interrupts
@c00022 @c00022
x393_testbench03.x393_i.cmd_seq_mux_i.status_generate_cmd_seq_mux_i.status[25:0] x393_testbench03.x393_i.cmd_seq_mux_i.status_generate_cmd_seq_mux_i.status[25:0]
...@@ -1329,5 +1331,69 @@ x393_testbench03.simul_axi_hp_wr_i.num_full_data[7:0] ...@@ -1329,5 +1331,69 @@ x393_testbench03.simul_axi_hp_wr_i.num_full_data[7:0]
- -
@1401200 @1401200
-simul_axi_hp_wr0 -simul_axi_hp_wr0
@800200
-frame_numbers
@28
x393_testbench03.x393_i.mclk
@22
x393_testbench03.x393_i.sof_out_mclk[3:0]
x393_testbench03.x393_i.frame_num[15:0]
@800200
-i2c
@28
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.frame_sync
@22
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.frame_num[3:0]
@28
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.frame_sync
@22
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.frame_num[3:0]
@28
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.frame_sync
@22
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.frame_num[3:0]
@28
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.frame_sync
@22
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.frame_num[3:0]
@200
-sensor_0
@28
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.frame_sync
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.wen
@800029
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.wen_r[1:0]
@29
(0)x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.wen_r[1:0]
(1)x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.wen_r[1:0]
@1001201
-group_end
@28
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.pre_wpage0_inc
@22
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.frame_num_seq[3:0]
@28
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.req_clr
@800028
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.wpage0_inc[1:0]
@28
(0)x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.wpage0_inc[1:0]
(1)x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.wpage0_inc[1:0]
@22
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.wpage0[3:0]
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.wpage_prev[3:0]
@28
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.page_r_inc[1:0]
@22
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.page_r[3:0]
@28
x393_testbench03.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.reset_on
@1001200
-group_end
@200
-
@1000200
-i2c
-frame_numbers
[pattern_trace] 1 [pattern_trace] 1
[pattern_trace] 0 [pattern_trace] 0
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