debugging scanline read memory access (8f79e6f7) · Commits · Elphel / x393

includes/x393_parameters.vh

+3 −3

Original line number	Diff line number	Diff line
		@@ -183,11 +183,11 @@
		parameter MCNTRL_SCANLINE_CHN2_ADDR= 'h120,
		parameter MCNTRL_SCANLINE_CHN3_ADDR= 'h130,
		parameter MCNTRL_SCANLINE_MASK= 'h3f0, // both channels 0 and 1
		parameter MCNTRL_SCANLINE_MODE= 'h0, // set mode register: {extra_pages[1:0],write_mode,enable,!reset}
		parameter MCNTRL_SCANLINE_MODE= 'h0, // set mode register: {extra_pages[1:0],enable,!reset}
		parameter MCNTRL_SCANLINE_STATUS_CNTRL= 'h1, // control status reporting
		parameter MCNTRL_SCANLINE_STARTADDR= 'h2, // 22-bit frame start address (3 CA LSBs==0. BA==0)
		parameter MCNTRL_SCANLINE_FRAME_FULL_WIDTH= 'h3, // Padded line length (8-row increment), in 8-bursts (16 bytes)
		parameter MCNTRL_SCANLINE_WINDOW_WH= 'h4, // low word - 13-bit window width (0->'n4000), high word - 16-bit frame height (0->'h10000)
		parameter MCNTRL_SCANLINE_WINDOW_WH= 'h4, // low word - 13-bit window width (0->'h4000), high word - 16-bit frame height (0->'h10000)
		parameter MCNTRL_SCANLINE_WINDOW_X0Y0= 'h5, // low word - 13-bit window left, high word - 16-bit window top
		parameter MCNTRL_SCANLINE_WINDOW_STARTXY= 'h6, // low word - 13-bit start X (relative to window), high word - 16-bit start y
		// Start XY can be used when read command to start from the middle
		@@ -208,7 +208,7 @@
		parameter MCNTRL_TILED_STATUS_CNTRL= 'h1, // control status reporting
		parameter MCNTRL_TILED_STARTADDR= 'h2, // 22-bit frame start address (3 CA LSBs==0. BA==0)
		parameter MCNTRL_TILED_FRAME_FULL_WIDTH='h3, // Padded line length (8-row increment), in 8-bursts (16 bytes)
		parameter MCNTRL_TILED_WINDOW_WH= 'h4, // low word - 13-bit window width (0->'n4000), high word - 16-bit frame height (0->'h10000)
		parameter MCNTRL_TILED_WINDOW_WH= 'h4, // low word - 13-bit window width (0->'h4000), high word - 16-bit frame height (0->'h10000)
		parameter MCNTRL_TILED_WINDOW_X0Y0= 'h5, // low word - 13-bit window left, high word - 16-bit window top
		parameter MCNTRL_TILED_WINDOW_STARTXY= 'h6, // low word - 13-bit start X (relative to window), high word - 16-bit start y
		// Start XY can be used when read command to start from the middle

memctrl/cmd_encod_linear_wr.v

+47 −26

Original line number	Diff line number	Diff line
		@@ -25,6 +25,7 @@ module cmd_encod_linear_wr #(
		// parameter BASEADDR = 0,
		parameter ADDRESS_NUMBER= 15,
		parameter COLADDR_NUMBER= 10,
		parameter NUM_XFER_BITS= 6, // number of bits to specify transfer length
		parameter CMD_PAUSE_BITS= 10,
		parameter CMD_DONE_BIT= 10 // VDT BUG: CMD_DONE_BIT is used in a function call parameter!
		) (
		@@ -36,13 +37,13 @@ module cmd_encod_linear_wr #(
		input [2:0] bank_in, // bank address
		input [ADDRESS_NUMBER-1:0] row_in, // memory row
		input [COLADDR_NUMBER-4:0] start_col, // start memory column (3 LSBs should be 0?)
		input [5:0] num128_in, // number of 128-bit words to transfer (8*16 bits) - full burst of 8
		input [NUM_XFER_BITS-1:0] num128_in, // number of 128-bit words to transfer (8*16 bits) - full burst of 8 (0 - full 64)
		input start, // start generating commands
		output reg [31:0] enc_cmd, // encoded commnad
		output reg enc_wr, // write encoded command
		output reg enc_done // encoding finished
		);
		localparam ROM_WIDTH=12;
		localparam ROM_WIDTH=13;
		localparam ROM_DEPTH=4;

		localparam ENC_NOP= 0;
		@@ -55,6 +56,7 @@ module cmd_encod_linear_wr #(
		localparam ENC_PAUSE_SHIFT= 8; // [9:8] - 2- bit pause (for NOP commandes)
		localparam ENC_PRE_DONE= 10;
		localparam ENC_BUF_PGNEXT= 11;
		localparam ENC_DUAL_CYC= 12; // 2-cycle command (with nop or skip) to count number of buffer reads (longer pauses are not used with buffer reads)

		localparam ENC_CMD_NOP= 0; // 2-bit locally encoded commands
		localparam ENC_CMD_WRITE= 1;
		@@ -70,7 +72,7 @@ module cmd_encod_linear_wr #(
		reg [ADDRESS_NUMBER-1:0] row; // memory row
		reg [COLADDR_NUMBER-4:0] col; // start memory column (3 LSBs should be 0?) // VDT BUG: col is used as a function call parameter!
		reg [2:0] bank; // memory bank;
		reg [5:0] num128; // number of 128-bit words to transfer
		reg [NUM_XFER_BITS:0] num128; // number of 128-bit words to transfer

		reg gen_run;
		reg gen_run_d;
		@@ -82,13 +84,30 @@ module cmd_encod_linear_wr #(
		wire [1:0] rom_skip;
		wire [2:0] full_cmd;
		reg done;
		// reg buf_rd_23; // read buffer at steps 2&3 (0 if only 1 read is required)
		reg start_d;
		// reg [ROM_DEPTH-1:0] gen_addr_jump; // next conditonal address
		reg [NUM_XFER_BITS:0] num_bufrd_left; //counts number of buffer reads left
		wire [NUM_XFER_BITS:0] num_bufrd_left_next_w; //next clock value of the counter
		wire next_zero_w=(num_bufrd_left_next_w==0);
		reg cut_buf_rd;

		assign pre_done=rom_r[ENC_PRE_DONE] && gen_run;
		assign rom_cmd= rom_r[ENC_CMD_SHIFT+:2];
		assign rom_skip= rom_r[ENC_PAUSE_SHIFT+:2];
		assign full_cmd= rom_cmd[1]?(rom_cmd[0]?CMD_ACTIVATE:CMD_PRECHARGE):(rom_cmd[0]?CMD_WRITE:CMD_NOP);
		assign num_bufrd_left_next_w= num_bufrd_left - (rom_r[ENC_DUAL_CYC]?2:1);
		// prepare jump address? and bufrd during 2,3

		// make num128 7-bits to accommodate 64!
		always @ (posedge clk) begin
		start_d <= start;
		if (start_d) num_bufrd_left <= {num128[NUM_XFER_BITS-1:0],1'b0};
		else if (rom_r[ENC_BUF_RD]) num_bufrd_left <= num_bufrd_left_next_w;
		cut_buf_rd <= rom_r[ENC_BUF_RD] && (cut_buf_rd \|\| next_zero_w);
		end
		always @ (posedge rst or posedge clk) begin

		if (rst) gen_run <= 0;
		else if (start) gen_run<= 1;
		else if (pre_done) gen_run<= 0;
		@@ -98,14 +117,14 @@ module cmd_encod_linear_wr #(

		if (rst) gen_addr <= 0;
		else if (!start && !gen_run) gen_addr <= 0;
		else if ((gen_addr==(REPEAT_ADDR-1)) && (num128[5:1]==0)) gen_addr <= REPEAT_ADDR+1; // skip loop alltogeter
		else if ((gen_addr !=REPEAT_ADDR) \|\| (num128[5:1]==0)) gen_addr <= gen_addr+1; // not in a loop
		else if ((gen_addr==(REPEAT_ADDR-1)) && (num128[NUM_XFER_BITS:1]==0)) gen_addr <= REPEAT_ADDR+1; // skip loop alltogeter
		else if ((gen_addr !=REPEAT_ADDR) \|\| (num128[NUM_XFER_BITS:1]==0)) gen_addr <= gen_addr+1; // not in a loop

		//counting loops
		if (rst) num128 <= 0;
		else if (start) num128 <= num128_in;
		else if (start) num128 <= {(num128_in==0)?1'b1:1'b0,num128_in};
		else if (!gen_run) num128 <= 0; //
		else if ((gen_addr == (REPEAT_ADDR-1)) \|\| (gen_addr == REPEAT_ADDR)) num128 <= num128 -1;
		else if ((gen_addr == (REPEAT_ADDR-1)) \|\| (gen_addr == REPEAT_ADDR)) num128 <= num128 -1; // ????? - FIXME
		end

		always @ (posedge clk) if (start) begin
		@@ -119,11 +138,12 @@ module cmd_encod_linear_wr #(
		always @ (posedge rst or posedge clk) begin
		if (rst) rom_r <= 0;
		else case (gen_addr)
		4'h0: rom_r <= (ENC_CMD_ACTIVATE << ENC_CMD_SHIFT) \| (1 << ENC_NOP);
		4'h1: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) \| (1 << ENC_BUF_RD);
		4'h2: rom_r <= (ENC_CMD_WRITE << ENC_CMD_SHIFT) \| (1 << ENC_BUF_RD) \|(1 << ENC_SEL) \| (1 << ENC_ODT);
		4'h3: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) \| (1 << ENC_BUF_RD) \|(1 << ENC_DQ_DQS_EN) \| (1 << ENC_ODT);
		4'h4: rom_r <= (ENC_CMD_WRITE << ENC_CMD_SHIFT) \| (1 << ENC_NOP) \| (1 << ENC_BUF_RD) \| (1 << ENC_DQS_TOGGLE) \| (1 << ENC_DQ_DQS_EN) \| (1 << ENC_ODT); // will repeet
		4'h0: rom_r <= (ENC_CMD_ACTIVATE << ENC_CMD_SHIFT);// \| (1 << ENC_NOP);
		4'h1: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) \| (1 << ENC_BUF_RD) \| (1 << ENC_PAUSE_SHIFT) \| (1 << ENC_DUAL_CYC); // dual cycle
		4'h2: rom_r <= (ENC_CMD_WRITE << ENC_CMD_SHIFT) \| (1 << ENC_BUF_RD) \| (1 << ENC_SEL) \| (1 << ENC_ODT); // single cycle
		4'h3: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) \| (1 << ENC_BUF_RD) \| (1 << ENC_DQ_DQS_EN) \| (1 << ENC_ODT); // single cycle
		// next may loop
		4'h4: rom_r <= (ENC_CMD_WRITE << ENC_CMD_SHIFT) \| (1 << ENC_NOP) \| (1 << ENC_BUF_RD) \| (1 << ENC_DQS_TOGGLE) \| (1 << ENC_DQ_DQS_EN) \| (1 << ENC_SEL) \| (1 << ENC_ODT) \| (1 << ENC_DUAL_CYC); // dual cycle
		4'h5: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) \| (2 << ENC_PAUSE_SHIFT) \| (1 << ENC_DQS_TOGGLE) \| (1 << ENC_DQ_DQS_EN) \| (1 << ENC_ODT);
		4'h6: rom_r <= (ENC_CMD_NOP << ENC_CMD_SHIFT) \| (2 << ENC_PAUSE_SHIFT);
		4'h7: rom_r <= (ENC_CMD_PRECHARGE << ENC_CMD_SHIFT) \| (1 << ENC_BUF_PGNEXT);
		@@ -140,7 +160,8 @@ module cmd_encod_linear_wr #(
		else enc_wr <= gen_run \|\| gen_run_d;

		if (rst) enc_done <= 0;
		else enc_done <= enc_wr \|\| !gen_run_d;
		// else enc_done <= enc_wr \|\| !gen_run_d;
		else enc_done <= enc_wr && !gen_run_d;

		if (rst) enc_cmd <= 0;
		else if (rom_cmd==0) enc_cmd <= func_encode_skip ( // encode pause
		@@ -155,7 +176,7 @@ module cmd_encod_linear_wr #(
		rom_r[ENC_DQS_TOGGLE], // dqs_toggle; // enable toggle DQS according to the pattern
		1'b0, // dci; // DCI disable, both DQ and DQS lines (internal logic and timing sequencer for 0->1 and 1->0)
		1'b0, // buf_wr; // connect to external buffer (but only if not paused)
		rom_r[ENC_BUF_RD], // buf_rd; // connect to external buffer (but only if not paused)
		rom_r[ENC_BUF_RD] && !cut_buf_rd, //buf_rd;// connect to external buffer (but only if not paused)
		rom_r[ENC_BUF_PGNEXT]); // buf_rst; // connect to external buffer (but only if not paused)
		else enc_cmd <= func_encode_cmd ( // encode non-NOP command
		rom_cmd[1]?
		@@ -171,7 +192,7 @@ module cmd_encod_linear_wr #(
		rom_r[ENC_DQS_TOGGLE], // dqs_toggle; // enable toggle DQS according to the pattern
		1'b0, // dci; // DCI disable, both DQ and DQS lines (internal logic and timing sequencer for 0->1 and 1->0)
		1'b0, // buf_wr; // connect to external buffer (but only if not paused)
		rom_r[ENC_BUF_RD], // buf_rd; // connect to external buffer (but only if not paused)
		rom_r[ENC_BUF_RD] && !cut_buf_rd, //buf_rd;// connect to external buffer (but only if not paused)
		rom_r[ENC_NOP], // nop; // add NOP after the current command, keep other data
		rom_r[ENC_BUF_PGNEXT]); // buf_rst; // connect to external buffer (but only if not paused)
		end

memctrl/mcntrl393.v

+3 −3

Original line number	Diff line number	Diff line
		@@ -166,11 +166,11 @@ module mcntrl393 #(
		parameter MCNTRL_SCANLINE_CHN2_ADDR= 'h120,
		parameter MCNTRL_SCANLINE_CHN3_ADDR= 'h130,
		parameter MCNTRL_SCANLINE_MASK= 'h3f0, // both channels 0 and 1
		parameter MCNTRL_SCANLINE_MODE= 'h0, // set mode register: {extra_pages[1:0],write_mode,enable,!reset}
		parameter MCNTRL_SCANLINE_MODE= 'h0, // set mode register: {extra_pages[1:0],enable,!reset}
		parameter MCNTRL_SCANLINE_STATUS_CNTRL= 'h1, // control status reporting
		parameter MCNTRL_SCANLINE_STARTADDR= 'h2, // 22-bit frame start address (3 CA LSBs==0. BA==0)
		parameter MCNTRL_SCANLINE_FRAME_FULL_WIDTH= 'h3, // Padded line length (8-row increment), in 8-bursts (16 bytes)
		parameter MCNTRL_SCANLINE_WINDOW_WH= 'h4, // low word - 13-bit window width (0->'n4000), high word - 16-bit frame height (0->'h10000)
		parameter MCNTRL_SCANLINE_WINDOW_WH= 'h4, // low word - 13-bit window width (0->'h4000), high word - 16-bit frame height (0->'h10000)
		parameter MCNTRL_SCANLINE_WINDOW_X0Y0= 'h5, // low word - 13-bit window left, high word - 16-bit window top
		parameter MCNTRL_SCANLINE_WINDOW_STARTXY= 'h6, // low word - 13-bit start X (relative to window), high word - 16-bit start y
		// Start XY can be used when read command to start from the middle
		@@ -193,7 +193,7 @@ module mcntrl393 #(
		parameter MCNTRL_TILED_STATUS_CNTRL= 'h1, // control status reporting
		parameter MCNTRL_TILED_STARTADDR= 'h2, // 22-bit frame start address (3 CA LSBs==0. BA==0)
		parameter MCNTRL_TILED_FRAME_FULL_WIDTH='h3, // Padded line length (8-row increment), in 8-bursts (16 bytes)
		parameter MCNTRL_TILED_WINDOW_WH= 'h4, // low word - 13-bit window width (0->'n4000), high word - 16-bit frame height (0->'h10000)
		parameter MCNTRL_TILED_WINDOW_WH= 'h4, // low word - 13-bit window width (0->'h4000), high word - 16-bit frame height (0->'h10000)
		parameter MCNTRL_TILED_WINDOW_X0Y0= 'h5, // low word - 13-bit window left, high word - 16-bit window top
		parameter MCNTRL_TILED_WINDOW_STARTXY= 'h6, // low word - 13-bit start X (relative to window), high word - 16-bit start y
		// Start XY can be used when read command to start from the middle

memctrl/mcntrl_linear_rw.v

+8 −4

Original line number	Diff line number	Diff line
		@@ -29,11 +29,11 @@ module mcntrl_linear_rw #(
		parameter FRAME_HEIGHT_BITS= 16, // Maximal frame height
		parameter MCNTRL_SCANLINE_ADDR= 'h120,
		parameter MCNTRL_SCANLINE_MASK= 'h3f0, // both channels 0 and 1
		parameter MCNTRL_SCANLINE_MODE= 'h0, // set mode register: {extra_pages[1:0],write_mode,enable,!reset}
		parameter MCNTRL_SCANLINE_MODE= 'h0, // set mode register: {extra_pages[1:0],enable,!reset}
		parameter MCNTRL_SCANLINE_STATUS_CNTRL= 'h1, // control status reporting
		parameter MCNTRL_SCANLINE_STARTADDR= 'h2, // 22-bit frame start address (3 CA LSBs==0. BA==0)
		parameter MCNTRL_SCANLINE_FRAME_FULL_WIDTH='h3, // Padded line length (8-row increment), in 8-bursts (16 bytes)
		parameter MCNTRL_SCANLINE_WINDOW_WH= 'h4, // low word - 13-bit window width (0->'n4000), high word - 16-bit frame height (0->'h10000)
		parameter MCNTRL_SCANLINE_WINDOW_WH= 'h4, // low word - 13-bit window width (0->'h4000), high word - 16-bit frame height (0->'h10000)
		parameter MCNTRL_SCANLINE_WINDOW_X0Y0= 'h5, // low word - 13-bit window left, high word - 16-bit window top
		parameter MCNTRL_SCANLINE_WINDOW_STARTXY= 'h6, // low word - 13-bit start X (relative to window), high word - 16-bit start y
		// Start XY can be used when read command to start from the middle
		@@ -97,6 +97,7 @@ module mcntrl_linear_rw #(
		reg [COLADDR_NUMBER-3:0] mem_page_left; // number of 8-bursts left in the pointed memory page
		reg [NUM_XFER_BITS:0] lim_by_xfer; // number of bursts left limited by the longest transfer (currently 64)
		reg [NUM_XFER_BITS:0] xfer_num128_r; // number of 128-bit words to transfer (8*16 bits) - full bursts of 8
		// reg [NUM_XFER_BITS-1:0] xfer_num128_m1_r; // number of 128-bit words to transfer minus 1 (8*16 bits) - full bursts of 8
		wire pgm_param_w; // program one of the parameters, invalidate calculated results for PAR_MOD_LATENCY
		reg [2:0] xfer_start_r;
		reg [PAR_MOD_LATENCY-1:0] par_mod_r;
		@@ -137,7 +138,7 @@ module mcntrl_linear_rw #(


		// reg [4:0] mode_reg;//mode register: {extra_pages[1:0],write_mode,enable,!reset}
		reg [3:0] mode_reg;//mode register: {extra_pages[1:0],write_mode,enable,!reset}
		reg [3:0] mode_reg;//mode register: {extra_pages[1:0],enable,!reset}
		reg [NUM_RC_BURST_BITS-1:0] start_addr; // (programmed) Frame start (in {row,col8} in burst8, bank ==0
		// reg [FRAME_WIDTH_BITS:0] frame_width; // (programmed) 0- max

		@@ -196,6 +197,7 @@ module mcntrl_linear_rw #(
		end
		end
		assign mul_rslt_w= frame_y8_r * frame_full_width_r; // 5 MSBs will be discarded
		// assign xfer_num128= xfer_num128_m1_r[NUM_XFER_BITS-1:0];
		assign xfer_num128= xfer_num128_r[NUM_XFER_BITS-1:0];
		assign xfer_start= xfer_start_r[0];
		assign calc_valid= par_mod_r[PAR_MOD_LATENCY-1]; // MSB, longest 0
		@@ -221,6 +223,7 @@ module mcntrl_linear_rw #(
		integer i;
		// localparam EXTRA_BITS={ADDRESS_NUMBER-3-COLADDR_NUMBER-3{1'b0}};
		// localparam EXTRA_BITS={COLADDR_NUMBER-3-NUM_XFER_BITS{1'b0}};

		always @(posedge mclk) begin // TODO: Match latencies (is it needed?) Reduce consumption by CE?
		frame_x <= curr_x + window_x0;
		frame_y <= curr_y + window_y0;
		@@ -228,7 +231,8 @@ module mcntrl_linear_rw #(
		row_left <= window_width - curr_x; // 14 bits - 13 bits
		mem_page_left <= (1 << (COLADDR_NUMBER-3)) - frame_x[COLADDR_NUMBER-4:0];
		lim_by_xfer <= (\|row_left[FRAME_WIDTH_BITS:NUM_XFER_BITS])?(1<<NUM_XFER_BITS):row_left[NUM_XFER_BITS:0]; // 7 bits, max 'h40
		xfer_num128_r<= (mem_page_left> {{COLADDR_NUMBER-3-NUM_XFER_BITS{1'b0}},lim_by_xfer})? mem_page_left[NUM_XFER_BITS:0]:lim_by_xfer[NUM_XFER_BITS:0];
		xfer_num128_r<= (mem_page_left < {{COLADDR_NUMBER-3-NUM_XFER_BITS{1'b0}},lim_by_xfer})? mem_page_left[NUM_XFER_BITS:0]:lim_by_xfer[NUM_XFER_BITS:0];
		// xfer_num128_m1_r <= xfer_num128_r[NUM_XFER_BITS-1:0]-1;
		// xfer_num128_r<= (mem_page_left> {EXTRA_BITS, lim_by_xfer})? mem_page_left[NUM_XFER_BITS:0]:lim_by_xfer[NUM_XFER_BITS:0];
		// VDT bug? next line gives a warning
		// xfer_num128_r<= (mem_page_left> {{COLADDR_NUMBER-3-COLADDR_NUMBER-3{1'b0}},lim_by_xfer})?mem_page_left[NUM_XFER_BITS-1:0]:lim_by_xfer[NUM_XFER_BITS-1:0];

memctrl/mcntrl_tiled_rw.v

+1 −1

Original line number	Diff line number	Diff line
		@@ -34,7 +34,7 @@ module mcntrl_tiled_rw#(
		parameter MCNTRL_TILED_STATUS_CNTRL= 'h1, // control status reporting
		parameter MCNTRL_TILED_STARTADDR= 'h2, // 22-bit frame start address (3 CA LSBs==0. BA==0)
		parameter MCNTRL_TILED_FRAME_FULL_WIDTH='h3, // Padded line length (8-row increment), in 8-bursts (16 bytes)
		parameter MCNTRL_TILED_WINDOW_WH= 'h4, // low word - 13-bit window width (0->'n4000), high word - 16-bit frame height (0->'h10000)
		parameter MCNTRL_TILED_WINDOW_WH= 'h4, // low word - 13-bit window width (0->'h4000), high word - 16-bit frame height (0->'h10000)
		parameter MCNTRL_TILED_WINDOW_X0Y0= 'h5, // low word - 13-bit window left, high word - 16-bit window top
		parameter MCNTRL_TILED_WINDOW_STARTXY= 'h6, // low word - 13-bit start X (relative to window), high word - 16-bit start y
		// Start XY can be used when read command to start from the middle

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