added interrupts simulation, fixing circbuf pointers rollover bug (880f7615) · Commits · Elphel / x393

.project

+11 −11

Original line number	Diff line number	Diff line
		@@ -62,52 +62,52 @@
		<link>
		<name>vivado_logs/VivadoBitstream.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20160504204346976.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20160507151954677.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoOpt.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoOpt-20160504204346976.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoOpt-20160507151954677.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoOptPhys.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoOptPhys-20160504204346976.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoOptPhys-20160507151954677.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoOptPower.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoOptPower-20160504204346976.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoOptPower-20160507151954677.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoPlace.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoPlace-20160504204346976.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoPlace-20160507151954677.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoRoute.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoRoute-20160504204346976.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoRoute-20160507151954677.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoSynthesis.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoSynthesis-20160504203656004.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoSynthesis-20160507151111576.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoTimimgSummaryReportImplemented.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-20160504204346976.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-20160507151954677.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoTimimgSummaryReportSynthesis.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportSynthesis-20160504203656004.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportSynthesis-20160507151111576.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoTimingReportSynthesis.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportSynthesis-20160504203656004.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportSynthesis-20160507151111576.log</location>
		</link>
		<link>
		<name>vivado_state/x393-opt-phys.dcp</name>
		@@ -127,7 +127,7 @@
		<link>
		<name>vivado_state/x393-synth.dcp</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_state/x393-synth-20160504203656004.dcp</location>
		<location>/home/andrey/git/x393/vivado_state/x393-synth-20160507151111576.dcp</location>
		</link>
		</linkedResources>
		</projectDescription>

.settings/com.elphel.vdt.iverilog.prefs

+2 −1

Original line number	Diff line number	Diff line
		com.elphel.store.context.iverilog=iverilog_81_TopModulesOther<-@\#\#@->iverilog_83_ExtraFiles<-@\#\#@->iverilog_88_ShowNoProblem<-@\#\#@->iverilog_77_Param_Exe<-@\#\#@->iverilog_78_VVP_Exe<-@\#\#@->iverilog_99_GrepFindErrWarn<-@\#\#@->iverilog_84_IncludeDir<-@\#\#@->iverilog_89_ShowNoProblem<-@\#\#@->iverilog_79_GtkWave_Exe<-@\#\#@->iverilog_98_GTKWaveSavFile<-@\#\#@->iverilog_100_TopModulesOther<-@\#\#@->iverilog_102_ExtraFiles<-@\#\#@->iverilog_103_IncludeDir<-@\#\#@->iverilog_101_TopModulesOther<-@\#\#@->iverilog_103_ExtraFiles<-@\#\#@->iverilog_104_IncludeDir<-@\#\#@->iverilog_113_SaveLogsSimulator<-@\#\#@->iverilog_109_ShowNoProblem<-@\#\#@->iverilog_110_ShowWarnings<-@\#\#@->iverilog_102_TopModulesOther<-@\#\#@->iverilog_104_ExtraFiles<-@\#\#@->iverilog_105_IncludeDir<-@\#\#@->iverilog_110_ShowNoProblem<-@\#\#@->iverilog_113_SaveLogsPreprocessor<-@\#\#@->iverilog_121_GrepFindErrWarn<-@\#\#@->iverilog_114_SaveLogsSimulator<-@\#\#@->iverilog_103_TopModulesOther<-@\#\#@->iverilog_105_ExtraFiles<-@\#\#@->iverilog_106_IncludeDir<-@\#\#@->iverilog_111_ShowNoProblem<-@\#\#@->iverilog_115_SaveLogsSimulator<-@\#\#@->
		com.elphel.store.context.iverilog=iverilog_81_TopModulesOther<-@\#\#@->iverilog_83_ExtraFiles<-@\#\#@->iverilog_88_ShowNoProblem<-@\#\#@->iverilog_77_Param_Exe<-@\#\#@->iverilog_78_VVP_Exe<-@\#\#@->iverilog_99_GrepFindErrWarn<-@\#\#@->iverilog_84_IncludeDir<-@\#\#@->iverilog_89_ShowNoProblem<-@\#\#@->iverilog_79_GtkWave_Exe<-@\#\#@->iverilog_98_GTKWaveSavFile<-@\#\#@->iverilog_100_TopModulesOther<-@\#\#@->iverilog_102_ExtraFiles<-@\#\#@->iverilog_103_IncludeDir<-@\#\#@->iverilog_101_TopModulesOther<-@\#\#@->iverilog_103_ExtraFiles<-@\#\#@->iverilog_104_IncludeDir<-@\#\#@->iverilog_113_SaveLogsSimulator<-@\#\#@->iverilog_109_ShowNoProblem<-@\#\#@->iverilog_110_ShowWarnings<-@\#\#@->iverilog_102_TopModulesOther<-@\#\#@->iverilog_104_ExtraFiles<-@\#\#@->iverilog_105_IncludeDir<-@\#\#@->iverilog_110_ShowNoProblem<-@\#\#@->iverilog_113_SaveLogsPreprocessor<-@\#\#@->iverilog_121_GrepFindErrWarn<-@\#\#@->iverilog_114_SaveLogsSimulator<-@\#\#@->iverilog_103_TopModulesOther<-@\#\#@->iverilog_105_ExtraFiles<-@\#\#@->iverilog_106_IncludeDir<-@\#\#@->iverilog_111_ShowNoProblem<-@\#\#@->iverilog_115_SaveLogsSimulator<-@\#\#@->iverilog_120_GTKWaveSavFile<-@\#\#@->
		eclipse.preferences.version=1
		iverilog_100_TopModulesOther=glbl<-@\#\#@->
		iverilog_101_TopModulesOther=glbl<-@\#\#@->
		@@ -20,6 +20,7 @@ iverilog_113_SaveLogsPreprocessor=false
		iverilog_113_SaveLogsSimulator=true
		iverilog_114_SaveLogsSimulator=true
		iverilog_115_SaveLogsSimulator=true
		iverilog_120_GTKWaveSavFile=x393_testbench04.sav
		iverilog_121_GrepFindErrWarn=error\|warning\|sorry
		iverilog_77_Param_Exe=/usr/local/bin/iverilog
		iverilog_78_VVP_Exe=/usr/local/bin/vvp

axi/cmprs_afi_mux.v

+10 −13

Original line number	Diff line number	Diff line
		@@ -265,6 +265,9 @@ each group of 4 bits per channel : bits [1:0] - select, bit[2] - sset (0 - nop),
		// wants to write (want_wleft32+1) 32-byte chunks (4,3,2,1)
		wire [1:0] want_wleft32 = (\|items_left[7:2])? 2'b11 : items_left[1:0]; // want to set wleft[3:2] if not roll-over (actually "3" means 2)

		wire rollover_limited_w = max_wlen[1:0] < want_wleft32;


		assign cmd_we_status_w = cmd_we && ((cmd_a & 'hc) == CMPRS_AFIMUX_STATUS_CNTRL);
		assign cmd_we_mode_w = cmd_we && (cmd_a == CMPRS_AFIMUX_MODE);

		@@ -438,8 +441,6 @@ each group of 4 bits per channel : bits [1:0] - select, bit[2] - sset (0 - nop),
		//ready_to_start need_to_bother
		//done_burst
		if (!en) busy <= 0;
		// else if (pre_busy_w) busy <= {busy[2:0],1'b1};
		// else if (done_burst_w) busy <= 0; // {busy[2:0],1'b0};
		else busy <= {busy[2:0], pre_busy_w \| (busy[0] & ~done_burst_w)};

		if (!en) first_busy <= 0;
		@@ -451,16 +452,11 @@ each group of 4 bits per channel : bits [1:0] - select, bit[2] - sset (0 - nop),
		//pend_last

		if (!en) wleft <= 0;
		/// else if (pre_busy_w) wleft <= {(\|items_left[7:2])? 2'b11 : items_left[1:0], 2'b11}; // @@@******* different for roll over
		/// else if (pre_busy_w) wleft <= {(max_wlen[2] \|\| (max_wlen[1:0] > want_wleft32))? want_wleft32 : max_wlen[1:0], 2'b11};
		else if (pre_busy_w) wleft <= {(max_wlen[1:0] > want_wleft32) ? want_wleft32 : max_wlen[1:0], 2'b11};
		else if (wleft != 0) wleft <= wleft - 1;
		/*
		counts_corr2[8]
		items_left
		else if (pre_busy_w) wleft <= {(\|counts_corr2[7:2])? 2'b11 : left_to_eof[winner2 * 8 +: 2], 2'b11};
		// else if (pre_busy_w) wleft <= {(max_wlen[1:0] > want_wleft32) ? want_wleft32 : max_wlen[1:0], 2'b11};
		// wire rollover_limited_w = max_wlen[1:0] < want_wleft32;
		else if (pre_busy_w) wleft <= {rollover_limited_w ? max_wlen[1:0]: want_wleft32, 2'b11}; // same for ==

		else if (wleft != 0) wleft <= wleft - 1;
		*/

		if (!en) wvalid <= 0;
		else if (pre_busy_w) wvalid <= 1;
		@@ -484,8 +480,9 @@ items_left

		if (pre_busy_w) begin
		cur_chn <= winner2;
		// last_burst_in_frame <= last_chunk_w[winner2] && pend_last[winner2];
		last_burst_in_frame <= counts_corr2[8] && (left_to_eof[winner2 * 8 + 2 +: 6] == 0) && pend_last[winner2];
		// wire rollover_limited_w = max_wlen[1:0] < want_wleft32;
		// last_burst_in_frame <= counts_corr2[8] && (left_to_eof[winner2 * 8 + 2 +: 6] == 0) && pend_last[winner2];
		last_burst_in_frame <= counts_corr2[8] && (left_to_eof[winner2 * 8 + 2 +: 6] == 0) && pend_last[winner2] &&!rollover_limited_w;
		end

		wlast <= done_burst_w; // when wleft==4'h1

axi/cmprs_afi_mux_ptr.v

+2 −1

Original line number	Diff line number	Diff line
		@@ -45,10 +45,11 @@ module cmprs_afi_mux_ptr(
		input [ 3:0] reset_pointers, // per-channel - reset pointers
		input pre_busy_w, // combinatorial signal - one before busy[0] (depends on ptr_resetting)
		input [ 1:0] winner_channel, // channel that won arbitration for AXI access, valid @ pre_busy_w
		input need_to_bother, // whants to start access if address and data FIFO permit
		input need_to_bother, // wants to start access if address and data FIFO permit
		input [1:0] chunk_inc_want_m1, // how much to increment chunk pointer (0..3) +1 - valid with busy[0] (w/o rollover)

		input last_burst_in_frame, // valid with busy[0] (last_burst_in_frame<=last_chunk_w[winner2])
		// last_burst_in_frame is invalid when rollover splits burst in 2
		input [ 3:0] busy, // one cycle less than sending 1-4 bursts, [1] - delayed by 1, [2] - by 2
		output ptr_resetting, // pointers will be reset next cycle (2-cycle-long pulse)
		output reg [26:0] chunk_addr, // chunk absolute address, valid with busy[1]

compressor_jp/cmprs_status.v

+2 −2

Original line number	Diff line number	Diff line
		@@ -42,7 +42,7 @@ module cmprs_status #(
		input stuffer_running,
		input reading_frame,
		input [NUM_FRAME_BITS - 1:0] frame_num_compressed,
		input set_interrupts,
		input set_interrupts, // data = 2: disable, 3 - enable, 1 - reset irq
		input [1:0] data_in,
		output [NUM_FRAME_BITS+7:0] status,
		output irq
		@@ -54,7 +54,7 @@ module cmprs_status #(
		reg im_r; // interrupt mask
		reg [NUM_FRAME_BITS - 1:0] frame_irq;

		assign status = {frame_irq,
		assign status = {frame_irq[NUM_FRAME_BITS - 1:0],
		3'b0,
		flushing_fifo,
		stuffer_running_r,

Admin message