localparamNUM_RC_BURST_BITS=ADDRESS_NUMBER+COLADDR_NUMBER-3;//to spcify row and col8 == 22
localparamNUM_RC_BURST_BITS=ADDRESS_NUMBER+COLADDR_NUMBER-3;//to spcify row and col8 == 22
localparamMPY_WIDTH=NUM_RC_BURST_BITS;// 22
localparamMPY_WIDTH=NUM_RC_BURST_BITS;// 22
localparamPAR_MOD_LATENCY=7;// TODO: Find actual worst-case latency for:
localparamPAR_MOD_LATENCY=9;// TODO: Find actual worst-case latency for:
reg[FRAME_WIDTH_BITS-1:0]curr_x;// (calculated) start of transfer x (relative to window left)
reg[FRAME_WIDTH_BITS-1:0]curr_x;// (calculated) start of transfer x (relative to window left)
reg[FRAME_HEIGHT_BITS-1:0]curr_y;// (calculated) start of transfer y (relative to window top)
reg[FRAME_HEIGHT_BITS-1:0]curr_y;// (calculated) start of transfer y (relative to window top)
reg[FRAME_HEIGHT_BITS:0]next_y;// (calculated) next row number
reg[FRAME_HEIGHT_BITS:0]next_y;// (calculated) next row number
reg[NUM_RC_BURST_BITS-1:0]line_start_addr;// (calculated) Line start (in {row,col8} in burst8
reg[NUM_RC_BURST_BITS-1:0]line_start_addr;// (calculated) Line start (in {row,col8} in burst8
// calculating full width from the frame width
// calculating full width from the frame width
reg[FRAME_HEIGHT_BITS-1:0]frame_y;// current line number referenced to the frame top
reg[FRAME_HEIGHT_BITS-1:0]frame_y;// current line number referenced to the frame top
reg[FRAME_WIDTH_BITS-1:0]frame_x;// current column number referenced to the frame left
reg[FRAME_WIDTH_BITS-1:0]frame_x;// current column number referenced to the frame left
...
@@ -96,6 +96,7 @@ module mcntrl_linear_rw #(
...
@@ -96,6 +96,7 @@ module mcntrl_linear_rw #(
reg[FRAME_WIDTH_BITS:0]row_left;// number of 8-bursts left in the current row
reg[FRAME_WIDTH_BITS:0]row_left;// number of 8-bursts left in the current row
reglast_in_row;
reglast_in_row;
reg[COLADDR_NUMBER-3:0]mem_page_left;// number of 8-bursts left in the pointed memory page
reg[COLADDR_NUMBER-3:0]mem_page_left;// number of 8-bursts left in the pointed memory page
reg[COLADDR_NUMBER-4:0]line_start_page_left;// number of 8-burst left in the memory page from the start of the frame line
reg[NUM_XFER_BITS:0]lim_by_xfer;// number of bursts left limited by the longest transfer (currently 64)
reg[NUM_XFER_BITS:0]lim_by_xfer;// number of bursts left limited by the longest transfer (currently 64)
// reg [MAX_TILE_WIDTH:0] lim_by_tile_width; // number of bursts left limited by the longest transfer (currently 64)
// reg [MAX_TILE_WIDTH:0] lim_by_tile_width; // number of bursts left limited by the longest transfer (currently 64)
wire[COLADDR_NUMBER-3:0]remainder_in_xfer;//remainder_tile_width; // number of bursts postponed to the next partial tile (because of the page crossing) MSB-sign
wire[COLADDR_NUMBER-3:0]remainder_in_xfer;//remainder_tile_width; // number of bursts postponed to the next partial tile (because of the page crossing) MSB-sign
...
@@ -107,7 +108,7 @@ module mcntrl_linear_rw #(
...
@@ -107,7 +108,7 @@ module mcntrl_linear_rw #(
reg[NUM_XFER_BITS:0]xfer_num128_r;// number of 128-bit words to transfer (8*16 bits) - full bursts of 8
reg[NUM_XFER_BITS:0]xfer_num128_r;// number of 128-bit words to transfer (8*16 bits) - full bursts of 8
// reg [NUM_XFER_BITS-1:0] xfer_num128_m1_r; // number of 128-bit words to transfer minus 1 (8*16 bits) - full bursts of 8
// reg [NUM_XFER_BITS-1:0] xfer_num128_m1_r; // number of 128-bit words to transfer minus 1 (8*16 bits) - full bursts of 8
wirepgm_param_w;// program one of the parameters, invalidate calculated results for PAR_MOD_LATENCY
wirepgm_param_w;// program one of the parameters, invalidate calculated results for PAR_MOD_LATENCY
reg[2:0]xfer_start_r;
reg[2:0]xfer_start_r;// 1 hot started by xfer start only (not by parameter change)
reg[PAR_MOD_LATENCY-1:0]par_mod_r;
reg[PAR_MOD_LATENCY-1:0]par_mod_r;
reg[PAR_MOD_LATENCY-1:0]recalc_r;// 1-hot CE for re-calculating registers
reg[PAR_MOD_LATENCY-1:0]recalc_r;// 1-hot CE for re-calculating registers
wirecalc_valid;// calculated registers have valid values
wirecalc_valid;// calculated registers have valid values
...
@@ -142,9 +143,9 @@ module mcntrl_linear_rw #(
...
@@ -142,9 +143,9 @@ module mcntrl_linear_rw #(
wireset_window_wh_w;
wireset_window_wh_w;
wireset_window_x0y0_w;
wireset_window_x0y0_w;
wireset_window_start_w;
wireset_window_start_w;
wirelsw13_zero=!cmd_data[FRAME_WIDTH_BITS-1:0];// LSW 13 (FRAME_WIDTH_BITS) low bits are all 0 - set carry bit
wirelsw13_zero=!(|cmd_data[FRAME_WIDTH_BITS-1:0]);// LSW 13 (FRAME_WIDTH_BITS) low bits are all 0 - set carry bit
wiremsw13_zero=!cmd_data[FRAME_WIDTH_BITS+15:16];// MSW 13 (FRAME_WIDTH_BITS) low bits are all 0 - set carry bit
// wire msw13_zero=!(|cmd_data[FRAME_WIDTH_BITS+15:16]); // MSW 13 (FRAME_WIDTH_BITS) low bits are all 0 - set carry bit
wiremsw_zero=!cmd_data[31:16];// MSW all bits are 0 - set carry bit
wiremsw_zero=!(|cmd_data[31:16]);// MSW all bits are 0 - set carry bit
