Commit 6ed7aef1 authored by Andrey Filippov's avatar Andrey Filippov
Browse files

bug fixrd in DCT and other places

parent 30417be4

cocotb/x393_cocotb_02.sav

+425 −62

File changed.

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cocotb/x393_dut.v

+3 −1
Original line number Original line Diff line number Diff line
@@ -383,7 +383,9 @@ module x393_dut#( 
`endif

`endif





`ifdef HISPI 

`ifdef HISPI 

    parameter HBLANK=            92; // 72; // 62; // 52; // 90; // 12; /// 52; //*********************

    parameter HBLANK=            132; // all in time

///    parameter HBLANK=            122; // 72; // 62; // 52; // 90; // 12; /// 52; //********************* Still too fast

///    parameter HBLANK=            92; // 72; // 62; // 52; // 90; // 12; /// 52; //*********************

    parameter BLANK_ROWS_BEFORE= 9; /// 3; // 9; // 3; //8; ///2+2 - a little faster than compressor

    parameter BLANK_ROWS_BEFORE= 9; /// 3; // 9; // 3; //8; ///2+2 - a little faster than compressor

    parameter BLANK_ROWS_AFTER=  8; /// 1; //8;

    parameter BLANK_ROWS_AFTER=  8; /// 1; //8;

compressor_jp/cmprs_frame_sync.v

+34 −19
Original line number Original line Diff line number Diff line
@@ -95,20 +95,22 @@ module cmprs_frame_sync#( 
//    wire   vsync_late_mclk; // single mclk cycle, reclocked from vsync_late

//    wire   vsync_late_mclk; // single mclk cycle, reclocked from vsync_late

//    wire   frame_started_mclk; 

//    wire   frame_started_mclk; 

    reg        bonded_mode;

    reg        bonded_mode;

    reg    frame_start_dst_r;

    reg  [3:0] frame_start_dst_r;

    reg        frame_start_pend_r; // postpone frame_start_dst if previous frame was still being read during vsync_late 

    reg        frames_differ;  // src and dest point to different frames (single-frame buffer mode), disregard line_unfinished_*

    reg        frames_differ;  // src and dest point to different frames (single-frame buffer mode), disregard line_unfinished_*

    reg        frames_numbers_differ;  // src and dest point to different frames (multi-frame buffer mode), disregard line_unfinished_*

    reg        frames_numbers_differ;  // src and dest point to different frames (multi-frame buffer mode), disregard line_unfinished_*

    reg        line_numbers_sync;      // src unfinished line number is > this unfinished line number

    reg        line_numbers_sync;      // src unfinished line number is > this unfinished line number

    

    

    reg        reading_frame_r;         // compressor is reading frame data (make sure input is done before starting next frame, otherwise make it a broken frame

    reg        reading_frame_r;         // compressor is reading frame data (make sure input is done before starting next frame, otherwise make it a broken frame

    reg    broken_frame;

//  reg        broken_frame;

    reg        aborted_frame;

    reg        aborted_frame;

    reg        stuffer_running_mclk_r;

    reg        stuffer_running_mclk_r;

    reg [CMPRS_TIMEOUT_BITS-1:0] timeout;

    reg [CMPRS_TIMEOUT_BITS-1:0] timeout;

    reg        cmprs_en_extend_r=0;

    reg        cmprs_en_extend_r=0;

    reg        cmprs_en_d;

    reg        cmprs_en_d;

    reg        suspend_end; // suspend at teh end of the current frame until frame number changes

//    reg    cmprs_en_xclk;

//    reg    cmprs_en_xclk;

    assign frame_start_dst = frame_start_dst_r;

    assign frame_start_dst = frame_start_dst_r[0];

    assign cmprs_en_extend = cmprs_en_extend_r;

    assign cmprs_en_extend = cmprs_en_extend_r;

    

    

    assign stuffer_running_mclk = stuffer_running_mclk_r;

    assign stuffer_running_mclk = stuffer_running_mclk_r;
@@ -132,17 +134,32 @@ module cmprs_frame_sync#( 
        

        

        cmprs_en_d <= cmprs_en;

        cmprs_en_d <= cmprs_en;





        broken_frame <=  cmprs_en && cmprs_run && vsync_late && reading_frame_r; // single xclk pulse

///     broken_frame <=  cmprs_en && cmprs_run && vsync_late && reading_frame_r; // single xclk pulse

        aborted_frame <= cmprs_en_d && !cmprs_en && stuffer_running_mclk_r;

        aborted_frame <= cmprs_en_d && !cmprs_en && stuffer_running_mclk_r;

        

        

        if      (!stuffer_running_mclk_r ||!cmprs_en_extend_r) force_flush_long <= 0;

        if      (!stuffer_running_mclk_r ||!cmprs_en_extend_r) force_flush_long <= 0;

        else if (broken_frame || aborted_frame)                force_flush_long <= 1;

///     else if (broken_frame || aborted_frame)                force_flush_long <= 1;

        else if (aborted_frame)                                force_flush_long <= 1;





    

    

        if (!cmprs_en || frame_done || (cmprs_run && vsync_late)) reading_frame_r <= 0;

///     if (!cmprs_en || frame_done || (cmprs_run && vsync_late)) reading_frame_r <= 0;

        if (!cmprs_en || frame_done )                             reading_frame_r <= 0;

        else if (frame_started_mclk)                              reading_frame_r <= 1;

        else if (frame_started_mclk)                              reading_frame_r <= 1;





        frame_start_dst_r <= cmprs_en && (cmprs_run ? (vsync_late && !reading_frame_r) : cmprs_standalone);

        if      (!cmprs_en)                                   frame_start_pend_r <= 0;

        else if (cmprs_run && vsync_late && reading_frame_r)  frame_start_pend_r <= 1;

        else if (frame_start_dst_r[0])                        frame_start_pend_r <= 0;

         

        if      (!cmprs_en)            suspend_end <= 0;

        else if (frame_done)           suspend_end <= 1;

        else if (frame_start_dst_r[3]) suspend_end <= 0;

        

        frame_start_dst_r[0] <= cmprs_en && (cmprs_run ? 

                                            ((vsync_late && !reading_frame_r) || (frame_start_pend_r  && frame_done)):

                                             cmprs_standalone);

        if      (!cmprs_en)   frame_start_dst_r[3:1] <=0;

        else                  frame_start_dst_r[3:1] <= frame_start_dst_r[2:0];                                             

        

        if      (!cmprs_en)        bonded_mode <= 0;

        if      (!cmprs_en)        bonded_mode <= 0;

        else if (cmprs_run)        bonded_mode <= 1;

        else if (cmprs_run)        bonded_mode <= 1;

        else if (cmprs_standalone) bonded_mode <= 0;

        else if (cmprs_standalone) bonded_mode <= 0;
@@ -150,12 +167,10 @@ module cmprs_frame_sync#( 
        if (!cmprs_en || !cmprs_run || vsync_late) frames_differ <= 0;

        if (!cmprs_en || !cmprs_run || vsync_late) frames_differ <= 0;

        else if (frame_done_src)                   frames_differ <= 1'b1;

        else if (frame_done_src)                   frames_differ <= 1'b1;

        

        

        frames_numbers_differ <= frame_number_src != frame_number;

        frames_numbers_differ <= !suspend_end && (frame_number_src != frame_number); // during end of frame, before frame number is incremented

        

        

        line_numbers_sync <= (line_unfinished_src > line_unfinished);

        line_numbers_sync <= (line_unfinished_src > line_unfinished);

        

        

//        suspend <= !bonded_mode && ((sigle_frame_buf ? frames_differ : frames_numbers_differ) || line_numbers_sync);

//        suspend <= bonded_mode && ((sigle_frame_buf ? frames_differ : frames_numbers_differ) || !line_numbers_sync);

        suspend <= bonded_mode && !((sigle_frame_buf ? frames_differ : frames_numbers_differ) || line_numbers_sync);

        suspend <= bonded_mode && !((sigle_frame_buf ? frames_differ : frames_numbers_differ) || line_numbers_sync);

compressor_jp/cmprs_macroblock_buf_iface.v

+18 −8
Original line number Original line Diff line number Diff line
@@ -123,7 +123,9 @@ module cmprs_macroblock_buf_iface #( 
//    reg           first_mb;       // from mb_pre_start[2]  to mb_pre_start[1]

//    reg           first_mb;       // from mb_pre_start[2]  to mb_pre_start[1]

    wire          starting;

    wire          starting;

    reg           frame_pre_run;

    reg           frame_pre_run;

    reg     [1:0] frame_may_start;

//    reg     [1:0] frame_may_start;

    reg           frame_start_xclk_r; // next cycle after frame_start_xclk

    

    

    

    reg     [5:0] dct_pipeline_delay_cntr;

    reg     [5:0] dct_pipeline_delay_cntr;
@@ -143,19 +145,27 @@ module cmprs_macroblock_buf_iface #( 
    assign last_mb = mb_last_row && mb_last_in_row;

    assign last_mb = mb_last_row && mb_last_in_row;

    assign starting = |mb_pre_start;

    assign starting = |mb_pre_start;





//    assign mb_pre_start_w =  (mb_pre_end_in && (!last_mb || frame_en_w)) || (!frame_pre_run && frame_en_w && !frame_en_r && !starting);

/*

//    assign frame_pre_start_w =  frame_en_w && ((mb_pre_end_in && last_mb) || (!frame_pre_run && !frame_en_r && !starting));

    assign mb_pre_start_w =  (mb_pre_end_in && (!last_mb || frame_may_start)) ||

    assign mb_pre_start_w =  (mb_pre_end_in && (!last_mb || frame_may_start)) || ((frame_may_start==2'b1) && !frame_pre_run && !starting);

                             ((frame_may_start==2'b1) && !frame_pre_run && !starting);

    assign frame_pre_start_w =  frame_may_start[0] && ((mb_pre_end_in && last_mb) || (!frame_pre_run && !frame_may_start[1] && !starting));

    assign frame_pre_start_w =  frame_may_start[0] && ((mb_pre_end_in && last_mb) || (!frame_pre_run && !frame_may_start[1] && !starting));

    

*/    

    assign mb_pre_start_w =     mb_pre_end_in ||              (frame_start_xclk_r && !frame_pre_run && !starting);

    assign frame_pre_start_w =  (mb_pre_end_in && last_mb) || (frame_start_xclk_r && !frame_pre_run && !starting);

 //frame_start_xclk_r   

    assign start_page = next_invalid[1:0]; // oldest page needed for this macroblock

    assign start_page = next_invalid[1:0]; // oldest page needed for this macroblock

    always @ (posedge xclk) begin

    always @ (posedge xclk) begin

    

        if (!frame_en) frame_start_xclk_r <= 0;

        else           frame_start_xclk_r <= frame_start_xclk;

        

        

        if (!frame_en) frame_en_r <= 0;

        if (!frame_en) frame_en_r <= 0;

        else           frame_en_r <= frame_en_w;

        else           frame_en_r <= frame_en_w;

        

        

        if (!frame_en_w || starting) frame_may_start[0] <= 0;

///     if (!frame_en_w || starting) frame_may_start[0] <= 0;

        else if (frame_start_xclk)   frame_may_start[0] <= 1;

///     else if (frame_start_xclk)   frame_may_start[0] <= 1;

        frame_may_start[1] <= frame_may_start[0];

///     frame_may_start[1] <= frame_may_start[0];

        

        

        frame_pre_start_r <= frame_pre_start_w; // same time as mb_pre_start

        frame_pre_start_r <= frame_pre_start_w; // same time as mb_pre_start

compressor_jp/cmprs_pixel_buf_iface.v

+12 −0
Original line number Original line Diff line number Diff line
@@ -133,6 +133,18 @@ module cmprs_pixel_buf_iface #( 
//    assign data_out =          do_r;

//    assign data_out =          do_r;

    assign pre_first_out =     pre_first_out_r[0];

    assign pre_first_out =     pre_first_out_r[0];

    assign pre2_first_out =    pre_first_out_r[1];

    assign pre2_first_out =    pre_first_out_r[1];

`ifdef DEBUG_COMPRESSOR_SCRAMBLE

    wire [31:0] DBG_SCRAMBLED;

    scrambler #(

        .DATA_BYTE_WIDTH(4)

    ) scrambler_i (

        .clk      (xclk), // input wire 

        .rst      (mb_pre_start), // input wire 

        .val_in   (buf_re[CMPRS_BUF_EXTRA_LATENCY+2]), // input wire 

        .data_in  ({24'b0,buf_di}), // input[31:0] wire 

        .data_out (DBG_SCRAMBLED) // output[31:0] wire 

    );

`endif





    always @(posedge xclk) begin

    always @(posedge xclk) begin

//        mb_h <= mb_h_m1+1;     // macroblock height

//        mb_h <= mb_h_m1+1;     // macroblock height