adding synchronization and logger modules (69e5938a) · Commits · Elphel / x393

includes/x393_parameters.vh

+91 −1

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		@@ -528,5 +528,95 @@

		parameter CMPRS_AFIMUX_WIDTH = 26, // maximal for status: currently only works with 26)
		parameter CMPRS_AFIMUX_CYCBITS = 3,
		parameter AFI_MUX_BUF_LATENCY = 2 // buffers read latency from fifo_ren* to fifo_rdata* valid : 2 if no register layers are used
		parameter AFI_MUX_BUF_LATENCY = 2, // buffers read latency from fifo_ren* to fifo_rdata* valid : 2 if no register layers are used
		// GPIO control : 'h700..'h701, status: 'h30
		parameter integer GPIO_DRIVE = 12,
		parameter GPIO_ADDR = 'h700, // .701
		parameter GPIO_MASK = 'h7fe,
		parameter GPIO_STATUS_REG_ADDR = 'h30, // address where status can be read out (10 GPIO inputs)

		parameter GPIO_IBUF_LOW_PWR = "TRUE",
		parameter GPIO_IOSTANDARD = "DEFAULT", // power is 1.5V
		parameter GPIO_SLEW = "SLOW",

		parameter GPIO_SET_PINS = 0, // Set GPIO output state, give control for some bits to other modules
		parameter GPIO_SET_STATUS = 1, // set status mode
		parameter GPIO_N = 10, // number of GPIO bits to control
		parameter GPIO_PORTEN = 24, // bit number to control port enables (up from this)
		// Timing (rtc+camsync) parameters
		parameter RTC_ADDR= 'h704, // 'h707
		parameter CAMSYNC_ADDR = 'h708, // 'h70f
		parameter RTC_STATUS_REG_ADDR = 'h31, // (1 loc) address where status can be read out (currently just sequence # and alternating bit)
		parameter RTC_SEC_USEC_ADDR = 'h32, // ..'h33 address where seconds of the snapshot can be read (microseconds - next adderss)
		parameter RTC_MASK = 'h7fc,
		parameter CAMSYNC_MASK = 'h7f8,
		parameter CAMSYNC_MODE = 'h0,
		parameter CAMSYNC_TRIG_SRC = 'h1, // setup trigger source
		parameter CAMSYNC_TRIG_DST = 'h2, // setup trigger destination line(s)
		parameter CAMSYNC_TRIG_PERIOD = 'h3, // setup output trigger period
		parameter CAMSYNC_TRIG_DELAY0 = 'h4, // setup input trigger delay
		parameter CAMSYNC_TRIG_DELAY1 = 'h5, // setup input trigger delay
		parameter CAMSYNC_TRIG_DELAY2 = 'h6, // setup input trigger delay
		parameter CAMSYNC_TRIG_DELAY3 = 'h7, // setup input trigger delay
		parameter CAMSYNC_SNDEN_BIT = 'h1, // enable writing ts_snd_en
		parameter CAMSYNC_EXTERNAL_BIT = 'h3, // enable writing ts_external
		parameter CAMSYNC_TRIGGERED_BIT = 'h5, // enable writing ts_external
		parameter CAMSYNC_MASTER_BIT = 'h8, // select a 2-bit master channel (master delay may be used as a flash delay)
		parameter CAMSYNC_CHN_EN_BIT = 'hd, // per-channel enable timestamp generation
		parameter CAMSYNC_PRE_MAGIC = 6'b110100,
		parameter CAMSYNC_POST_MAGIC = 6'b001101,

		parameter RTC_MHZ= 25, // RTC input clock in MHz (should be interger number)
		parameter RTC_BITC_PREDIV = 5, // number of bits to generate 2 MHz pulses counting refclk
		parameter RTC_SET_USEC= 0, // 20-bit number of microseconds
		parameter RTC_SET_SEC= 1, // 32-bit full number of seconds (und actually update timer)
		parameter RTC_SET_CORR= 2, // write correction 16-bit signed
		parameter RTC_SET_STATUS= 3, // generate an output pulse to take a snapshot
		// Command sequencers parameters
		parameter CMDFRAMESEQ_ADDR_BASE= 'h780,
		parameter CMDFRAMESEQ_ADDR_INC= 'h20,
		parameter CMDFRAMESEQ_MASK= 'h3e0,
		parameter CMDFRAMESEQ_DEPTH = 64, // 32/64/128
		parameter CMDFRAMESEQ_ABS = 0,
		parameter CMDFRAMESEQ_REL = 16,
		parameter CMDFRAMESEQ_CTRL = 31,
		parameter CMDFRAMESEQ_RST_BIT = 14,
		parameter CMDFRAMESEQ_RUN_BIT = 13,

		parameter CMDSEQMUX_ADDR = 'h702, // only status control
		parameter CMDSEQMUX_MASK = 'h7ff,
		parameter CMDSEQMUX_STATUS = 'h31,
		// Logger parameters
		parameter LOGGER_ADDR = 'h720, //..'h721
		parameter LOGGER_STATUS = 'h722, // .. 'h722
		parameter LOGGER_STATUS_REG_ADDR = 'h34, // just 1 location)
		parameter LOGGER_MASK = 'h7fe,
		parameter LOGGER_STATUS_MASK = 'h7ff,

		parameter LOGGER_PAGE_IMU = 0, // 'h00..'h1f - overlaps with period/duration/halfperiod/config?
		parameter LOGGER_PAGE_GPS = 1, // 'h20..'h3f
		parameter LOGGER_PAGE_MSG = 2, // 'h40..'h5f

		parameter LOGGER_PERIOD = 0,
		parameter LOGGER_BIT_DURATION = 1,
		parameter LOGGER_BIT_HALF_PERIOD = 2, //rs232 half bit period
		parameter LOGGER_CONFIG = 3,

		parameter LOGGER_CONF_IMU = 2,
		parameter LOGGER_CONF_IMU_BITS = 2,
		parameter LOGGER_CONF_GPS = 7,
		parameter LOGGER_CONF_GPS_BITS = 4,
		parameter LOGGER_CONF_MSG = 13,
		parameter LOGGER_CONF_MSG_BITS = 5,
		parameter LOGGER_CONF_SYN = 18, // 15,
		parameter LOGGER_CONF_SYN_BITS = 4, // 1,
		parameter LOGGER_CONF_EN = 20, // 17,
		parameter LOGGER_CONF_EN_BITS = 1,
		parameter LOGGER_CONF_DBG = 25, // 22,
		parameter LOGGER_CONF_DBG_BITS = 4






		No newline at end of file

logger/event_logger.v

+10 −10

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		@@ -21,9 +21,9 @@
		`timescale 1ns/1ps

		module event_logger#(
		parameter LOGGER_ADDR = 'h1a0, //TODO: assign valid address
		parameter LOGGER_STATUS = 'h1a2, //TODO: assign valid address (just 1 location)
		parameter LOGGER_STATUS_REG_ADDR = 'h0b, //TODO: assign valid address (just 1 location)
		parameter LOGGER_ADDR = 'h720, //..'h721
		parameter LOGGER_STATUS = 'h722, // .. 'h722
		parameter LOGGER_STATUS_REG_ADDR = 'h34, // just 1 location)
		parameter LOGGER_MASK = 'h7fe,
		parameter LOGGER_STATUS_MASK = 'h7ff,

		@@ -327,7 +327,7 @@ module event_logger#(
		.PAYLOAD_BITS (26),
		.REGISTER_STATUS (1)
		) status_generate_i (
		.rst (), // input
		.rst (rst), // input
		.clk (mclk), // input
		.we (cmd_status), // input
		.wd (cmd_data[7:0]), // input[7:0]

timing/timing393.v

+6 −7

Original line number	Diff line number	Diff line
		@@ -21,13 +21,12 @@
		`timescale 1ns/1ps

		module timing393 #(
		parameter CAMSYNC_ADDR = 'h160, //TODO: assign valid address
		parameter RTC_ADDR= 'h170, //TODO: assign valid address
		parameter RTC_STATUS_REG_ADDR = 7, // address where status can be read out (currnelti just sequence # and alternating bit)
		parameter RTC_SEC_USEC_ADDR = 8, // address where seconds of the snapshot can be read (microseconds - next adderss)

		parameter CAMSYNC_MASK = 'h7f8,
		parameter RTC_ADDR= 'h704, // 'h707
		parameter CAMSYNC_ADDR = 'h708, // 'h70f
		parameter RTC_STATUS_REG_ADDR = 'h31, // (1 loc) address where status can be read out (currently just sequence # and alternating bit)
		parameter RTC_SEC_USEC_ADDR = 'h32, // ..'h33 address where seconds of the snapshot can be read (microseconds - next adderss)
		parameter RTC_MASK = 'h7fc,
		parameter CAMSYNC_MASK = 'h7f8,
		parameter CAMSYNC_MODE = 'h0,
		parameter CAMSYNC_TRIG_SRC = 'h1, // setup trigger source
		parameter CAMSYNC_TRIG_DST = 'h2, // setup trigger destination line(s)
		@@ -53,7 +52,7 @@ module timing393 #(
		)(
		input rst, // global reset
		input mclk, // system clock
		input pclk, // pixel clock (global) - switch it to 100MHz (mclk/2)?
		input pclk, // was pixel clock in x353 clock (global) - switch it to 100MHz (mclk/2)?

		input refclk, // not a global clock, reference frequency < mclk/2

util_modules/cmd_frame_sequencer.v

+1 −1

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		@@ -48,7 +48,7 @@
		// [13:12] - 3 - run seq, 2 - stop seq , 1,0 - no change to run state

		module cmd_frame_sequencer#(
		parameter CMDFRAMESEQ_ADDR= 'h160, //TODO: assign valid address
		parameter CMDFRAMESEQ_ADDR= 'h780,
		parameter CMDFRAMESEQ_MASK= 'h3e0,
		parameter AXI_WR_ADDR_BITS = 14,
		parameter CMDFRAMESEQ_DEPTH = 64, // 32/64/128

util_modules/cmd_seq_mux.v

+72 −23

Original line number	Diff line number	Diff line
		@@ -22,26 +22,40 @@
		`timescale 1ns/1ps

		module cmd_seq_mux#(
		parameter CMDSEQMUX_ADDR = 'h702, // only status control
		parameter CMDSEQMUX_MASK = 'h7ff,
		parameter CMDSEQMUX_STATUS = 'h31,
		parameter AXI_WR_ADDR_BITS=14
		)(
		input rst, // global system reset
		input mclk, // global system clock
		// programming interface
		input [7:0] cmd_ad, // byte-serial command address/data (up to 6 bytes: AL-AH-D0-D1-D2-D3
		input cmd_stb, // strobe (with first byte) for the command a/d
		output [7:0] status_ad, // status address/data - up to 5 bytes: A - {seq,status[1:0]} - status[2:9] - status[10:17] - status[18:25]
		output status_rq, // input request to send status downstream
		input status_start, // Acknowledge of the first status packet byte (address)

		// Sensor channel 0
		input [ 3:0] frame_num0, // @posedge mclk
		input [AXI_WR_ADDR_BITS-1:0] waddr0, // write address, valid with wr_en_out
		input wr_en0, // write enable
		input [31:0] wdata0, // write data, valid with waddr_out and wr_en_out
		output ackn0, // command sequencer address/data accepted
		// Sensor channel 1
		input [ 3:0] frame_num1, // @posedge mclk
		input [AXI_WR_ADDR_BITS-1:0] waddr1, // write address, valid with wr_en_out
		input wr_en1, // write enable
		input [31:0] wdata1, // write data, valid with waddr_out and wr_en_out
		output ackn1, // command sequencer address/data accepted
		// Sensor channel 2
		input [ 3:0] frame_num2, // @posedge mclk
		input [AXI_WR_ADDR_BITS-1:0] waddr2, // write address, valid with wr_en_out
		input wr_en2, // write enable
		input [31:0] wdata2, // write data, valid with waddr_out and wr_en_out
		output ackn2, // command sequencer address/data accepted
		// Sensor channel 3
		input [ 3:0] frame_num3, // @posedge mclk
		input [AXI_WR_ADDR_BITS-1:0] waddr3, // write address, valid with wr_en_out
		input wr_en3, // write enable
		input [31:0] wdata3, // write data, valid with waddr_out and wr_en_out
		@@ -114,6 +128,41 @@ module cmd_seq_mux#(
		end
		end

		// Only command is to program status, status combines frame numbers (4 bit each)
		wire [7:0] cmd_data;
		wire cmd_status;
		cmd_deser #(
		.ADDR (CMDSEQMUX_ADDR),
		.ADDR_MASK (CMDSEQMUX_MASK),
		.NUM_CYCLES (3), // 6), // TODO: Is it OK to specify less bits than on transmit side? Seems yes
		.ADDR_WIDTH (1),
		.DATA_WIDTH (8) //,32)

		) cmd_deser_32bit_i (
		.rst (rst), // input
		.clk (mclk), // input
		.ad (cmd_ad), // input[7:0]
		.stb (cmd_stb), // input
		.addr (), // output[0:0]
		.data (cmd_data), // output[31:0]
		.we (cmd_status) // output
		);

		status_generate #(
		.STATUS_REG_ADDR (CMDSEQMUX_STATUS),
		.PAYLOAD_BITS (18),
		.REGISTER_STATUS (1)
		) status_generate_cmd_seq_mux_i (
		.rst (rst), // input
		.clk (mclk), // input
		.we (cmd_status), // input
		.wd (cmd_data[7:0]), // input[7:0]
		.status ({frame_num3, frame_num2, frame_num1, frame_num0, 2'b0}), // input[18:0] // 2 LSBs - may add "real" status
		.ad (status_ad), // output[7:0]
		.rq (status_rq), // output
		.start (status_start) // input
		);



		endmodule

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