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Commit 4714de19 authored by Andrey Filippov's avatar Andrey Filippov
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connecting LWIR sensors to FPGA code

parent 51c11c7e
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cocotb/x393_dut.v
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......@@ -485,6 +485,74 @@ module x393_dut#(
wire PX2_MCLK_PRE; // input to pixel clock mult/divisor // SuppressThisWarning VEditor - may be unused
wire PX3_MCLK_PRE; // input to pixel clock mult/divisor // SuppressThisWarning VEditor - may be unused
wire PX4_MCLK_PRE; // input to pixel clock mult/divisor // SuppressThisWarning VEditor - may be unused
// for LWIR -
wire LWIR1_SPI_MISO;
wire LWIR1_SPI_MOSI;
wire LWIR1_SPI_CS;
wire LWIR1_SPI_CLK;
wire LWIR1_GPIO0; // not implemented
wire LWIR1_GPIO1; // not implemented
wire LWIR1_GPIO2; // not implemented
wire LWIR1_GPIO3; // may be used as VSYNC (segment ready)
wire LWIR1_MCLK; // 25 MHz
wire LWIR1_MRST; // active low
wire LWIR1_PWDN; // active low power down
wire LWIR1_MIPI_DP; // not implemented
wire LWIR1_MIPI_DN; // not implemented
wire LWIR1_MIPI_CLKP; // not implemented
wire LWIR1_MIPI_CLKN; // not implemented
wire LWIR2_SPI_MISO;
wire LWIR2_SPI_MOSI;
wire LWIR2_SPI_CS;
wire LWIR2_SPI_CLK;
wire LWIR2_GPIO0; // not implemented
wire LWIR2_GPIO1; // not implemented
wire LWIR2_GPIO2; // not implemented
wire LWIR2_GPIO3; // may be used as VSYNC (segment ready)
wire LWIR2_MCLK; // 25 MHz
wire LWIR2_MRST; // active low
wire LWIR2_PWDN; // active low power down
wire LWIR2_MIPI_DP; // not implemented
wire LWIR2_MIPI_DN; // not implemented
wire LWIR2_MIPI_CLKP; // not implemented
wire LWIR2_MIPI_CLKN; // not implemented
wire LWIR3_SPI_MISO;
wire LWIR3_SPI_MOSI;
wire LWIR3_SPI_CS;
wire LWIR3_SPI_CLK;
wire LWIR3_GPIO0; // not implemented
wire LWIR3_GPIO1; // not implemented
wire LWIR3_GPIO2; // not implemented
wire LWIR3_GPIO3; // may be used as VSYNC (segment ready)
wire LWIR3_MCLK; // 25 MHz
wire LWIR3_MRST; // active low
wire LWIR3_PWDN; // active low power down
wire LWIR3_MIPI_DP; // not implemented
wire LWIR3_MIPI_DN; // not implemented
wire LWIR3_MIPI_CLKP; // not implemented
wire LWIR3_MIPI_CLKN; // not implemented
wire LWIR4_SPI_MISO;
wire LWIR4_SPI_MOSI;
wire LWIR4_SPI_CS;
wire LWIR4_SPI_CLK;
wire LWIR4_GPIO0; // not implemented
wire LWIR4_GPIO1; // not implemented
wire LWIR4_GPIO2; // not implemented
wire LWIR4_GPIO3; // may be used as VSYNC (segment ready)
wire LWIR4_MCLK; // 25 MHz
wire LWIR4_MRST; // active low
wire LWIR4_PWDN; // active low power down
wire LWIR4_MIPI_DP; // not implemented
wire LWIR4_MIPI_DN; // not implemented
wire LWIR4_MIPI_CLKP; // not implemented
wire LWIR4_MIPI_CLKN; // not implemented
// Sensor signals - as on FPGA pads
wire [ 7:0] sns1_dp; // inout[7:0] {PX_MRST, PXD8, PXD6, PXD4, PXD2, PXD0, PX_HACT, PX_DCLK}
......@@ -627,6 +695,88 @@ module x393_dut#(
assign PX4_MRST = sns4_dp[7]; // from FPGA to sensor
assign PX4_ARST = sns4_dn[7]; // same as GP[3]
assign PX4_ARO = sns4_dn[5]; // same as GP[1]
`elsif LWIR
// connect LWIR sensor to x393
assign LWIR1_SPI_MOSI = sns1_dn[0];
assign LWIR1_SPI_CS = sns1_dp[1];
assign LWIR1_SPI_CLK = sns1_dn[1];
assign LWIR1_MCLK = sns1_dp[6];
assign LWIR1_MRST = sns1_dp[7];
assign LWIR1_PWDN = sns1_dn[7];
assign LWIR1_GPIO0 = LWIR_GPIO_IN[0]? sns1_dn[3] : 'bz;
assign LWIR1_GPIO1 = LWIR_GPIO_IN[1]? sns1_dp[3] : 'bz;
assign LWIR1_GPIO2 = LWIR_GPIO_IN[2]? sns1_dn[4] : 'bz;
assign LWIR1_GPIO3 = LWIR_GPIO_IN[3]? sns1_dp[4] : 'bz;
assign sns1_dp[0] = LWIR1_SPI_MISO;
assign sns1_dn[3] = LWIR_GPIO_IN[0]? 'bz : LWIR1_GPIO0;
assign sns1_dp[3] = LWIR_GPIO_IN[1]? 'bz : LWIR1_GPIO1;
assign sns1_dn[4] = LWIR_GPIO_IN[2]? 'bz : LWIR1_GPIO2;
assign sns1_dp[4] = LWIR_GPIO_IN[3]? 'bz : LWIR1_GPIO3;
assign sns1_dn[5] = LWIR1_MIPI_DN;
assign sns1_dp[5] = LWIR1_MIPI_DP;
assign sns1_clkn = LWIR1_MIPI_CLKN;
assign sns1_clkp = LWIR1_MIPI_CLKP;
assign LWIR2_SPI_MOSI = sns2_dn[0];
assign LWIR2_SPI_CS = sns2_dp[1];
assign LWIR2_SPI_CLK = sns2_dn[1];
assign LWIR2_MCLK = sns2_dp[6];
assign LWIR2_MRST = sns2_dp[7];
assign LWIR2_PWDN = sns2_dn[7];
assign LWIR2_GPIO0 = LWIR_GPIO_IN[0]? sns2_dn[3] : 'bz;
assign LWIR2_GPIO1 = LWIR_GPIO_IN[1]? sns2_dp[3] : 'bz;
assign LWIR2_GPIO2 = LWIR_GPIO_IN[2]? sns2_dn[4] : 'bz;
assign LWIR2_GPIO3 = LWIR_GPIO_IN[3]? sns2_dp[4] : 'bz;
assign sns2_dp[0] = LWIR2_SPI_MISO;
assign sns2_dn[3] = LWIR_GPIO_IN[0]? 'bz : LWIR2_GPIO0;
assign sns2_dp[3] = LWIR_GPIO_IN[1]? 'bz : LWIR2_GPIO1;
assign sns2_dn[4] = LWIR_GPIO_IN[2]? 'bz : LWIR2_GPIO2;
assign sns2_dp[4] = LWIR_GPIO_IN[3]? 'bz : LWIR2_GPIO3;
assign sns2_dn[5] = LWIR2_MIPI_DN;
assign sns2_dp[5] = LWIR2_MIPI_DP;
assign sns2_clkn = LWIR2_MIPI_CLKN;
assign sns2_clkp = LWIR2_MIPI_CLKP;
assign LWIR3_SPI_MOSI = sns3_dn[0];
assign LWIR3_SPI_CS = sns3_dp[1];
assign LWIR3_SPI_CLK = sns3_dn[1];
assign LWIR3_MCLK = sns3_dp[6];
assign LWIR3_MRST = sns3_dp[7];
assign LWIR3_PWDN = sns3_dn[7];
assign LWIR3_GPIO0 = LWIR_GPIO_IN[0]? sns3_dn[3] : 'bz;
assign LWIR3_GPIO1 = LWIR_GPIO_IN[1]? sns3_dp[3] : 'bz;
assign LWIR3_GPIO2 = LWIR_GPIO_IN[2]? sns3_dn[4] : 'bz;
assign LWIR3_GPIO3 = LWIR_GPIO_IN[3]? sns3_dp[4] : 'bz;
assign sns3_dp[0] = LWIR3_SPI_MISO;
assign sns3_dn[3] = LWIR_GPIO_IN[0]? 'bz : LWIR3_GPIO0;
assign sns3_dp[3] = LWIR_GPIO_IN[1]? 'bz : LWIR3_GPIO1;
assign sns3_dn[4] = LWIR_GPIO_IN[2]? 'bz : LWIR3_GPIO2;
assign sns3_dp[4] = LWIR_GPIO_IN[3]? 'bz : LWIR3_GPIO3;
assign sns3_dn[5] = LWIR3_MIPI_DN;
assign sns3_dp[5] = LWIR3_MIPI_DP;
assign sns3_clkn = LWIR3_MIPI_CLKN;
assign sns3_clkp = LWIR3_MIPI_CLKP;
assign LWIR4_SPI_MOSI = sns4_dn[0];
assign LWIR4_SPI_CS = sns4_dp[1];
assign LWIR4_SPI_CLK = sns4_dn[1];
assign LWIR4_MCLK = sns4_dp[6];
assign LWIR4_MRST = sns4_dp[7];
assign LWIR4_PWDN = sns4_dn[7];
assign LWIR4_GPIO0 = LWIR_GPIO_IN[0]? sns4_dn[3] : 'bz;
assign LWIR4_GPIO1 = LWIR_GPIO_IN[1]? sns4_dp[3] : 'bz;
assign LWIR4_GPIO2 = LWIR_GPIO_IN[2]? sns4_dn[4] : 'bz;
assign LWIR4_GPIO3 = LWIR_GPIO_IN[3]? sns4_dp[4] : 'bz;
assign sns4_dp[0] = LWIR4_SPI_MISO;
assign sns4_dn[3] = LWIR_GPIO_IN[0]? 'bz : LWIR4_GPIO0;
assign sns4_dp[3] = LWIR_GPIO_IN[1]? 'bz : LWIR4_GPIO1;
assign sns4_dn[4] = LWIR_GPIO_IN[2]? 'bz : LWIR4_GPIO2;
assign sns4_dp[4] = LWIR_GPIO_IN[3]? 'bz : LWIR4_GPIO3;
assign sns4_dn[5] = LWIR4_MIPI_DN;
assign sns4_dp[5] = LWIR4_MIPI_DP;
assign sns4_clkn = LWIR4_MIPI_CLKN;
assign sns4_clkp = LWIR4_MIPI_CLKP;
`else
//connect parallel12 sensor to sensor port 1
assign sns1_dp[6:1] = {PX1_D[10], PX1_D[8], PX1_D[6], PX1_D[4], PX1_D[2], PX1_HACT};
......@@ -943,6 +1093,13 @@ module x393_dut#(
.sns1_dn (sns1_dn[3:0]), // inout[3:0]
.sns1_dp74 (sns1_dp[7:4]), // inout[3:0]
.sns1_dn74 (sns1_dn[7:4]), // inout[3:0]
`elsif LWIR
.sns1_dp40 (sns1_dp[4:0]), // input[4:0]
.sns1_dn40 (sns1_dn[4:0]), // input[4:0]
.sns1_dp5 (sns1_dp[5]), // inout differential
.sns1_dn5 (sns1_dn[5]), // inout differential
.sns1_dp76 (sns1_dp[7:6]), // inout[7:6]
.sns1_dn76 (sns1_dn[7:6]), // inout[7:6]
`else
.sns1_dp (sns1_dp), // inout[7:0] {PX_MRST, PXD8, PXD6, PXD4, PXD2, PXD0, PX_HACT, PX_DCLK}
.sns1_dn (sns1_dn), // inout[7:0] {PX_ARST, PXD9, PXD7, PXD5, PXD3, PXD1, PX_VACT, PX_BPF}
......@@ -959,6 +1116,13 @@ module x393_dut#(
.sns2_dn (sns2_dn[3:0]), // inout[3:0]
.sns2_dp74 (sns2_dp[7:4]), // inout[3:0]
.sns2_dn74 (sns2_dn[7:4]), // inout[3:0]
`elsif LWIR
.sns2_dp40 (sns2_dp[4:0]), // input[4:0]
.sns2_dn40 (sns2_dn[4:0]), // input[4:0]
.sns2_dp5 (sns2_dp[5]), // inout differential
.sns2_dn5 (sns2_dn[5]), // inout differential
.sns2_dp76 (sns2_dp[7:6]), // inout[7:6]
.sns2_dn76 (sns2_dn[7:6]), // inout[7:6]
`else
// .sns2_dp (sns1_dp), // inout[7:0] {PX_MRST, PXD8, PXD6, PXD4, PXD2, PXD0, PX_HACT, PX_DCLK}
// .sns2_dn (sns1_dn), // inout[7:0] {PX_ARST, PXD9, PXD7, PXD5, PXD3, PXD1, PX_VACT, PX_BPF}
......@@ -977,6 +1141,13 @@ module x393_dut#(
.sns3_dn (sns3_dn[3:0]), // inout[3:0]
.sns3_dp74 (sns3_dp[7:4]), // inout[3:0]
.sns3_dn74 (sns3_dn[7:4]), // inout[3:0]
`elsif LWIR
.sns3_dp40 (sns3_dp[4:0]), // input[4:0]
.sns3_dn40 (sns3_dn[4:0]), // input[4:0]
.sns3_dp5 (sns3_dp[5]), // inout differential
.sns3_dn5 (sns3_dn[5]), // inout differential
.sns3_dp76 (sns3_dp[7:6]), // inout[7:6]
.sns3_dn76 (sns3_dn[7:6]), // inout[7:6]
`else
.sns3_dp (sns3_dp), // inout[7:0] {PX_MRST, PXD8, PXD6, PXD4, PXD2, PXD0, PX_HACT, PX_DCLK}
.sns3_dn (sns3_dn), // inout[7:0] {PX_ARST, PXD9, PXD7, PXD5, PXD3, PXD1, PX_VACT, PX_BPF}
......@@ -993,6 +1164,13 @@ module x393_dut#(
.sns4_dn (sns4_dn[3:0]), // inout[3:0]
.sns4_dp74 (sns4_dp[7:4]), // inout[3:0]
.sns4_dn74 (sns4_dn[7:4]), // inout[3:0]
`elsif LWIR
.sns4_dp40 (sns4_dp[4:0]), // input[4:0]
.sns4_dn40 (sns4_dn[4:0]), // input[4:0]
.sns4_dp5 (sns4_dp[5]), // inout differential
.sns4_dn5 (sns4_dn[5]), // inout differential
.sns4_dp76 (sns4_dp[7:6]), // inout[7:6]
.sns4_dn76 (sns4_dn[7:6]), // inout[7:6]
`else
.sns4_dp (sns4_dp), // inout[7:0] {PX_MRST, PXD8, PXD6, PXD4, PXD2, PXD0, PX_HACT, PX_DCLK}
.sns4_dn (sns4_dn), // inout[7:0] {PX_ARST, PXD9, PXD7, PXD5, PXD3, PXD1, PX_VACT, PX_BPF}
......@@ -1581,10 +1759,23 @@ simul_axi_hp_wr #(
.MS_PERIOD (25) // 1us instead of 1 ms
) simul_lwir160x120_vospi_i (
.mclk (x393_i.ps7_i.SAXIHP0ACLK), // PX1_MCLK), // input temporarily made faster
.nrst ( PX1_MRST), // input
.sck ( 1'b0), // input
.ncs ( 1'b0), // inout
.miso ( lwir1_miso), // output
.mrst ( PX1_MRST), // input
.pwdn (1'b1), // input
.spi_clk ( 1'b0), // input
.spi_cs ( 1'b0), // inout
.spi_miso ( lwir1_miso), // output
.spi_mosi ( 1'bz), // input
.gpio0 (), // inout
.gpio1 (), // inout
.gpio2 (), // inout
.gpio3 (), // inout
.i2c_scl (), // input
.i2c_sda (), // inout
.mipi_dp (), // output
.mipi_dn (), // output
.mipi_clkp (), // output
.mipi_clkn (), // output
.telemetry_rev ( 16'h7654), // input[15:0]
.telemetry_status ( 32'h137f1248), // input[31:0]
.telemetry_srev (64'h0123456789abcdef), // input[63:0]
......@@ -1601,6 +1792,186 @@ simul_axi_hp_wr #(
.telemetry_video_format (32'haaaa5555) // input[31:0]
);
`ifdef LWIR
simul_lwir160x120_vospi #(
.DATA_FILE (LWIR_DATA_FILE1),
.WINDOW_WIDTH (LWIR_WINDOW_WIDTH),
.WINDOW_HEIGHT (LWIR_WINDOW_HEIGHT),
.LWIR_GPIO_IN (LWIR_GPIO_IN),
.TELEMETRY (LWIR_TELEMETRY), // 1),
.FRAME_PERIOD (LWIR_FRAME_PERIOD),
.FRAME_DELAY (LWIR_FRAME_DELAY),
.MS_PERIOD (LWIR_MS_PERIOD) // 1us instead of 1 ms
) simul_lwir160x120_vospi1_i (
.mclk (LWIR1_MCLK), // input
.mrst (LWIR1_MRST), // input
.pwdn (LWIR1_PWDN), // input
.spi_clk (LWIR1_SPI_CLK), // input
.spi_cs (LWIR1_SPI_CS), // inout
.spi_miso (LWIR1_SPI_MISO) , // output
.spi_mosi (LWIR1_SPI_MOSI), // input
.gpio0 (LWIR1_GPIO0), // inout
.gpio1 (LWIR1_GPIO1), // inout
.gpio2 (LWIR1_GPIO2), // inout
.gpio3 (LWIR1_GPIO3), // inout
.i2c_scl (sns1_scl), // input
.i2c_sda (sns1_sda), // inout
.mipi_dp (LWIR1_MIPI_DP), // output
.mipi_dn (LWIR1_MIPI_DN), // output
.mipi_clkp (LWIR1_MIPI_CLKP), // output
.mipi_clkn (LWIR1_MIPI_CLKN), // output
.telemetry_rev (LWIR_TELEMETRY_REV), // input[15:0]
.telemetry_status (LWIR_TELEMETRY_STATUS), // input[31:0]
.telemetry_srev (LWIR_TELEMETRY_SREV), // input[63:0]
.telemetry_temp_counts (LWIR_TELEMETRY_TEMP_COUTS), // input[15:0]
.telemetry_temp_kelvin (LWIR_TELEMETRY_TEMP_KELVIN), // input[15:0]
.telemetry_temp_last_kelvin (LWIR_TELEMETRY_TEMP_LAST_KELVIN),// input[15:0]
.telemetry_time_last_ms (LWIR_TELEMETRY_TIME_LAST_MS), // input[31:0]
.telemetry_agc_roi_top (LWIR_TELEMETRY_AGC_ROI_TOP), // input[15:0]
.telemetry_agc_roi_left (LWIR_TELEMETRY_AGC_ROI_LEFT), // input[15:0]
.telemetry_agc_roi_bottom (LWIR_TELEMETRY_AGC_ROI_BOTTOM), // input[15:0]
.telemetry_agc_roi_right (LWIR_TELEMETRY_AGC_ROI_RIGHT), // input[15:0]
.telemetry_agc_high (LWIR_TELEMETRY_AGC_HIGH), // input[15:0]
.telemetry_agc_low (LWIR_TELEMETRY_AGC_LOW), // input[15:0]
.telemetry_video_format (LWIR_TELEMETRY_VIDEO_FORMAT) // input[31:0]
);
simul_lwir160x120_vospi #(
.DATA_FILE (LWIR_DATA_FILE2),
.WINDOW_WIDTH (LWIR_WINDOW_WIDTH),
.WINDOW_HEIGHT (LWIR_WINDOW_HEIGHT),
.LWIR_GPIO_IN (LWIR_GPIO_IN),
.TELEMETRY (LWIR_TELEMETRY), // 1),
.FRAME_PERIOD (LWIR_FRAME_PERIOD),
.FRAME_DELAY (LWIR_FRAME_DELAY),
.MS_PERIOD (LWIR_MS_PERIOD) // 1us instead of 1 ms
) simul_lwir160x120_vospi2_i (
.mclk (LWIR2_MCLK), // input
.mrst (LWIR2_MRST), // input
.pwdn (LWIR2_PWDN), // input
.spi_clk (LWIR2_SPI_CLK), // input
.spi_cs (LWIR2_SPI_CS), // inout
.spi_miso (LWIR2_SPI_MISO) , // output
.spi_mosi (LWIR2_SPI_MOSI), // input
.gpio0 (LWIR2_GPIO0), // inout
.gpio1 (LWIR2_GPIO1), // inout
.gpio2 (LWIR2_GPIO2), // inout
.gpio3 (LWIR2_GPIO3), // inout
.i2c_scl (sns2_scl), // input
.i2c_sda (sns2_sda), // inout
.mipi_dp (LWIR2_MIPI_DP), // output
.mipi_dn (LWIR2_MIPI_DN), // output
.mipi_clkp (LWIR2_MIPI_CLKP), // output
.mipi_clkn (LWIR2_MIPI_CLKN), // output
.telemetry_rev (LWIR_TELEMETRY_REV), // input[15:0]
.telemetry_status (LWIR_TELEMETRY_STATUS), // input[31:0]
.telemetry_srev (LWIR_TELEMETRY_SREV), // input[63:0]
.telemetry_temp_counts (LWIR_TELEMETRY_TEMP_COUTS), // input[15:0]
.telemetry_temp_kelvin (LWIR_TELEMETRY_TEMP_KELVIN), // input[15:0]
.telemetry_temp_last_kelvin (LWIR_TELEMETRY_TEMP_LAST_KELVIN),// input[15:0]
.telemetry_time_last_ms (LWIR_TELEMETRY_TIME_LAST_MS), // input[31:0]
.telemetry_agc_roi_top (LWIR_TELEMETRY_AGC_ROI_TOP), // input[15:0]
.telemetry_agc_roi_left (LWIR_TELEMETRY_AGC_ROI_LEFT), // input[15:0]
.telemetry_agc_roi_bottom (LWIR_TELEMETRY_AGC_ROI_BOTTOM), // input[15:0]
.telemetry_agc_roi_right (LWIR_TELEMETRY_AGC_ROI_RIGHT), // input[15:0]
.telemetry_agc_high (LWIR_TELEMETRY_AGC_HIGH), // input[15:0]
.telemetry_agc_low (LWIR_TELEMETRY_AGC_LOW), // input[15:0]
.telemetry_video_format (LWIR_TELEMETRY_VIDEO_FORMAT) // input[31:0]
);
simul_lwir160x120_vospi #(
.DATA_FILE (LWIR_DATA_FILE3),
.WINDOW_WIDTH (LWIR_WINDOW_WIDTH),
.WINDOW_HEIGHT (LWIR_WINDOW_HEIGHT),
.TELEMETRY (LWIR_TELEMETRY), // 1),
.LWIR_GPIO_IN (LWIR_GPIO_IN),
.FRAME_PERIOD (LWIR_FRAME_PERIOD),
.FRAME_DELAY (LWIR_FRAME_DELAY),
.MS_PERIOD (LWIR_MS_PERIOD) // 1us instead of 1 ms
) simul_lwir160x120_vospi3_i (
.mclk (LWIR3_MCLK), // input
.mrst (LWIR3_MRST), // input
.pwdn (LWIR3_PWDN), // input
.spi_clk (LWIR3_SPI_CLK), // input
.spi_cs (LWIR3_SPI_CS), // inout
.spi_miso (LWIR3_SPI_MISO) , // output
.spi_mosi (LWIR3_SPI_MOSI), // input
.gpio0 (LWIR3_GPIO0), // inout
.gpio1 (LWIR3_GPIO1), // inout
.gpio2 (LWIR3_GPIO2), // inout
.gpio3 (LWIR3_GPIO3), // inout
.i2c_scl (sns3_scl), // input
.i2c_sda (sns3_sda), // inout
.mipi_dp (LWIR3_MIPI_DP), // output
.mipi_dn (LWIR3_MIPI_DN), // output
.mipi_clkp (LWIR3_MIPI_CLKP), // output
.mipi_clkn (LWIR3_MIPI_CLKN), // output
.telemetry_rev (LWIR_TELEMETRY_REV), // input[15:0]
.telemetry_status (LWIR_TELEMETRY_STATUS), // input[31:0]
.telemetry_srev (LWIR_TELEMETRY_SREV), // input[63:0]
.telemetry_temp_counts (LWIR_TELEMETRY_TEMP_COUTS), // input[15:0]
.telemetry_temp_kelvin (LWIR_TELEMETRY_TEMP_KELVIN), // input[15:0]
.telemetry_temp_last_kelvin (LWIR_TELEMETRY_TEMP_LAST_KELVIN),// input[15:0]
.telemetry_time_last_ms (LWIR_TELEMETRY_TIME_LAST_MS), // input[31:0]
.telemetry_agc_roi_top (LWIR_TELEMETRY_AGC_ROI_TOP), // input[15:0]
.telemetry_agc_roi_left (LWIR_TELEMETRY_AGC_ROI_LEFT), // input[15:0]
.telemetry_agc_roi_bottom (LWIR_TELEMETRY_AGC_ROI_BOTTOM), // input[15:0]
.telemetry_agc_roi_right (LWIR_TELEMETRY_AGC_ROI_RIGHT), // input[15:0]
.telemetry_agc_high (LWIR_TELEMETRY_AGC_HIGH), // input[15:0]
.telemetry_agc_low (LWIR_TELEMETRY_AGC_LOW), // input[15:0]
.telemetry_video_format (LWIR_TELEMETRY_VIDEO_FORMAT) // input[31:0]
);
simul_lwir160x120_vospi #(
.DATA_FILE (LWIR_DATA_FILE4),
.WINDOW_WIDTH (LWIR_WINDOW_WIDTH),
.WINDOW_HEIGHT (LWIR_WINDOW_HEIGHT),
.LWIR_GPIO_IN (LWIR_GPIO_IN),
.TELEMETRY (LWIR_TELEMETRY), // 1),
.FRAME_PERIOD (LWIR_FRAME_PERIOD),
.FRAME_DELAY (LWIR_FRAME_DELAY),
.MS_PERIOD (LWIR_MS_PERIOD) // 1us instead of 1 ms
) simul_lwir160x120_vospi4_i (
.mclk (LWIR4_MCLK), // input
.mrst (LWIR4_MRST), // input
.pwdn (LWIR4_PWDN), // input
.spi_clk (LWIR4_SPI_CLK), // input
.spi_cs (LWIR4_SPI_CS), // inout
.spi_miso (LWIR4_SPI_MISO) , // output
.spi_mosi (LWIR4_SPI_MOSI), // input
.gpio0 (LWIR4_GPIO0), // inout
.gpio1 (LWIR4_GPIO1), // inout
.gpio2 (LWIR4_GPIO2), // inout
.gpio3 (LWIR4_GPIO3), // inout
.i2c_scl (sns4_scl), // input
.i2c_sda (sns4_sda), // inout
.mipi_dp (LWIR4_MIPI_DP), // output
.mipi_dn (LWIR4_MIPI_DN), // output
.mipi_clkp (LWIR4_MIPI_CLKN), // output
.mipi_clkn (LWIR4_MIPI_CLKP), // output
.telemetry_rev (LWIR_TELEMETRY_REV), // input[15:0]
.telemetry_status (LWIR_TELEMETRY_STATUS), // input[31:0]
.telemetry_srev (LWIR_TELEMETRY_SREV), // input[63:0]
.telemetry_temp_counts (LWIR_TELEMETRY_TEMP_COUTS), // input[15:0]
.telemetry_temp_kelvin (LWIR_TELEMETRY_TEMP_KELVIN), // input[15:0]
.telemetry_temp_last_kelvin (LWIR_TELEMETRY_TEMP_LAST_KELVIN),// input[15:0]
.telemetry_time_last_ms (LWIR_TELEMETRY_TIME_LAST_MS), // input[31:0]
.telemetry_agc_roi_top (LWIR_TELEMETRY_AGC_ROI_TOP), // input[15:0]
.telemetry_agc_roi_left (LWIR_TELEMETRY_AGC_ROI_LEFT), // input[15:0]
.telemetry_agc_roi_bottom (LWIR_TELEMETRY_AGC_ROI_BOTTOM), // input[15:0]
.telemetry_agc_roi_right (LWIR_TELEMETRY_AGC_ROI_RIGHT), // input[15:0]
.telemetry_agc_high (LWIR_TELEMETRY_AGC_HIGH), // input[15:0]
.telemetry_agc_low (LWIR_TELEMETRY_AGC_LOW), // input[15:0]
.telemetry_video_format (LWIR_TELEMETRY_VIDEO_FORMAT) // input[31:0]
);
`endif
simul_sensor12bits #(
.SENSOR_IMAGE_TYPE (SENSOR_IMAGE_TYPE0),
.lline (VIRTUAL_WIDTH), // SENSOR12BITS_LLINE),
......
sensor/sensor_channel.v
View file @ 4714de19
......@@ -191,7 +191,8 @@ module sensor_channel#(
parameter SENSIO_WIDTH = 'h3, // 1.. 2^16, 0 - use HACT
`endif
parameter SENSIO_DELAYS = 'h4, // 'h4..'h7
`ifdef MON_HISPI
`ifdef HISPI
`ifdef MON_HISPI
parameter SENSOR_TIMING_STATUS_REG_BASE = 'h40, // 4 locations" x40, x41, x42, x43
parameter SENSOR_TIMING_STATUS_REG_INC = 1, // increment to the next sensor
parameter SENSOR_TIMING_BITS = 24, // increment to the next sensor
......@@ -199,6 +200,7 @@ module sensor_channel#(
parameter SENSOR_TIMING_LANE = 14, // 15:14 - select lane
parameter SENSOR_TIMING_FROM = 12, // select from 0 - sof, 1 - sol, 2 - eof, 3 eol
parameter SENSOR_TIMING_TO = 10, // select to 0 - sof, 1 - sol, 2 - eof, 3 eol
`endif
`endif
// 4 of 8-bit delays per register
......@@ -226,10 +228,12 @@ module sensor_channel#(
parameter NUM_FRAME_BITS = 4,
`ifndef HISPI
`ifndef LWIR
//sensor_fifo parameters
parameter SENSOR_DATA_WIDTH = 12,
parameter SENSOR_FIFO_2DEPTH = 4,
parameter [3:0] SENSOR_FIFO_DELAY = 5, // 7,
`endif
`endif
// sens_parallel12 other parameters
......@@ -314,6 +318,7 @@ module sensor_channel#(
input pclk2x, // global clock input, double pixel rate (192MHz for MT9P006)
`endif
input mrst, // @posedge mclk, sync reset
input prst, // @posedge pclk, sync reset
// I/O pads, pin names match circuit diagram
......@@ -324,6 +329,16 @@ module sensor_channel#(
inout [7:4] sns_dn74,
input sns_clkp,
input sns_clkn,
`elsif LWIR
input [ 4:0] sns_dp40,
input [ 4:0] sns_dn40,
inout sns_dp5, // diff MIPI signals (not yet implemented)
inout sns_dn5, // diff MIPI signals (not yet implemented)
inout [ 7:6] sns_dp76,
inout [ 7:6] sns_dn76,
input sns_clkp,
input sns_clkn,
`else
inout [7:0] sns_dp,
inout [7:0] sns_dn,
......@@ -393,8 +408,10 @@ module sensor_channel#(
// parameter SENSOR_TIMING_STATUS_REG_BASE = 'h40, // 4 locations" x40, x41, x42, x43
// parameter SENSOR_TIMING_STATUS_REG_INC = 1, // increment to the next sensor
`ifdef MON_HISPI
`ifdef HISPI
`ifdef MON_HISPI
localparam SENSOR_TIMING_STATUS_REG = (SENSOR_TIMING_STATUS_REG_BASE + SENSOR_NUMBER * SENSOR_TIMING_STATUS_REG_INC);
`endif
`endif
localparam SENS_SYNC_ADDR = SENSOR_BASE_ADDR + SENS_SYNC_RADDR;
// parameter SENSOR_BASE_ADDR = 'h300; // sensor registers base address
......@@ -421,14 +438,20 @@ module sensor_channel#(
wire sens_phys_status_rq;
wire sens_phys_status_start;
`ifndef HISPI
`ifndef HISPI
`ifndef LWIR
wire ipclk; // Use in FIFO
wire [11:0] pxd_to_fifo;
wire vact_to_fifo; // frame active @posedge ipclk
wire hact_to_fifo; // line active @posedge ipclk
`endif
`endif
// data from FIFO
`ifdef LWIR
wire [15:0] pxd; // TODO: align MSB? parallel data, @posedge ipclk
`else
wire [11:0] pxd; // TODO: align MSB? parallel data, @posedge ipclk
`endif
wire hact; // line active @posedge ipclk
wire sof; // start of frame
wire eof; // end of frame
......@@ -478,13 +501,19 @@ module sensor_channel#(
reg dav_r;
wire [15:0] dout_w;
wire dav_w;
//`ifndef LWIR
wire trig;
//`endif
wire prsts; // @pclk - includes sensor reset and sensor PLL reset
reg sof_out_r;
reg eof_out_r;
wire prsts; // @pclk - includes sensor reset and sensor PLL reset
// TODO: insert vignetting and/or flat field, pixel defects before gamma_*_in
`ifdef LWIR
assign lens_pxd_in = pxd[15:0];
`else
assign lens_pxd_in = {pxd[11:0],4'b0};
`endif
assign lens_hact_in = hact;
assign lens_sof_in = sof_out_sync; // sof;
assign lens_eof_in = eof;
......@@ -532,6 +561,8 @@ module sensor_channel#(
else if (sof) vact_cntr <= vact_cntr + 1;
end
`elsif LWIR
// Something here?
`else
always @(posedge ipclk) begin
vact_to_fifo_r <= vact_to_fifo;
......@@ -568,6 +599,8 @@ module sensor_channel#(
lens_pxd_in, gamma_pxd_in[15:0],
`ifdef HISPI
12'b0,
`elsif LWIR
12'b0,
`else
pxd_to_fifo[11:0],
`endif
......@@ -705,6 +738,8 @@ module sensor_channel#(
// assign status_alive = {last_in_line_1cyc_mclk, dout_valid_1cyc_mclk, alive_hist0_gr, alive_hist0_rq, sof_out_mclk, eof_mclk, sof_mclk, sol_mclk};
// assign status_alive = {last_in_line_1cyc_mclk, dout_valid_1cyc_mclk, debug_hist_mclk[0], alive_hist0_rq, sof_out_mclk, eof_mclk, sof_mclk, sol_mclk};
`ifndef HISPI
localparam STATUS_ALIVE_WIDTH = 8;
`ifndef LWIR
reg hact_r; // hact delayed by 1 cycle to generate start pulse
reg dout_valid_d_pclk; //@ pclk - delayed by 1 clk from dout_valid to detect edge
reg last_in_line_d_pclk; //@ pclk - delayed by 1 clk from last_in_line to detect edge
......@@ -712,15 +747,11 @@ module sensor_channel#(
reg hist_gr0_r;
wire sol_mclk;
wire sof_mclk;
// wire eof_mclk;
wire alive_hist0_rq = hist_rq[0] && !hist_rq0_r;
wire alive_hist0_gr = hist_gr[0] && !hist_gr0_r;
// sof_out_mclk - already exists
wire dout_valid_1cyc_mclk;
wire last_in_line_1cyc_mclk;
// wire [3:0] debug_hist_mclk;
wire irst; // @ posedge ipclk
localparam STATUS_ALIVE_WIDTH = 8;
wire [STATUS_ALIVE_WIDTH - 1 : 0] status_alive;
assign status_alive = {last_in_line_1cyc_mclk, dout_valid_1cyc_mclk, alive_hist0_gr, alive_hist0_rq,
sof_out_mclk, eof_mclk, sof_mclk, sol_mclk};
......@@ -779,9 +810,10 @@ module sensor_channel#(
.out_pulse (last_in_line_1cyc_mclk), // output
.busy() // output
);
`endif
`endif
`ifndef LWIR
pulse_cross_clock pulse_cross_clock_eof_mclk_i (
.rst (prsts), // input extended to include sensor reset and rst_mmcm
.src_clk (pclk), // input
......@@ -790,7 +822,7 @@ module sensor_channel#(
.out_pulse (eof_mclk), // output
.busy() // output
);
`endif
`ifdef HISPI
......@@ -898,7 +930,90 @@ module sensor_channel#(
.sof (sof), // output
.eof (eof) // output
);
`elsif LWIR
sens_lepton3 #(
.SENSIO_ADDR (SENSIO_ADDR),
.SENSIO_ADDR_MASK (SENSIO_ADDR_MASK),
.SENSIO_CTRL (SENSIO_CTRL),
.SENSIO_STATUS (SENSIO_STATUS),
.SENSIO_JTAG (SENSIO_JTAG),
.SENSIO_WIDTH (SENSIO_WIDTH),
.SENSIO_DELAYS (SENSIO_DELAYS),
.SENSIO_STATUS_REG (SENSIO_STATUS_REG),
.SENS_JTAG_PGMEN (SENS_JTAG_PGMEN),
.SENS_JTAG_PROG (SENS_JTAG_PROG),
.SENS_JTAG_TCK (SENS_JTAG_TCK),
.SENS_JTAG_TMS (SENS_JTAG_TMS),
.SENS_JTAG_TDI (SENS_JTAG_TDI),
.SENS_CTRL_MRST (SENS_CTRL_MRST),
.SENS_CTRL_ARST (SENS_CTRL_ARST),
.SENS_CTRL_ARO (SENS_CTRL_ARO),
.SENS_CTRL_RST_MMCM (SENS_CTRL_RST_MMCM),
.SENS_CTRL_EXT_CLK (SENS_CTRL_EXT_CLK),
.SENS_CTRL_LD_DLY (SENS_CTRL_LD_DLY),
.SENS_CTRL_QUADRANTS (SENS_CTRL_QUADRANTS),
.SENS_CTRL_ODD (SENS_CTRL_ODD),
.SENS_CTRL_QUADRANTS_WIDTH (SENS_CTRL_QUADRANTS_WIDTH),
.SENS_CTRL_QUADRANTS_EN (SENS_CTRL_QUADRANTS_EN),
.IODELAY_GRP (IODELAY_GRP),
.IDELAY_VALUE (IDELAY_VALUE),
.PXD_DRIVE (PXD_DRIVE),
.PXD_IOSTANDARD (PXD_IOSTANDARD),
.PXD_SLEW (PXD_SLEW),
.SENS_REFCLK_FREQUENCY (SENS_REFCLK_FREQUENCY),
.SENS_HIGH_PERFORMANCE_MODE (SENS_HIGH_PERFORMANCE_MODE),
.SENS_PHASE_WIDTH (SENS_PHASE_WIDTH),
.SENS_BANDWIDTH (SENS_BANDWIDTH),
.CLKIN_PERIOD_SENSOR (CLKIN_PERIOD_SENSOR),
.CLKFBOUT_MULT_SENSOR (CLKFBOUT_MULT_SENSOR),
.CLKFBOUT_PHASE_SENSOR (CLKFBOUT_PHASE_SENSOR),
.IPCLK_PHASE (IPCLK_PHASE),
.IPCLK2X_PHASE (IPCLK2X_PHASE),
.PXD_IBUF_LOW_PWR (PXD_IBUF_LOW_PWR),
.BUF_IPCLK (BUF_IPCLK),
.BUF_IPCLK2X (BUF_IPCLK2X),
.SENS_DIVCLK_DIVIDE (SENS_DIVCLK_DIVIDE),
.SENS_REF_JITTER1 (SENS_REF_JITTER1),
.SENS_REF_JITTER2 (SENS_REF_JITTER2),
.SENS_SS_EN (SENS_SS_EN),
.SENS_SS_MODE (SENS_SS_MODE),
.SENS_SS_MOD_PERIOD (SENS_SS_MOD_PERIOD),
.STATUS_ALIVE_WIDTH (STATUS_ALIVE_WIDTH)
) sens_lepton3_i (
.mrst (mrst), // input
.mclk (mclk), // input
.cmd_ad (cmd_ad), // input[7:0]
.cmd_stb (cmd_stb), // input
.status_ad (sens_phys_status_ad), // output[7:0]
.status_rq (sens_phys_status_rq), // output
.status_start (sens_phys_status_start), // input
.prst (prst), // input
.prsts (prsts), // output
.pclk (pclk), // input
.sns_mclk(), // input
.spi_miso (sns_dp40[0]), // inout
.spi_mosi (sns_dn40[0]), // inout
.spi_cs (sns_dp40[1]), // inout
.spi_clk (sns_dn40[1]), // inout
.gpio ({sns_dp40[4], sns_dn40[4], sns_dp40[3], sns_dn40[3]}), // inout [3:0]
.lwir_mclk (sns_dp76[6]), // inout
.lwir_mrst (sns_dp76[7]), // inout
.lwir_pwdn (sns_dn76[7]), // inout
.mipi_dp (sns_dp5), // inout
.mipi_dn (sns_dn5), // inout
.mipi_clkp (sns_clkp), // inout
.mipi_clkn (sns_clkn), // inout
.senspgm (sns_pg), // inout // detect sesnor (pin7 grounded)
.sns_ctl (sns_ctl), // not used at all
.pxd (pxd[15:0]), // output[15:0]
.hact (hact), // output
.sof (sof), // output
.eof (eof) // output
);
// sns_dn76[6] - not used
// sns_dn40[2] - not used
// sns_dp40[2] - not used
`else
sens_parallel12 #(
.SENSIO_ADDR (SENSIO_ADDR),
......@@ -1006,6 +1121,8 @@ module sensor_channel#(
.eof (eof) // output @posedge pclk
);
`endif
//`ifndef LWIR
sens_sync #(
.SENS_SYNC_ADDR (SENS_SYNC_ADDR),
.SENS_SYNC_MASK (SENS_SYNC_MASK),
......@@ -1035,6 +1152,7 @@ module sensor_channel#(
.cmd_ad (cmd_ad), // input[7:0]
.cmd_stb (cmd_stb) // input
);
//`endif
lens_flat393 #(
.SENS_LENS_ADDR (SENS_LENS_ADDR),
......@@ -1065,7 +1183,6 @@ module sensor_channel#(
.SENS_LENS_A_WIDTH (19),
.SENS_LENS_B_WIDTH (21)
) lens_flat393_i (
// .prst (prst), // input
.prst (prsts), // input extended to include sensor reset and rst_mmcm
.pclk (pclk), // input
.mrst (mrst), // input
......@@ -1104,11 +1221,9 @@ module sensor_channel#(
.SENS_GAMMA_MODE_REPET_SET (SENS_GAMMA_MODE_REPET_SET),
.SENS_GAMMA_MODE_TRIG (SENS_GAMMA_MODE_TRIG)
) sens_gamma_i (
// .rst (rst), // input
.pclk (pclk), // input
.mrst (mrst), // input
// .prst (prst), // input
.prst (prsts), // input extended to include sensor reset and rst_mmcm
.mrst (mrst), // input
.prst (prsts), // input extended to include sensor reset and rst_mmcm
.pxd_in (gamma_pxd_in), // input[15:0]
.hact_in (gamma_hact_in), // input
.sof_in (gamma_sof_in), // input
......
sensor/sensors393.v
View file @ 4714de19
......@@ -363,6 +363,15 @@ module sensors393 #(
inout [15:0] sns_dn74, // SuppressThisWarning all - unused yet
input [3:0] sns_clkp, // SuppressThisWarning all - input-only in HiSPi mode
input [3:0] sns_clkn, // SuppressThisWarning all - input-only in HiSPi mode
`elsif LWIR
input [19:0] sns_dp40,
input [19:0] sns_dn40,
inout [ 3:0] sns_dp5, // diff MIPI signals (not yet implemented)
inout [ 3:0] sns_dn5, // diff MIPI signals (not yet implemented)
inout [ 7:0] sns_dp76,
inout [ 7:0] sns_dn76,
input [ 3:0] sns_clkp,
input [ 3:0] sns_clkn,
`else
inout [31:0] sns_dp,
inout [31:0] sns_dn,
......@@ -706,6 +715,15 @@ module sensors393 #(
.sns_dn74 (sns_dn74[i * 4 +: 4]), // input[3:0]
.sns_clkp (sns_clkp[i]), // input
.sns_clkn (sns_clkn[i]), // input
`elsif LWIR
.sns_dp40 (sns_dp40[i * 5 +: 5]), // input[4:0]
.sns_dn40 (sns_dn40[i * 5 +: 5]), // input[4:0]
.sns_dp5 (sns_dp5[i]), // inout
.sns_dn5 (sns_dn5[i]), // inout
.sns_dp76 (sns_dp76[i * 2 +: 2]), // inout[7:6]
.sns_dn76 (sns_dn76[i * 2 +: 2]), // inout[7:6]
.sns_clkp (sns_clkp[i]), // input
.sns_clkn (sns_clkn[i]), // input
`else
.sns_dp (sns_dp[i * 8 +: 8]), // inout[7:0]
.sns_dn (sns_dn[i * 8 +: 8]), // inout[7:0]
......
system_defines.vh
View file @ 4714de19
......@@ -64,6 +64,7 @@
`define PRELOAD_BRAMS
`define DISPLAY_COMPRESSED_DATA
// if HISPI is not defined, parallel sensor interface is used for all channels
`define LWIR /*************** CHANGE here and x393_hispi/x393_parallel/x393_lwir in bitstream tool settings ****************/
// `define HISPI /*************** CHANGE here and x393_hispi/x393_parallel in bitstream tool settings ****************/
`define MON_HISPI // Measure HISPI timing
// `define USE_OLD_XDCT393
......
x393.v
View file @ 4714de19
......@@ -87,7 +87,60 @@ module x393 #(
inout sns4_sda,
inout sns4_ctl,
inout sns4_pg,
`else
`elsif LWIR
input [4:0] sns1_dp40,
input [4:0] sns1_dn40,
inout sns1_dp5, // diff MIPI signals (not yet implemented)
inout sns1_dn5, // diff MIPI signals (not yet implemented)
inout [7:6] sns1_dp76,
inout [7:6] sns1_dn76,
input sns1_clkp,
input sns1_clkn,
inout sns1_scl,
inout sns1_sda,
inout sns1_ctl,
inout sns1_pg,
input [4:0] sns2_dp40,
input [4:0] sns2_dn40,
inout sns2_dp5, // diff MIPI signals (not yet implemented)
inout sns2_dn5, // diff MIPI signals (not yet implemented)
inout [7:6] sns2_dp76,
inout [7:6] sns2_dn76,
input sns2_clkp,
input sns2_clkn,
inout sns2_scl,
inout sns2_sda,
inout sns2_ctl,
inout sns2_pg,
input [4:0] sns3_dp40,
input [4:0] sns3_dn40,
inout sns3_dp5, // diff MIPI signals (not yet implemented)
inout sns3_dn5, // diff MIPI signals (not yet implemented)
inout [7:6] sns3_dp76,
inout [7:6] sns3_dn76,
input sns3_clkp,
input sns3_clkn,
inout sns3_scl,
inout sns3_sda,
inout sns3_ctl,
inout sns3_pg,
input [4:0] sns4_dp40,
input [4:0] sns4_dn40,
inout sns4_dp5, // diff MIPI signals (not yet implemented)
inout sns4_dn5, // diff MIPI signals (not yet implemented)
inout [7:6] sns4_dp76,
inout [7:6] sns4_dn76,
input sns4_clkp,
input sns4_clkn,
inout sns4_scl,
inout sns4_sda,
inout sns4_ctl,
inout sns4_pg,
`else // parallel
inout [7:0] sns1_dp,
inout [7:0] sns1_dn,
inout sns1_clkp,
......@@ -1883,22 +1936,26 @@ assign axi_grst = axi_rst_pre;
.sns_dn ({sns4_dn, sns3_dn, sns2_dn, sns1_dn}), // input[3:0]
.sns_dp74 ({sns4_dp74, sns3_dp74, sns2_dp74, sns1_dp74}), // inout[7:4] @SuppressThisWarning VEditor vdt-bug
.sns_dn74 ({sns4_dn74, sns3_dn74, sns2_dn74, sns1_dn74}), // inout[7:4] @SuppressThisWarning VEditor vdt-bug
.sns_clkp ({sns4_clkp, sns3_clkp, sns2_clkp, sns1_clkp}), // input
.sns_clkn ({sns4_clkn, sns3_clkn, sns2_clkn, sns1_clkn}), // input
.sns_scl ({sns4_scl, sns3_scl, sns2_scl, sns1_scl}), // inout
.sns_sda ({sns4_sda, sns3_sda, sns2_sda, sns1_sda}), // inout
.sns_ctl ({sns4_ctl, sns3_ctl, sns2_ctl, sns1_ctl}), // inout
.sns_pg ({sns4_pg, sns3_pg, sns2_pg, sns1_pg}), // inout
`elsif LWIR
.sns_dp40 ({sns4_dp40, sns3_dp40, sns2_dp40, sns1_dp40}), // input[19:0]
.sns_dn40 ({sns4_dn40, sns3_dn40, sns2_dn40, sns1_dn40}), // input[19:0]
.sns_dp5 ({sns4_dp5, sns3_dp5, sns2_dp5, sns1_dp5 }), // inout[3:0]
.sns_dn5 ({sns4_dn5, sns3_dn5, sns2_dn5, sns1_dn5 }), // inout[3:0]
.sns_dp76 ({sns4_dp76[7:6], sns3_dp76[7:6], sns2_dp76[7:6], sns1_dp76[7:6]}), // inout[7:0]
.sns_dn76 ({sns4_dn76[7:6], sns3_dn76[7:6], sns2_dn76[7:6], sns1_dn76[7:6]}), // inout[7:0]
`else
.sns_dp ({sns4_dp, sns3_dp, sns2_dp, sns1_dp}), // inout[7:0]
.sns_dn ({sns4_dn, sns3_dn, sns2_dn, sns1_dn}), // inout[7:0]
.sns_clkp ({sns4_clkp, sns3_clkp, sns2_clkp, sns1_clkp}), // inout
.sns_clkn ({sns4_clkn, sns3_clkn, sns2_clkn, sns1_clkn}), // inout
`endif
// sensor common i/O ports
.sns_clkp ({sns4_clkp, sns3_clkp, sns2_clkp, sns1_clkp}), // input
.sns_clkn ({sns4_clkn, sns3_clkn, sns2_clkn, sns1_clkn}), // input
.sns_scl ({sns4_scl, sns3_scl, sns2_scl, sns1_scl}), // inout
.sns_sda ({sns4_sda, sns3_sda, sns2_sda, sns1_sda}), // inout
.sns_ctl ({sns4_ctl, sns3_ctl, sns2_ctl, sns1_ctl}), // inout
.sns_pg ({sns4_pg, sns3_pg, sns2_pg, sns1_pg}), // inout
`endif
.frame_run_mclk (sens_frame_run), // input [3:0] - enable sensor data to memory buffer
.rpage_set (sens_rpage_set), // input
.rpage_next (sens_rpage_next), // input
......
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