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x393
Commit 3f49ecae authored by Andrey Filippov's avatar Andrey Filippov
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typo

parent 51a31706
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Showing with 3 additions and 4 deletions
py393/x393_export_c.py
View file @ 3f49ecae
......@@ -880,7 +880,6 @@ class X393ExportC(object):
(("X393_CMPRS_CBIT_CMODE_MONO1", "", vrlg.CMPRS_CBIT_CMODE_MONO1 , 0, None, None, "", "Mono JPEG (not yet implemented)")),
(("X393_CMPRS_CBIT_CMODE_MONO4", "", vrlg.CMPRS_CBIT_CMODE_MONO4 , 0, None, None, "", "Mono, 4 blocks (2x2 macroblocks)")),
(("X393_CMPRS_CBIT_CMODE_JPEG18", "", vrlg.CMPRS_CBIT_CMODE_JPEG18 , 0, None, None, "", "Color 4:2:0")),
(("X393_CMPRS_CBIT_CMODE_JPEG18", "", vrlg.CMPRS_CBIT_CMODE_JPEG18 , 0, None, None, "", "Color 4:2:0")),
(("X393_CMPRS_CBIT_FRAMES_SINGLE", "", vrlg.CMPRS_CBIT_FRAMES_SINGLE , 0, None, None, "", "Use single-frame buffer")),
(("X393_CMPRS_CBIT_FRAMES_MULTI", "", 1 , 0, None, None, "", "Use multi-frame buffer"))]
......@@ -1718,7 +1717,7 @@ class X393ExportC(object):
def _enc_i2c_tbl_addr(self):
dw=[]
dw.append(("tbl_addr", 0, 8,0, "Address/length in 64-bit words (<<3 to get byte address"))
dw.append(("tbl_addr", 0, 8,0, "Address/length in 64-bit words (<<3 to get byte address)"))
dw.append(("tbl_mode", vrlg.SENSI2C_CMD_TAND, 2,3, "Should be 3 to select table address write mode"))
return dw
......
x393.v
View file @ 3f49ecae
......@@ -318,7 +318,7 @@ module x393 #(
wire [7:0] cmd_root_ad; // multiplexed byte-wide serialized address/data to salve devices (AL-AH-D0-D1-D2-D3), may contain less cycles
wire [7:0] cmd_root_ad; // multiplexed byte-wide serialized address/data to slave devices (AL-AH-D0-D1-D2-D3), may contain less cycles
wire cmd_root_stb; // strobe marking the first of 1-6 a/d bytes and also data valid for par_waddr and par_data
wire [7:0] status_root_ad; // Root status byte-wide address/data
......@@ -884,7 +884,7 @@ assign axi_grst = axi_rst_pre;
.wr_en (axiwr_wen), // input
.wdata (axiwr_wdata[31:0]), // input[31:0]
.busy (axiwr_dev_busy), // output // assign axiwr_dev_ready = ~axiwr_dev_busy; //may combine (AND) multiple sources if needed
//TODO: The following is the interface to the command sequencer (not yet implemnted)
//TODO: The following is the interface to the command sequencer
.cseq_waddr (cseq_waddr), // input[12:0] // SuppressThisWarning VivadoSynthesis: [Synth 8-3295] tying undriven pin #cmd_mux_i:cseq_waddr[13:0] to constant 0 (command sequencer not yet implemented)
.cseq_wr_en (cseq_wr_en), // input // SuppressThisWarning VivadoSynthesis: [Synth 8-3295] tying undriven pin #cmd_mux_i:cseq_wr_en to constant 0 (command sequencer not yet implemented)
.cseq_wdata (cseq_wdata), // input[31:0] // SuppressThisWarning VivadoSynthesis: [Synth 8-3295] tying undriven pin #cmd_mux_i:cseq_wdata[31:0] to constant 0 (command sequencer not yet implemented)
......
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