debugging with debug ring (3bff174e) · Commits · Elphel / x393

.project

+14 −14

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		@@ -62,42 +62,42 @@
		<link>
		<name>vivado_logs/VivadoBitstream.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20150903211518672.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20150904164653967.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoOpt.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoOpt-20150903211518672.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoOpt-20150904164653967.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoOptPhys.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoOptPhys-20150903211518672.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoOptPhys-20150904164653967.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoOptPower.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoOptPower-20150903211518672.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoOptPower-20150904164653967.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoPlace.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoPlace-20150903211518672.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoPlace-20150904164653967.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoRoute.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoRoute-20150903211518672.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoRoute-20150904164653967.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoSynthesis.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoSynthesis-20150903211518672.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoSynthesis-20150904164653967.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoTimimgSummaryReportImplemented.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-20150903211518672.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-20150904164653967.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoTimimgSummaryReportSynthesis.log</name>
		@@ -107,32 +107,32 @@
		<link>
		<name>vivado_logs/VivadoTimingReportImplemented.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportImplemented-20150903211518672.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportImplemented-20150904164653967.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoTimingReportSynthesis.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportSynthesis-20150903211518672.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportSynthesis-20150904164653967.log</location>
		</link>
		<link>
		<name>vivado_state/x393-opt-phys.dcp</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_state/x393-opt-phys-20150903211518672.dcp</location>
		<location>/home/andrey/git/x393/vivado_state/x393-opt-phys-20150904164653967.dcp</location>
		</link>
		<link>
		<name>vivado_state/x393-place.dcp</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_state/x393-place-20150903211518672.dcp</location>
		<location>/home/andrey/git/x393/vivado_state/x393-place-20150904164653967.dcp</location>
		</link>
		<link>
		<name>vivado_state/x393-route.dcp</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_state/x393-route-20150903211518672.dcp</location>
		<location>/home/andrey/git/x393/vivado_state/x393-route-20150904164653967.dcp</location>
		</link>
		<link>
		<name>vivado_state/x393-synth.dcp</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_state/x393-synth-20150903211518672.dcp</location>
		<location>/home/andrey/git/x393/vivado_state/x393-synth-20150904164653967.dcp</location>
		</link>
		</linkedResources>
		</projectDescription>

.settings/com.elphel.vdt.iverilog.prefs

+3 −1

Original line number	Diff line number	Diff line
		com.elphel.store.context.iverilog=iverilog_81_TopModulesOther<-@\#\#@->iverilog_83_ExtraFiles<-@\#\#@->iverilog_88_ShowNoProblem<-@\#\#@->iverilog_77_Param_Exe<-@\#\#@->iverilog_78_VVP_Exe<-@\#\#@->iverilog_99_GrepFindErrWarn<-@\#\#@->iverilog_84_IncludeDir<-@\#\#@->iverilog_89_ShowNoProblem<-@\#\#@->iverilog_79_GtkWave_Exe<-@\#\#@->iverilog_98_GTKWaveSavFile<-@\#\#@->iverilog_100_TopModulesOther<-@\#\#@->iverilog_102_ExtraFiles<-@\#\#@->iverilog_103_IncludeDir<-@\#\#@->iverilog_101_TopModulesOther<-@\#\#@->iverilog_103_ExtraFiles<-@\#\#@->iverilog_104_IncludeDir<-@\#\#@->iverilog_113_SaveLogsSimulator<-@\#\#@->
		com.elphel.store.context.iverilog=iverilog_81_TopModulesOther<-@\#\#@->iverilog_83_ExtraFiles<-@\#\#@->iverilog_88_ShowNoProblem<-@\#\#@->iverilog_77_Param_Exe<-@\#\#@->iverilog_78_VVP_Exe<-@\#\#@->iverilog_99_GrepFindErrWarn<-@\#\#@->iverilog_84_IncludeDir<-@\#\#@->iverilog_89_ShowNoProblem<-@\#\#@->iverilog_79_GtkWave_Exe<-@\#\#@->iverilog_98_GTKWaveSavFile<-@\#\#@->iverilog_100_TopModulesOther<-@\#\#@->iverilog_102_ExtraFiles<-@\#\#@->iverilog_103_IncludeDir<-@\#\#@->iverilog_101_TopModulesOther<-@\#\#@->iverilog_103_ExtraFiles<-@\#\#@->iverilog_104_IncludeDir<-@\#\#@->iverilog_113_SaveLogsSimulator<-@\#\#@->iverilog_109_ShowNoProblem<-@\#\#@->iverilog_110_ShowWarnings<-@\#\#@->
		eclipse.preferences.version=1
		iverilog_100_TopModulesOther=glbl<-@\#\#@->
		iverilog_101_TopModulesOther=glbl<-@\#\#@->
		@@ -6,6 +6,8 @@ iverilog_102_ExtraFiles=glbl.v<-@\#\#@->
		iverilog_103_ExtraFiles=glbl.v<-@\#\#@->
		iverilog_103_IncludeDir=${verilog_project_loc}/includes<-@\#\#@->${verilog_project_loc}/includes<-@\#\#@->
		iverilog_104_IncludeDir=${verilog_project_loc}/ddr3<-@\#\#@->${verilog_project_loc}/includes<-@\#\#@->
		iverilog_109_ShowNoProblem=true
		iverilog_110_ShowWarnings=false
		iverilog_113_SaveLogsSimulator=true
		iverilog_77_Param_Exe=/usr/local/bin/iverilog
		iverilog_78_VVP_Exe=/usr/local/bin/vvp

compressor_jp/compressor393.v

+17 −1

Original line number	Diff line number	Diff line
		@@ -242,6 +242,13 @@ module compressor393 # (

		);

		`ifdef DEBUG_RING
		localparam DEBUG_RING_LENGTH = 4;
		wire [DEBUG_RING_LENGTH:0] debug_ring; // TODO: adjust number of bits
		assign debug_do = debug_ring[0];
		assign debug_ring[DEBUG_RING_LENGTH] = debug_di;
		`endif

		wire [47:0] status_ad_mux;
		wire [5:0] status_rq_mux;
		wire [5:0] status_start_mux;
		@@ -368,6 +375,9 @@ module compressor393 # (
		.CMPRS_CORING_BITS (CMPRS_CORING_BITS),
		.CMPRS_TIMEOUT_BITS (CMPRS_TIMEOUT_BITS),
		.CMPRS_TIMEOUT (CMPRS_TIMEOUT)
		`ifdef DEBUG_RING
		,.DEBUG_CMD_LATENCY (DEBUG_CMD_LATENCY)
		`endif
		) jp_channel_i (
		// .rst (rst), // input
		.xclk (xclk), // input
		@@ -417,6 +427,12 @@ module compressor393 # (
		.fifo_flush (fifo_flush[i]), // output
		.flush_hclk (flush_hclk[i]), // output
		.fifo_count (fifo_count[8* i +: 8]) // output[7:0]
		`ifdef DEBUG_RING
		,.debug_do (debug_ring[i]), // output
		.debug_sl (debug_sl), // output
		.debug_di (debug_ring[i+1]) // input
		`endif

		);
		end
		endgenerate

compressor_jp/jp_channel.v

+12 −1

Original line number	Diff line number	Diff line
		@@ -94,7 +94,9 @@ module jp_channel#(

		parameter CMPRS_TIMEOUT_BITS= 12,
		parameter CMPRS_TIMEOUT= 1000 // mclk cycles

		`ifdef DEBUG_RING
		,parameter DEBUG_CMD_LATENCY = 2 //SuppressThisWarning VEditor - not used
		`endif

		)(
		// input rst, // global reset
		@@ -171,7 +173,16 @@ module jp_channel#(
		output flush_hclk, // output before writing last chunk - use it to suspend AFI to have
		// last burst marked as the last one (otherwise last may be empty if frame had %4==0 chunks)
		output [7:0] fifo_count // number of 32-byte chunks in FIFO
		`ifdef DEBUG_RING
		,output debug_do, // output to the debug ring
		input debug_sl, // 0 - idle, (1,0) - shift, (1,1) - load // SuppressThisWarning VEditor - not used
		input debug_di // input from the debug ring
		`endif
		);
		`ifdef DEBUG_RING
		assign debug_do = debug_di; // just temporarily to short-circuit the ring
		`endif

		localparam CMPRS_ADDR = CMPRS_GROUP_ADDR + CMPRS_NUMBER * CMPRS_BASE_INC;
		localparam CMPRS_STATUS_REG_ADDR = CMPRS_STATUS_REG_BASE + CMPRS_NUMBER * CMPRS_STATUS_REG_INC;
		localparam CMPRS_HIFREQ_REG_ADDR = CMPRS_HIFREQ_REG_BASE + CMPRS_NUMBER * CMPRS_HIFREQ_REG_INC;

fpga_version.vh

+1 −1

Original line number	Diff line number	Diff line
		parameter FPGA_VERSION = 32'h0393000f;
		No newline at end of file
		parameter FPGA_VERSION = 32'h03930011;
		No newline at end of file

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