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Commit 35d52915 authored by Andrey Filippov's avatar Andrey Filippov
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adding strobe output for IMX-5 on ext-5 (0393401a)

parent d7392a0f
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cocotb/x393_cocotb_lwir_06.sav
View file @ 35d52915
[*] [*]
[*] GTKWave Analyzer v3.3.103 (w)1999-2019 BSI [*] GTKWave Analyzer v3.3.103 (w)1999-2019 BSI
[*] Tue Feb 14 19:38:19 2023 [*] Thu Feb 23 01:11:17 2023
[*] [*]
[dumpfile] "/home/elphel/git/x393/simulation/x393_dut-20230213165222653.fst" [dumpfile] "/home/elphel/git/x393/simulation/x393_dut-20230222154040957.fst"
[dumpfile_mtime] "Tue Feb 14 00:48:28 2023" [dumpfile_mtime] "Thu Feb 23 01:11:06 2023"
[dumpfile_size] 777646791 [dumpfile_size] 777621394
[savefile] "/home/elphel/git/x393/cocotb/x393_cocotb_lwir_06.sav" [savefile] "/home/elphel/git/x393/cocotb/x393_cocotb_lwir_06.sav"
[timestart] 0 [timestart] 0
[size] 1744 1144 [size] 1744 1144
[pos] 1920 74 [pos] 1920 74
*-27.278334 63200000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 *-27.275330 179557388 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] x393_dut. [treeopen] x393_dut.
[treeopen] x393_dut.i_simul_imx5. [treeopen] x393_dut.i_simul_imx5.
[treeopen] x393_dut.x393_i. [treeopen] x393_dut.x393_i.
...@@ -84,7 +84,7 @@ x393_dut.gpio_pins[9:0] ...@@ -84,7 +84,7 @@ x393_dut.gpio_pins[9:0]
-group_end -group_end
@1401200 @1401200
-simulation -simulation
@c00200 @800200
-other -other
@28 @28
x393_dut.sns1_ctl x393_dut.sns1_ctl
...@@ -158,6 +158,7 @@ x393_dut.x393_i.gpio_camsync[9:0] ...@@ -158,6 +158,7 @@ x393_dut.x393_i.gpio_camsync[9:0]
(9)x393_dut.x393_i.gpio_camsync[9:0] (9)x393_dut.x393_i.gpio_camsync[9:0]
@1401200 @1401200
-group_end -group_end
@1000200
-other -other
@200 @200
- -
...@@ -597,7 +598,10 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.eof ...@@ -597,7 +598,10 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.eof
-random -random
@800200 @800200
-event_logger -event_logger
@29
(0)x393_dut.x393_i.event_logger_i.en_imx_mclk_r[1:0]
@28 @28
x393_dut.x393_i.event_logger_i.ext_sync_toggle_r
x393_dut.x393_i.event_logger_i.xrst x393_dut.x393_i.event_logger_i.xrst
x393_dut.x393_i.event_logger_i.we_config_rst x393_dut.x393_i.event_logger_i.we_config_rst
x393_dut.x393_i.event_logger_i.we_config_rst_xclk x393_dut.x393_i.event_logger_i.we_config_rst_xclk
...@@ -1068,7 +1072,7 @@ x393_dut.x393_i.event_logger_i.timestamp_ackn[3:0] ...@@ -1068,7 +1072,7 @@ x393_dut.x393_i.event_logger_i.timestamp_ackn[3:0]
- -
@1401200 @1401200
-nmea_decoder393 -nmea_decoder393
@c00200 @800200
-imx5_decoder393 -imx5_decoder393
@28 @28
x393_dut.x393_i.event_logger_i.xrst x393_dut.x393_i.event_logger_i.xrst
...@@ -1179,7 +1183,7 @@ x393_dut.x393_i.event_logger_i.i_imx5_decoder393.did_len[7:0] ...@@ -1179,7 +1183,7 @@ x393_dut.x393_i.event_logger_i.i_imx5_decoder393.did_len[7:0]
x393_dut.x393_i.event_logger_i.i_imx5_decoder393.last_word_written[5:0] x393_dut.x393_i.event_logger_i.i_imx5_decoder393.last_word_written[5:0]
@200 @200
- -
@1401200 @1000200
-imx5_decoder393 -imx5_decoder393
@c00200 @c00200
-logger_arbiter393 -logger_arbiter393
......
cocotb/x393_dut.v
View file @ 35d52915
...@@ -2601,8 +2601,9 @@ assign #10 gpio_pins[7] = gpio_pins[8]; ...@@ -2601,8 +2601,9 @@ assign #10 gpio_pins[7] = gpio_pins[8];
assign gpio_pins[4]=IMS_TXD; assign gpio_pins[4]=IMS_TXD;
`else `else
assign gpio_pins[4]=SERIAL_BIT; assign gpio_pins[4]=SERIAL_BIT;
`endif
assign gpio_pins[5]=GPS1SEC; assign gpio_pins[5]=GPS1SEC;
`endif
// assign gpio_pins[5]=GPS1SEC;
`ifdef ODOMETER_PULSE_6 `ifdef ODOMETER_PULSE_6
assign gpio_pins[6]=ODOMETER_PULSE; assign gpio_pins[6]=ODOMETER_PULSE;
`endif `endif
......
fpga_version.vh
View file @ 35d52915
...@@ -35,7 +35,8 @@ ...@@ -35,7 +35,8 @@
* contains all the components and scripts required to completely simulate it * contains all the components and scripts required to completely simulate it
* with at least one of the Free Software programs. * with at least one of the Free Software programs.
*/ */
parameter FPGA_VERSION = 32'h03934019; // Boson640, logger debug disabled parameter FPGA_VERSION = 32'h0393401a; // adding strobe output for IMX-5 on ext-5
// parameter FPGA_VERSION = 32'h03934019; // Boson640, logger debug disabled
// parameter FPGA_VERSION = 32'h03934018; // Boson640, debugging logger 02 // parameter FPGA_VERSION = 32'h03934018; // Boson640, debugging logger 02
// parameter FPGA_VERSION = 32'h03934017; // Boson640, debugging logger 01 // parameter FPGA_VERSION = 32'h03934017; // Boson640, debugging logger 01
// parameter FPGA_VERSION = 32'h03934016; // Boson640, for 103993A, started IMU // parameter FPGA_VERSION = 32'h03934016; // Boson640, for 103993A, started IMU
......
logger/event_logger.v
View file @ 35d52915
...@@ -114,13 +114,13 @@ module event_logger#( ...@@ -114,13 +114,13 @@ module event_logger#(
output data_out_stb,// data out valid (@posedge mclk) output data_out_stb,// data out valid (@posedge mclk)
// sample_counter, // could be DMA latency, safe to use sample_counter-1 // sample_counter, // could be DMA latency, safe to use sample_counter-1
output [31:0] debug_state output [31:0] debug_state
// ,input [3:0] dbg_logger2023 // ,input [3:0] dbg_logger2023
); );
localparam SELECT_IMX5 = 2'h3; // when config_imu == SELECT_IMX5 - use IMX instead of the GPS on serial input localparam SELECT_IMX5 = 2'h3; // when config_imu == SELECT_IMX5 - use IMX instead of the GPS on serial input
wire [23:0] sample_counter; // TODO: read with status! could be DMA latency, safe to use sample_counter-1 wire [23:0] sample_counter; // TODO: read with status! could be DMA latency, safe to use sample_counter-1
wire ser_di; // gps serial data in wire ser_di; // gps serial data in
wire gps_pulse1sec; wire gps_pulse1sec;
wire mosi; // to IMU, bit 2 in J9 wire mosi; // to IMU, bit 2 in J9
...@@ -228,17 +228,27 @@ module event_logger#( ...@@ -228,17 +228,27 @@ module event_logger#(
reg [3:0] timestamps_en; // enable timestamp to go through (first after sof) reg [3:0] timestamps_en; // enable timestamp to go through (first after sof)
// output strobe for imx5
reg ext_sync_toggle_r;
reg frame_sync_pri_r;
reg [1:0] en_imx_mclk_r; //
// assign out_strobe = ext_sync_toggle_r;
// assign out_strobe_en = en_imx_mclk_r[1];
assign channel_ready[1] = use_imx5 ? imx5_rdy : nmea_rdy; assign channel_ready[1] = use_imx5 ? imx5_rdy : nmea_rdy;
assign timestamp_chnmod = {4'b0, 4'b0, use_imx5? timestamp_chnmod_imx[3:0]: 4'b0, 4'b0}; assign timestamp_chnmod = {4'b0, 4'b0, use_imx5? timestamp_chnmod_imx[3:0]: 4'b0, 4'b0};
//use_imx5 Use timestamp_chnmod_imx to indicate a) imx/not nmea and b) - continued packet //use_imx5 Use timestamp_chnmod_imx to indicate a) imx/not nmea and b) - continued packet
assign ext_en = {{(GPIO_N-5){1'b0}}, assign ext_en = {{(GPIO_N-6){1'b0}},
en_imx_mclk_r[1], // enable strobe output on gpio[5] for imx5
(config_imu[1:0]==2'h2)?1'b1:1'b0, (config_imu[1:0]==2'h2)?1'b1:1'b0,
1'b0, 1'b0,
(config_imu[1:0]==2'h1)?1'b1:1'b0, (config_imu[1:0]==2'h1)?1'b1:1'b0,
(config_imu[1:0]!=2'h0)?{sda_en,scl_en}:2'h0}; (config_imu[1:0]!=2'h0)?{sda_en,scl_en}:2'h0};
assign ext_do= {{(GPIO_N-5){1'b0}}, assign ext_do= {{(GPIO_N-6){1'b0}},
ext_sync_toggle_r, // strobe output on gpio[5] for imx5
(config_imu[1:0]==2'h2)?mosi:1'b0, (config_imu[1:0]==2'h2)?mosi:1'b0,
1'b0, 1'b0,
(config_imu[1:0]==2'h1)?mosi:1'b0, (config_imu[1:0]==2'h1)?mosi:1'b0,
...@@ -313,6 +323,21 @@ module event_logger#( ...@@ -313,6 +323,21 @@ module event_logger#(
else if (we_d && (ctrl_addr[4:0]!=5'h1f)) ctrl_addr[4:0] <=ctrl_addr[4:0]+1; // no roll over, else if (we_d && (ctrl_addr[4:0]!=5'h1f)) ctrl_addr[4:0] <=ctrl_addr[4:0]+1; // no roll over,
end end
//ts_stb_chn0, enable_syn_mclk[4:0]
always @ (posedge mclk) begin // was negedge
if (mrst) en_imx_mclk_r <= 0;
else en_imx_mclk_r <= {en_imx_mclk_r[0], enable_gps & use_imx5};
frame_sync_pri_r <=
enable_syn_mclk[4] ? ts_stb_chn4 :
(enable_syn_mclk[0] ? ts_stb_chn0 :
(enable_syn_mclk[1] ? ts_stb_chn1 :
(enable_syn_mclk[2] ? ts_stb_chn2 :
(enable_syn_mclk[3] ? ts_stb_chn3 : 1'b0))));
if (!en_imx_mclk_r[1]) ext_sync_toggle_r <= 0;
else if (frame_sync_pri_r) ext_sync_toggle_r <= !ext_sync_toggle_r;
end
assign enable_syn_mclk= config_rst_mclk? 5'b0 : config_syn_mclk; assign enable_syn_mclk= config_rst_mclk? 5'b0 : config_syn_mclk;
always @ (posedge xclk) begin always @ (posedge xclk) begin
if (xrst) config_rst <= 1'b1; if (xrst) config_rst <= 1'b1;
......
simulation_modules/simul_imx5.v
View file @ 35d52915
...@@ -135,9 +135,11 @@ localparam DATA_SIZE = RECORD_BYTES * RECORD_NUM; ...@@ -135,9 +135,11 @@ localparam DATA_SIZE = RECORD_BYTES * RECORD_NUM;
send_imx_escaped_byte(checkSumValue[ 8 +: 8]); send_imx_escaped_byte(checkSumValue[ 8 +: 8]);
send_imx_escaped_byte(checkSumValue[ 0 +: 8]); send_imx_escaped_byte(checkSumValue[ 0 +: 8]);
send_imx_byte('hfe); // stop (not escaped) send_imx_byte('hfe); // stop (not escaped)
if (packet_counter & 1) begin // merge two packets without pause
repeat (PAUSE_CLOCKS) begin // make a pause between records repeat (PAUSE_CLOCKS) begin // make a pause between records
wait (clk_r); wait (~clk_r); wait (clk_r); wait (~clk_r);
end end
end
packet_counter = packet_counter + 1; packet_counter = packet_counter + 1;
end end
end end
......
x393_boson.bit
View file @ 35d52915
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x393_boson.timing_summary_impl
View file @ 35d52915
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x393_boson_utilization.report
View file @ 35d52915
Copyright 1986-2017 Xilinx, Inc. All Rights Reserved. Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.
------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------
| Tool Version : Vivado v.2017.4 (lin64) Build 2086221 Fri Dec 15 20:54:30 MST 2017 | Tool Version : Vivado v.2017.4 (lin64) Build 2086221 Fri Dec 15 20:54:30 MST 2017
| Date : Tue Feb 14 12:54:59 2023 | Date : Wed Feb 22 18:29:20 2023
| Host : elphel-desktop running 64-bit Ubuntu 14.04.5 LTS | Host : elphel-desktop running 64-bit Ubuntu 14.04.5 LTS
| Command : report_utilization -file vivado_build/x393_boson_utilization.report | Command : report_utilization -file vivado_build/x393_boson_utilization.report
| Design : x393 | Design : x393
...@@ -31,13 +31,13 @@ Table of Contents ...@@ -31,13 +31,13 @@ Table of Contents
+----------------------------+-------+-------+-----------+-------+ +----------------------------+-------+-------+-----------+-------+
| Site Type | Used | Fixed | Available | Util% | | Site Type | Used | Fixed | Available | Util% |
+----------------------------+-------+-------+-----------+-------+ +----------------------------+-------+-------+-----------+-------+
| Slice LUTs | 44058 | 0 | 78600 | 56.05 | | Slice LUTs | 43310 | 0 | 78600 | 55.10 |
| LUT as Logic | 40644 | 0 | 78600 | 51.71 | | LUT as Logic | 39896 | 0 | 78600 | 50.76 |
| LUT as Memory | 3414 | 0 | 26600 | 12.83 | | LUT as Memory | 3414 | 0 | 26600 | 12.83 |
| LUT as Distributed RAM | 2866 | 0 | | | | LUT as Distributed RAM | 2866 | 0 | | |
| LUT as Shift Register | 548 | 0 | | | | LUT as Shift Register | 548 | 0 | | |
| Slice Registers | 56108 | 0 | 157200 | 35.69 | | Slice Registers | 56112 | 0 | 157200 | 35.69 |
| Register as Flip Flop | 56108 | 0 | 157200 | 35.69 | | Register as Flip Flop | 56112 | 0 | 157200 | 35.69 |
| Register as Latch | 0 | 0 | 157200 | 0.00 | | Register as Latch | 0 | 0 | 157200 | 0.00 |
| F7 Muxes | 54 | 0 | 39300 | 0.14 | | F7 Muxes | 54 | 0 | 39300 | 0.14 |
| F8 Muxes | 0 | 0 | 19650 | 0.00 | | F8 Muxes | 0 | 0 | 19650 | 0.00 |
...@@ -58,7 +58,7 @@ Table of Contents ...@@ -58,7 +58,7 @@ Table of Contents
| 0 | Yes | - | - | | 0 | Yes | - | - |
| 16 | Yes | - | Set | | 16 | Yes | - | Set |
| 677 | Yes | - | Reset | | 677 | Yes | - | Reset |
| 1227 | Yes | Set | - | | 1231 | Yes | Set | - |
| 54188 | Yes | Reset | - | | 54188 | Yes | Reset | - |
+-------+--------------+-------------+--------------+ +-------+--------------+-------------+--------------+
...@@ -69,27 +69,27 @@ Table of Contents ...@@ -69,27 +69,27 @@ Table of Contents
+-------------------------------------------+-------+-------+-----------+-------+ +-------------------------------------------+-------+-------+-----------+-------+
| Site Type | Used | Fixed | Available | Util% | | Site Type | Used | Fixed | Available | Util% |
+-------------------------------------------+-------+-------+-----------+-------+ +-------------------------------------------+-------+-------+-----------+-------+
| Slice | 17145 | 0 | 19650 | 87.25 | | Slice | 17090 | 0 | 19650 | 86.97 |
| SLICEL | 11293 | 0 | | | | SLICEL | 11254 | 0 | | |
| SLICEM | 5852 | 0 | | | | SLICEM | 5836 | 0 | | |
| LUT as Logic | 40644 | 0 | 78600 | 51.71 | | LUT as Logic | 39896 | 0 | 78600 | 50.76 |
| using O5 output only | 3 | | | | | using O5 output only | 1 | | | |
| using O6 output only | 31692 | | | | | using O6 output only | 30955 | | | |
| using O5 and O6 | 8949 | | | | | using O5 and O6 | 8940 | | | |
| LUT as Memory | 3414 | 0 | 26600 | 12.83 | | LUT as Memory | 3414 | 0 | 26600 | 12.83 |
| LUT as Distributed RAM | 2866 | 0 | | | | LUT as Distributed RAM | 2866 | 0 | | |
| using O5 output only | 2 | | | | | using O5 output only | 2 | | | |
| using O6 output only | 108 | | | | | using O6 output only | 108 | | | |
| using O5 and O6 | 2756 | | | | | using O5 and O6 | 2756 | | | |
| LUT as Shift Register | 548 | 0 | | | | LUT as Shift Register | 548 | 0 | | |
| using O5 output only | 279 | | | | | using O5 output only | 267 | | | |
| using O6 output only | 219 | | | | | using O6 output only | 231 | | | |
| using O5 and O6 | 50 | | | | | using O5 and O6 | 50 | | | |
| LUT Flip Flop Pairs | 25454 | 0 | 78600 | 32.38 | | LUT Flip Flop Pairs | 25581 | 0 | 78600 | 32.55 |
| fully used LUT-FF pairs | 4849 | | | | | fully used LUT-FF pairs | 4917 | | | |
| LUT-FF pairs with one unused LUT output | 18445 | | | | | LUT-FF pairs with one unused LUT output | 18519 | | | |
| LUT-FF pairs with one unused Flip Flop | 18119 | | | | | LUT-FF pairs with one unused Flip Flop | 18161 | | | |
| Unique Control Sets | 5357 | | | | | Unique Control Sets | 4898 | | | |
+-------------------------------------------+-------+-------+-----------+-------+ +-------------------------------------------+-------+-------+-----------+-------+
* Note: Review the Control Sets Report for more information regarding control sets. * Note: Review the Control Sets Report for more information regarding control sets.
...@@ -198,16 +198,16 @@ Table of Contents ...@@ -198,16 +198,16 @@ Table of Contents
| Ref Name | Used | Functional Category | | Ref Name | Used | Functional Category |
+------------------------+-------+----------------------+ +------------------------+-------+----------------------+
| FDRE | 54188 | Flop & Latch | | FDRE | 54188 | Flop & Latch |
| LUT3 | 11920 | LUT | | LUT3 | 11699 | LUT |
| LUT6 | 10509 | LUT | | LUT6 | 10195 | LUT |
| LUT2 | 8692 | LUT | | LUT2 | 8731 | LUT |
| LUT4 | 8508 | LUT | | LUT4 | 8351 | LUT |
| LUT5 | 8334 | LUT | | LUT5 | 8222 | LUT |
| RAMD32 | 4186 | Distributed Memory | | RAMD32 | 4186 | Distributed Memory |
| CARRY4 | 2805 | CarryLogic | | CARRY4 | 2805 | CarryLogic |
| LUT1 | 1630 | LUT | | LUT1 | 1638 | LUT |
| RAMS32 | 1412 | Distributed Memory | | RAMS32 | 1412 | Distributed Memory |
| FDSE | 1227 | Flop & Latch | | FDSE | 1231 | Flop & Latch |
| FDCE | 677 | Flop & Latch | | FDCE | 677 | Flop & Latch |
| SRL16E | 494 | Distributed Memory | | SRL16E | 494 | Distributed Memory |
| SRLC32E | 104 | Distributed Memory | | SRLC32E | 104 | Distributed Memory |
......
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