more simulation with HiSPi sensors (31e4c348) · Commits · Elphel / x393

.project

+2 −2

Original line number	Diff line number	Diff line
		@@ -62,7 +62,7 @@
		<link>
		<name>vivado_logs/VivadoBitstream.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20151107161322372.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20151107204814914.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoOpt.log</name>
		@@ -97,7 +97,7 @@
		<link>
		<name>vivado_logs/VivadoTimimgSummaryReportImplemented.log</name>
		<type>1</type>
		<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-20151107161322372.log</location>
		<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-20151107204814914.log</location>
		</link>
		<link>
		<name>vivado_logs/VivadoTimimgSummaryReportSynthesis.log</name>

.settings/com.elphel.vdt.FPGA_project.prefs

+2 −2

Original line number	Diff line number	Diff line
		FPGA_project_0_SimulationTopFile=x393_testbench02.tf
		FPGA_project_1_SimulationTopModule=x393_testbench02
		FPGA_project_0_SimulationTopFile=x393_testbench03.tf
		FPGA_project_1_SimulationTopModule=x393_testbench03
		FPGA_project_2_ImplementationTopFile=x393.v
		FPGA_project_4_part=xc7z030fbg484-1
		FPGA_project_5_part=xc7z030fbg484-1

includes/tasks_tests_memory.vh

+19 −6

Original line number	Diff line number	Diff line
		@@ -137,8 +137,10 @@ task test_afi_rw; // SuppressThisWarning VEditor - may be unused
		reg single;
		reg reset_frame;
		reg disable_need;
		reg skip_too_late;
		begin
		// disable_need = 1'b0;
		skip_too_late = 1'b0;
		disable_need = 1'b0;
		repetitive = 1'b1;
		single = 1'b0;
		reset_frame = 1'b0;
		@@ -149,6 +151,7 @@ task test_afi_rw; // SuppressThisWarning VEditor - may be unused
		(window_width[12:0]==0)? 29'h4000 : {15'b0,window_width[12:0],1'b0},
		start64, lo_addr64, size64, $time);
		mode= func_encode_mode_scanline(
		skip_too_late,
		disable_need,
		repetitive,
		single,
		@@ -220,11 +223,13 @@ task test_scanline_write; // SuppressThisWarning VEditor - may be unused
		reg single;
		reg reset_frame;
		reg disable_need;
		reg skip_too_late;
		begin
		disable_need = 1'b0;
		repetitive = 1'b1;
		single = 1'b0;
		reset_frame = 1'b0;
		skip_too_late = 1'b0;
		pages_per_row= (window_width>>NUM_XFER_BITS)+((window_width[NUM_XFER_BITS-1:0]==0)?0:1);
		$display("====== test_scanline_write: channel=%d, extra_pages=%d, wait_done=%d @%t",
		channel, extra_pages, wait_done, $time);
		@@ -250,6 +255,7 @@ task test_scanline_write; // SuppressThisWarning VEditor - may be unused
		end
		endcase
		mode= func_encode_mode_scanline(
		skip_too_late,
		disable_need,
		repetitive,
		single,
		@@ -360,8 +366,9 @@ task test_scanline_read; // SuppressThisWarning VEditor - may be unused
		reg single;
		reg reset_frame;
		reg disable_need;

		reg skip_too_late;
		begin
		skip_too_late = 1'b0;
		disable_need = 1'b0;
		repetitive = 1'b1;
		single = 1'b0;
		@@ -391,6 +398,7 @@ task test_scanline_read; // SuppressThisWarning VEditor - may be unused
		end
		endcase
		mode= func_encode_mode_scanline(
		skip_too_late,
		disable_need,
		repetitive,
		single,
		@@ -472,12 +480,13 @@ task test_tiled_write; // SuppressThisWarning VEditor - may be unused
		reg single;
		reg reset_frame;
		reg disable_need;
		reg skip_too_late;
		begin
		disable_need = 1'b0;
		repetitive = 1'b1;
		single = 1'b0;
		reset_frame = 1'b0;

		skip_too_late = 1'b0;
		tiles_per_row= (window_width/tile_width)+ ((window_width % tile_width==0)?0:1);
		tile_rows_per_window= ((window_height-1)/tile_vstep) + 1;
		tile_size= tile_width*tile_height;
		@@ -505,6 +514,7 @@ task test_tiled_write; // SuppressThisWarning VEditor - may be unused
		end
		endcase
		mode= func_encode_mode_tiled(
		skip_too_late,
		disable_need,
		repetitive,
		single,
		@@ -604,7 +614,9 @@ task test_tiled_read; // SuppressThisWarning VEditor - may be unused
		reg single;
		reg reset_frame;
		reg disable_need;
		reg skip_too_late;
		begin
		skip_too_late = 1'b0;
		disable_need = 1'b0;
		repetitive = 1'b1;
		single = 1'b0;
		@@ -637,6 +649,7 @@ task test_tiled_read; // SuppressThisWarning VEditor - may be unused
		end
		endcase
		mode= func_encode_mode_tiled(
		skip_too_late,
		disable_need,
		repetitive,
		single,

includes/x393_simulation_parameters.vh

+8 −2

Original line number	Diff line number	Diff line
		@@ -46,9 +46,15 @@
		parameter SENSOR12BITS_NVLO = 1, // VACT=0 in video mode (clocks)
		//parameter tMD = 14; //
		//parameter tDDO = 10; // some confusion here - let's assume that it is from DCLK to Data out
		`ifdef HISPI
		parameter SENSOR12BITS_TMD = 1, //
		parameter SENSOR12BITS_TDDO = 1, // some confusion here - let's assume that it is from DCLK to Data out
		parameter SENSOR12BITS_TDDO1 = 2, //
		`else
		parameter SENSOR12BITS_TMD = 4, //
		parameter SENSOR12BITS_TDDO = 2, // some confusion here - let's assume that it is from DCLK to Data out
		parameter SENSOR12BITS_TDDO1 = 5, //
		`endif
		// parameter SENSOR12BITS_TRIGDLY = 8, // delay between trigger input and start of output (VACT) in lines
		// parameter SENSOR12BITS_RAMP = 1, // 1 - ramp, 0 - random (now - sensor.dat)
		// parameter SENSOR12BITS_NEW_BAYER = 0, // 0 - "old" tiles (16x16, 1 - new - (18x18)
		@@ -61,7 +67,7 @@
		parameter FRAME_WIDTH_ROUND_BITS = 9, // multiple of 512 pixels (32 16-byte bursts) (11 - ful SDRAM page)

		parameter WOI_WIDTH= 64,
		parameter QUADRANTS_PXD_HACT_VACT = 6'h01 // 2 bits each: data-0, hact - 1, vact - 2
		parameter QUADRANTS_PXD_HACT_VACT = 6'h01, // 2 bits each: data-0, hact - 1, vact - 2
		// 90-degree shifts for data [1:0], hact [3:2] and vact [5:4]

		parameter SENSOR_PRIORITY = 1000

		No newline at end of file

x393_testbench02.tf

+9 −4

Original line number	Diff line number	Diff line
		@@ -2247,7 +2247,8 @@ task write_block_scanline_chn; // SuppressThisWarning VEditor : may be unused
		end
		endtask
		// x393_mcntrl (no class)
		function [11:0] func_encode_mode_tiled; // SuppressThisWarning VEditor - not used
		function [12:0] func_encode_mode_tiled; // SuppressThisWarning VEditor - not used
		input skip_too_late;
		input disable_need;
		input repetitive;
		input single;
		@@ -2260,7 +2261,7 @@ function [11:0] func_encode_mode_tiled; // SuppressThisWarning VEditor - not us
		input enable; // enable requests from this channel ( 0 will let current to finish, but not raise want/need)
		input chn_reset; // immediately reset al;l the internal circuitry

		reg [11:0] rslt;
		reg [12:0] rslt;
		begin
		rslt = 0;
		rslt[MCONTR_LINTILE_EN] = ~chn_reset;
		@@ -2273,12 +2274,15 @@ function [11:0] func_encode_mode_tiled; // SuppressThisWarning VEditor - not us
		rslt[MCONTR_LINTILE_SINGLE] = single;
		rslt[MCONTR_LINTILE_REPEAT] = repetitive;
		rslt[MCONTR_LINTILE_DIS_NEED] = disable_need;
		rslt[MCONTR_LINTILE_SKIP_LATE] = skip_too_late;

		// func_encode_mode_tiled={byte32,keep_open,extra_pages,write_mem,enable,~chn_reset};
		func_encode_mode_tiled = rslt;
		end
		endfunction
		// x393_mcntrl (no class)
		function [11:0] func_encode_mode_scanline; // SuppressThisWarning VEditor - not used
		function [12:0] func_encode_mode_scanline; // SuppressThisWarning VEditor - not used
		input skip_too_late;
		input disable_need;
		input repetitive;
		input single;
		@@ -2289,7 +2293,7 @@ function [11:0] func_encode_mode_scanline; // SuppressThisWarning VEditor - not
		input enable; // enable requests from this channel ( 0 will let current to finish, but not raise want/need)
		input chn_reset; // immediately reset al;l the internal circuitry

		reg [11:0] rslt;
		reg [12:0] rslt;
		begin
		rslt = 0;
		rslt[MCONTR_LINTILE_EN] = ~chn_reset;
		@@ -2300,6 +2304,7 @@ function [11:0] func_encode_mode_scanline; // SuppressThisWarning VEditor - not
		rslt[MCONTR_LINTILE_SINGLE] = single;
		rslt[MCONTR_LINTILE_REPEAT] = repetitive;
		rslt[MCONTR_LINTILE_DIS_NEED] = disable_need;
		rslt[MCONTR_LINTILE_SKIP_LATE] = skip_too_late;
		// func_encode_mode_scanline={extra_pages,write_mem,enable,~chn_reset};
		func_encode_mode_scanline = rslt;
		end

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