Commit 2008d6d4 authored by Andrey Filippov's avatar Andrey Filippov

working on i2c driver

parent 5c0b4692
...@@ -3,3 +3,5 @@ encoding//helpers/convert_data_to_params.py=utf-8 ...@@ -3,3 +3,5 @@ encoding//helpers/convert_data_to_params.py=utf-8
encoding//helpers/convert_pass_init_params.py=utf-8 encoding//helpers/convert_pass_init_params.py=utf-8
encoding//helpers/convert_zigzag_rom.py=utf-8 encoding//helpers/convert_zigzag_rom.py=utf-8
encoding//py393/test_mcntrl.py=utf-8 encoding//py393/test_mcntrl.py=utf-8
encoding//py393/x393_i2c.py.test=utf-8
encoding//py393/x393_init_usb_hub.py=utf-8
#!/bin/sh #!/bin/sh
#mkdir -p /lib/modules #mkdir -p /lib/modules
#ln -sf /usr/local/lib /lib/modules/4.0.0-xilinx #ln -sf /usr/local/lib /lib/modules/4.0.0-xilinx
insmod /usr/local/lib/fpgajtag.ko #insmod /usr/local/lib/fpgajtag.ko
#mknod -m 0666 /dev/fjtag c 132 2 #mknod -m 0666 /dev/fjtag c 132 2
mknod -m 0666 /dev/fpgaresetjtag c 132 0 mknod -m 0666 /dev/fpgaresetjtag c 132 0
mknod -m 0666 /dev/jtagraw c 132 0 mknod -m 0666 /dev/jtagraw c 132 0
......
...@@ -1684,7 +1684,7 @@ class X393ExportC(object): ...@@ -1684,7 +1684,7 @@ class X393ExportC(object):
dw=[] dw=[]
dw.append(("i2c_fifo_dout", 0, 8,0, "I2c byte read from the device through FIFO")) dw.append(("i2c_fifo_dout", 0, 8,0, "I2c byte read from the device through FIFO"))
dw.append(("i2c_fifo_nempty", 8, 1,0, "I2C read FIFO has data")) dw.append(("i2c_fifo_nempty", 8, 1,0, "I2C read FIFO has data"))
dw.append(("i2c_fifo_cntrl", 9, 1,0, "I2C FIFO byte counter (odd/even bytes)")) dw.append(("i2c_fifo_lsb", 9, 1,0, "I2C FIFO byte counter (odd/even bytes)"))
dw.append(("busy", 10, 1,0, "I2C sequencer busy")) dw.append(("busy", 10, 1,0, "I2C sequencer busy"))
dw.append(("alive_fs", 11, 1,0, "Sensor generated frame sync since last status update")) dw.append(("alive_fs", 11, 1,0, "Sensor generated frame sync since last status update"))
dw.append(("frame_num", 12, 4,0, "I2C sequencer frame number")) dw.append(("frame_num", 12, 4,0, "I2C sequencer frame number"))
...@@ -1720,7 +1720,7 @@ class X393ExportC(object): ...@@ -1720,7 +1720,7 @@ class X393ExportC(object):
def _enc_i2c_tbl_addr(self): def _enc_i2c_tbl_addr(self):
dw=[] dw=[]
dw.append(("tbl_addr", 0, 8,0, "Address/length in 64-bit words (<<3 to get byte address)")) dw.append(("tbl_addr", 0, 8,0, "I2C table index"))
dw.append(("tbl_mode", vrlg.SENSI2C_CMD_TAND, 2,3, "Should be 3 to select table address write mode")) dw.append(("tbl_mode", vrlg.SENSI2C_CMD_TAND, 2,3, "Should be 3 to select table address write mode"))
return dw return dw
...@@ -1738,7 +1738,7 @@ class X393ExportC(object): ...@@ -1738,7 +1738,7 @@ class X393ExportC(object):
dw=[] dw=[]
dw.append(("rah", vrlg.SENSI2C_TBL_RAH, vrlg.SENSI2C_TBL_RAH_BITS, 0, "High byte of the i2c register address")) dw.append(("rah", vrlg.SENSI2C_TBL_RAH, vrlg.SENSI2C_TBL_RAH_BITS, 0, "High byte of the i2c register address"))
dw.append(("rnw", vrlg.SENSI2C_TBL_RNWREG, 1, 0, "Read/not write i2c register, should be 1 here")) dw.append(("rnw", vrlg.SENSI2C_TBL_RNWREG, 1, 0, "Read/not write i2c register, should be 1 here"))
dw.append(("nbrd", vrlg.SENSI2C_TBL_NBRD, vrlg.SENSI2C_TBL_NBRD_BITS,0, "Number of bytes to read (1..18, 0 means '8')")) dw.append(("nbrd", vrlg.SENSI2C_TBL_NBRD, vrlg.SENSI2C_TBL_NBRD_BITS,0, "Number of bytes to read (1..8, 0 means '8')"))
dw.append(("nabrd", vrlg.SENSI2C_TBL_NABRD, 1, 0, "Number of address bytes for read (0 - one byte, 1 - two bytes)")) dw.append(("nabrd", vrlg.SENSI2C_TBL_NABRD, 1, 0, "Number of address bytes for read (0 - one byte, 1 - two bytes)"))
dw.append(("dly", vrlg.SENSI2C_TBL_DLY, vrlg.SENSI2C_TBL_DLY_BITS, 0, "Bit delay - number of mclk periods in 1/4 of the SCL period")) dw.append(("dly", vrlg.SENSI2C_TBL_DLY, vrlg.SENSI2C_TBL_DLY_BITS, 0, "Bit delay - number of mclk periods in 1/4 of the SCL period"))
dw.append(("tbl_mode", vrlg.SENSI2C_CMD_TAND, 2, 2, "Should be 2 to select table data write mode")) dw.append(("tbl_mode", vrlg.SENSI2C_CMD_TAND, 2, 2, "Should be 2 to select table data write mode"))
......
...@@ -972,6 +972,7 @@ measure_all "*DI" ...@@ -972,6 +972,7 @@ measure_all "*DI"
program_status_sensor_io all 1 0 program_status_sensor_io all 1 0
print_status_sensor_io all print_status_sensor_io all
setup_all_sensors True None 0x4
################## Parallel ################## ################## Parallel ##################
cd /usr/local/verilog/; test_mcntrl.py @hargs cd /usr/local/verilog/; test_mcntrl.py @hargs
...@@ -981,7 +982,8 @@ setup_all_sensors True None 0xf ...@@ -981,7 +982,8 @@ setup_all_sensors True None 0xf
#set quadrants #set quadrants
set_sensor_io_ctl 0 None None None None None 0 0xe set_sensor_io_ctl 0 None None None None None 0 0xe
set_sensor_io_ctl 1 None None None None None 0 0xe set_sensor_io_ctl 1 None None None None None 0 0xe
set_sensor_io_ctl 2 None None None None None 0 0x4 #set_sensor_io_ctl 2 None None None None None 0 0x4
set_sensor_io_ctl 2 None None None None None 0 0xe
set_sensor_io_ctl 3 None None None None None 0 0xe set_sensor_io_ctl 3 None None None None None 0 0xe
# Set Bayer = 3 (probably #1 and #3 need different hact/pxd delays to use the same compressor bayer for all channels) # Set Bayer = 3 (probably #1 and #3 need different hact/pxd delays to use the same compressor bayer for all channels)
compressor_control all None None None None None 3 compressor_control all None None None None None 3
...@@ -1018,8 +1020,8 @@ write_sensor_i2c all 1 0 0x90090797 ...@@ -1018,8 +1020,8 @@ write_sensor_i2c all 1 0 0x90090797
#run compressors once (#1 - stop gracefully, 0 - reset, 2 - single, 3 - repetitive with sync to sensors) #run compressors once (#1 - stop gracefully, 0 - reset, 2 - single, 3 - repetitive with sync to sensors)
compressor_control all 2 compressor_control all 2
jpeg_write "img.jpeg" 0 #jpeg_write "img.jpeg" 0
#jpeg_write "img.jpeg" All jpeg_write "img.jpeg" All
#changing quality (example 85%): #changing quality (example 85%):
set_qtables all 0 85 set_qtables all 0 85
......
This diff is collapsed.
...@@ -1152,7 +1152,8 @@ class X393PIOSequences(object): ...@@ -1152,7 +1152,8 @@ class X393PIOSequences(object):
self.wait_ps_pio_done(vrlg.DEFAULT_STATUS_MODE,1); # wait previous memory transaction finished before changing delays (effective immediately) self.wait_ps_pio_done(vrlg.DEFAULT_STATUS_MODE,1); # wait previous memory transaction finished before changing delays (effective immediately)
buf=self.x393_mcntrl_buffers.read_block_buf_chn (0, 0, numBufWords, (0,1)[quiet<1]) # chn=0, page=0, number of 32-bit words=32, show_rslt buf=self.x393_mcntrl_buffers.read_block_buf_chn (0, 0, numBufWords, (0,1)[quiet<1]) # chn=0, page=0, number of 32-bit words=32, show_rslt
#calculate 1-s ratio for both lanes #calculate 1-s ratio for both lanes
rslt=[0.0,0.0,0.0] # last word - number of "problem" bytes that have non-ones in bits [7:1] # rslt=[0.0,0.0,0.0] # last word - number of "problem" bytes that have non-ones in bits [7:1]
rslt=[0.0,0.0,0.0,0.0] # last 2 words - number of "problem" bytes that have non-ones in bits [7:1] or byte is not the same
for i in range(0,numBufWords): for i in range(0,numBufWords):
rslt[i & 1] += ((buf[i] & 1) + rslt[i & 1] += ((buf[i] & 1) +
...@@ -1164,11 +1165,25 @@ class X393PIOSequences(object): ...@@ -1164,11 +1165,25 @@ class X393PIOSequences(object):
(0,1)[(buf[i] & 0xfe00) != 0]+ (0,1)[(buf[i] & 0xfe00) != 0]+
(0,1)[(buf[i] & 0xfe0000) != 0]+ (0,1)[(buf[i] & 0xfe0000) != 0]+
(0,1)[(buf[i] & 0xfe000000) != 0]) (0,1)[(buf[i] & 0xfe000000) != 0])
bm = buf[i] & 0x01010101
bm |= (bm << 1)
bm |= (bm << 2)
bm |= (bm << 4)
bm ^= buf[i]
rslt[3] += ((0,1)[(bm & 0xfe) != 0]+
(0,1)[(bm & 0xfe00) != 0]+
(0,1)[(bm & 0xfe0000) != 0]+
(0,1)[(bm & 0xfe000000) != 0])
for i in range(2): for i in range(2):
rslt[i]/=2*numBufWords rslt[i]/=2*numBufWords
rslt[2]/=4*numBufWords rslt[2]/=4*numBufWords
rslt[3]/=4*numBufWords
if quiet <1: if quiet <1:
print ("WLEV lanes ratios: %f %f, non 0x00/0x01 bytes: %f"%(rslt[0],rslt[1],rslt[2])) print ("WLEV lanes ratios: %f %f, non 0x00/0x01 byte: %f, non 0x00/0xffs: %f"%(rslt[0],rslt[1],rslt[2],rslt[3]))
if (rslt[3] < rslt[2]):
rslt[2] = rslt[3]
return rslt return rslt
def read_levelling(self, def read_levelling(self,
......
...@@ -299,7 +299,7 @@ class X393Sensor(object): ...@@ -299,7 +299,7 @@ class X393Sensor(object):
else: else:
return 3 return 3
if verbose>0: if verbose>1:
print ("func_sensor_i2c_command(): rst_cmd= ",rst_cmd,", run_cmd=",run_cmd,", active_sda = ",active_sda,", early_release_0 = ",early_release_0, print ("func_sensor_i2c_command(): rst_cmd= ",rst_cmd,", run_cmd=",run_cmd,", active_sda = ",active_sda,", early_release_0 = ",early_release_0,
", sda=",sda,", scl=",scl) ", sda=",sda,", scl=",scl)
...@@ -1279,13 +1279,19 @@ $boards=array ( ...@@ -1279,13 +1279,19 @@ $boards=array (
'1' => array ('model' => '10359', 'scl' =>280,'sda' => 296) // H6, J5 '1' => array ('model' => '10359', 'scl' =>280,'sda' => 296) // H6, J5
); );
cd /usr/local/verilog/; test_mcntrl.py -x @hargs #cd /usr/local/verilog/; test_mcntrl.py -x @hargs
cd /usr/local/verilog/; test_mcntrl.py @hargs
setupSensorsPower "PAR12" setupSensorsPower "PAR12"
measure_all "*DI" measure_all "*DI"
program_status_sensor_io all 1 0 program_status_sensor_io all 1 0
print_status_sensor_io all print_status_sensor_io all
setSensorClock setSensorClock
checkSclSda 1
cat /usr/local/verilog/x359.bit > /dev/sfpgaconfjtag1
#jtag_set_pgm_mode 0 1 #jtag_set_pgm_mode 0 1
#jtag_set_pgm_mode 1 1 #jtag_set_pgm_mode 1 1
#jtag_set_pgm_mode 2 1 #jtag_set_pgm_mode 2 1
...@@ -1437,7 +1443,7 @@ drivers/elphel/fpgajtag353.c:1416 [fpgajtag]fpga_jtag_exit =_ "unregistering dri ...@@ -1437,7 +1443,7 @@ drivers/elphel/fpgajtag353.c:1416 [fpgajtag]fpga_jtag_exit =_ "unregistering dri
root@elphel393:/sys/kernel/debug/dynamic_debug# echo 'file drivers/elphel/fpgajtag353.c +p' > control root@elphel393:/sys/kernel/debug/dynamic_debug# echo 'file drivers/elphel/fpgajtag353.c +p' > control
afpgaconfjtag jtagraw memory_bandwidth mtd4ro ram2 stderr tty18 tty30 tty43 tty56 ttyS1 afpgaconfjtag jtagraw memory_bandwidth mtd4ro ram2 stderr tty18 tty30 tty43 tty56 ttyS1
block kmem mmcblk0 mtdblock0 ram3 stdin tty19 tty31 tty44 tty57 ttyS2 block kmem mmcblk0 mtdblock0 ram3 stdin tty19 tty31 tty44 tty57 ttyS2
char kmsg mmcblk0p1 mtdblock1 random stdout tty2 tty32 tty45 tty58 ttyS3 char kmsg mmcblk0p1 mtdblock1 random stdout tty2 tty32 tty45 tty58 ttyS3
console log mmcblk0p2 mtdblock2 rtc0 tty tty20 tty33 tty46 tty59 ubi_ctrl console log mmcblk0p2 mtdblock2 rtc0 tty tty20 tty33 tty46 tty59 ubi_ctrl
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment