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Elphel
x393
Commits
1d2f08b7
Commit
1d2f08b7
authored
Apr 21, 2015
by
Andrey Filippov
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Plain Diff
minor adjustments
parent
decdd057
Changes
3
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3 changed files
with
10 additions
and
8 deletions
+10
-8
phy_cmd.v
memctrl/phy/phy_cmd.v
+2
-1
x393_pio_sequences.py
py393/x393_pio_sequences.py
+2
-1
x393_testbench01.sav
x393_testbench01.sav
+6
-6
No files found.
memctrl/phy/phy_cmd.v
View file @
1d2f08b7
...
@@ -371,7 +371,8 @@ module phy_cmd#(
...
@@ -371,7 +371,8 @@ module phy_cmd#(
wire
[
7
:
0
]
dqs_data
;
wire
[
7
:
0
]
dqs_data
;
assign
dqs_data
=
phy_dqs_toggle_cur
?
dqs_pattern
[
7
:
0
]
:
8'h0
;
// assign dqs_data=phy_dqs_toggle_cur?dqs_pattern[7:0]:8'h0;
assign
dqs_data
=
phy_dqs_toggle_cur
?
dqs_pattern
[
7
:
0
]
:
8'hff
;
phy_top
#(
phy_top
#(
.
IOSTANDARD_DQ
(
"SSTL15_T_DCI"
)
,
.
IOSTANDARD_DQ
(
"SSTL15_T_DCI"
)
,
.
IOSTANDARD_DQS
(
"DIFF_SSTL15_T_DCI"
)
,
.
IOSTANDARD_DQS
(
"DIFF_SSTL15_T_DCI"
)
,
...
...
py393/x393_pio_sequences.py
View file @
1d2f08b7
...
@@ -556,7 +556,8 @@ class X393PIOSequences(object):
...
@@ -556,7 +556,8 @@ class X393PIOSequences(object):
cmd_addr
+=
1
cmd_addr
+=
1
# nop 4-th rd_buf
# nop 4-th rd_buf
# skip done bank ODT CKE SEL DQEN DQSEN DQSTGL DCI B_WR B_RD B_RST
# skip done bank ODT CKE SEL DQEN DQSEN DQSTGL DCI B_WR B_RD B_RST
data
=
self
.
func_encode_skip
(
0
,
0
,
ba
,
1
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
1
,
0
)
# data=self.func_encode_skip( 0, 0, ba, 1, 0, 0, 1, 1, 0, 0, 0, 1, 0)
data
=
self
.
func_encode_skip
(
0
,
0
,
ba
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
0
)
self
.
x393_mem
.
axi_write_single_w
(
cmd_addr
,
data
,
verbose
)
self
.
x393_mem
.
axi_write_single_w
(
cmd_addr
,
data
,
verbose
)
cmd_addr
+=
1
cmd_addr
+=
1
#repeat remaining writes
#repeat remaining writes
...
...
x393_testbench01.sav
View file @
1d2f08b7
[*]
[*]
[*] GTKWave Analyzer v3.3.64 (w)1999-2014 BSI
[*] GTKWave Analyzer v3.3.64 (w)1999-2014 BSI
[*] Tue Apr 21 0
1:47:19
2015
[*] Tue Apr 21 0
3:43:52
2015
[*]
[*]
[dumpfile] "/home/andrey/git/x393/simulation/x393_testbench01-2015042019
3910060
.lxt"
[dumpfile] "/home/andrey/git/x393/simulation/x393_testbench01-2015042019
4727213
.lxt"
[dumpfile_mtime] "Tue Apr 21 01:
44:01
2015"
[dumpfile_mtime] "Tue Apr 21 01:
52:16
2015"
[dumpfile_size] 2524
36540
[dumpfile_size] 2524
56387
[savefile] "/home/andrey/git/x393/x393_testbench01.sav"
[savefile] "/home/andrey/git/x393/x393_testbench01.sav"
[timestart] 415
6466
0
[timestart] 415
3342
0
[size] 1823 1173
[size] 1823 1173
[pos] 2065 0
[pos] 2065 0
*-1
2.595797 41576250
157271875 157546875 43667500 43655000 44285000 44297500 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
*-1
3.595797 41566328
157271875 157546875 43667500 43655000 44285000 44297500 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] x393_testbench01.
[treeopen] x393_testbench01.
[treeopen] x393_testbench01.ddr3_i.
[treeopen] x393_testbench01.ddr3_i.
[treeopen] x393_testbench01.x393_i.
[treeopen] x393_testbench01.x393_i.
...
...
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