Commit 13382f62 authored by Alexey Grebenkin's avatar Alexey Grebenkin

CVC workarounds

parent f3df44ab
......@@ -477,10 +477,22 @@
parameter TDQSL = 0.45; // tDQSL tCK DQS input Low Pulse Width
parameter TWPRE = 0.90; // tWPRE tCK DQS Write Preamble
parameter TWPST = 0.30; // tWPST tCK DQS Write Postamble
`ifdef CVC
integer TZQCS;
integer TZQINIT;
integer TZQOPER;
initial
begin
TZQCS = max( 64, ceil( 80000/TCK_MIN)); // tZQCS tCK ZQ Cal (Short) time
TZQINIT = max(512, ceil(640000/TCK_MIN)); // tZQinit tCK ZQ Cal (Long) time
TZQOPER = max(256, ceil(320000/TCK_MIN)); // tZQoper tCK ZQ Cal (Long) time
end
`else
// Command and Address
integer TZQCS = max( 64, ceil( 80000/TCK_MIN)); // tZQCS tCK ZQ Cal (Short) time
integer TZQINIT = max(512, ceil(640000/TCK_MIN)); // tZQinit tCK ZQ Cal (Long) time
integer TZQOPER = max(256, ceil(320000/TCK_MIN)); // tZQoper tCK ZQ Cal (Long) time
`endif
parameter TCCD = 4; // tCCD tCK Cas to Cas command delay
parameter TCCD_DG = 2; // tCCD_DG tCK Cas to Cas command delay to different group
parameter TRAS_MAX = 60e9; // tRAS ps Maximum Active to Precharge command time
......
......@@ -551,8 +551,11 @@ module ddr3 (
$display("%m ERROR: BL_MAX parameter must be >= 2. \nBL_MAX = %d", BL_MAX);
if ((1<<BO_BITS) > BL_MAX)
$display("%m ERROR: 2^BO_BITS cannot be greater than BL_MAX parameter.");
`ifdef CVC
$timeformat (-12, 1, " ps", 10);
`else
$timeformat (-12, 1, " ps", 1);
`endif
seed = RANDOM_SEED;
ck_cntr = 0;
......@@ -656,6 +659,9 @@ module ddr3 (
integer offset;
reg [1024:1] msg;
reg [RFF_BITS:1] read_value;
`ifdef CVC
reg [RFF_BITS*2+8:1] read_str;
`endif
begin
offset = index * RFF_CHUNK;
......@@ -666,8 +672,12 @@ module ddr3 (
$display("%m: at time %t ERROR: fseek to %d failed", $time, offset);
$finish;
end
`ifdef CVC
code = $fgets(read_str, fd);
code = $sscanf(read_str, "%h", read_value);
`else
code = $fscanf(fd, "%z", read_value);
`endif
// $fscanf returns number of items read
if (code != 1)
begin
......@@ -685,12 +695,21 @@ module ddr3 (
* Use 0 in bit 1 as indicator that invalid data has been read.
* A true 0 is encoded as Z.
*/
`ifdef CVC
if (read_value[4:1] === 4'bzzzz)
// true 0 encoded as Z, data is valid
read_value[4:1] = 4'b0000;
else if (read_value[4:1] === 4'b0000)
// read from file section that has not been written
read_value = 'hx;
`else
if (read_value[1] === 1'bz)
// true 0 encoded as Z, data is valid
read_value[1] = 1'b0;
else if (read_value[1] === 1'b0)
// read from file section that has not been written
read_value = 'hx;
`endif
read_from_file = read_value;
end
......@@ -720,6 +739,15 @@ module ddr3 (
$finish;
end
`ifdef CVC
// encode a valid data
if (data[4:1] === 4'bzzzz)
data[4:1] = 4'bxxxx;
else if (data[4:1] === 4'b0000)
data[4:1] = 4'bzzzz;
$fwrite( fd, "%h", data );
`else
// encode a valid data
if (data[1] === 1'bz)
data[1] = 1'bx;
......@@ -727,6 +755,7 @@ module ddr3 (
data[1] = 1'bz;
$fwrite( fd, "%z", data );
`endif
end
endtask
`else
......@@ -2241,7 +2270,11 @@ module ddr3 (
$display ("%m: at time %t ERROR: tCK(avg) maximum violation by %f ps.", $time, tck_avg - TCK_MAX);
// check tCL
`ifdef CVC
if ((tm_ck_neg - $time < TCL_ABS_MIN*tck_avg) && (tm_ck_neg > $time))
`else
if (tm_ck_neg - $time < TCL_ABS_MIN*tck_avg)
`endif
$display ("%m: at time %t ERROR: tCL(abs) minimum violation on CLK by %t", $time, TCL_ABS_MIN*tck_avg - tm_ck_neg + $time);
if (tcl_avg < TCL_AVG_MIN*tck_avg)
$display ("%m: at time %t ERROR: tCL(avg) minimum violation on CLK by %t", $time, TCL_AVG_MIN*tck_avg - tcl_avg);
......
......@@ -296,11 +296,20 @@ BUFIO iclk_bufio_i (.O(sdclk), .I(sdclk_pre) );
BUFG clk_ref_i (.O(clk_ref), .I(clk_ref_pre));
BUFG mclk_i (.O(mclk),.I(mclk_pre) );
/* Instance template for module mmcm_phase_cntr */
`ifdef CVC
localparam real CLKFBOUT_MULT_REAL = CLKFBOUT_MULT;
localparam real CLKIN_PERIOD_REAL = CLKIN_PERIOD;
`endif
mmcm_phase_cntr #(
.PHASE_WIDTH (PHASE_WIDTH),
.CLKIN_PERIOD (CLKIN_PERIOD),
.BANDWIDTH (BANDWIDTH),
`ifdef CVC
.CLKFBOUT_MULT_F (CLKFBOUT_MULT_REAL),
.CLKIN_PERIOD (CLKIN_PERIOD_REAL),
`else
.CLKFBOUT_MULT_F (CLKFBOUT_MULT),
.CLKIN_PERIOD (CLKIN_PERIOD),
`endif
.DIVCLK_DIVIDE (DIVCLK_DIVIDE),
.CLKFBOUT_PHASE (CLKFBOUT_PHASE),
.CLKOUT0_PHASE (SDCLK_PHASE),
......
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