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Commit 0be6290b authored by Andrey Filippov's avatar Andrey Filippov
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modifying for LWIR sesnor

parent f35c087d
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Showing with 155 additions and 103 deletions
Makefile
View file @ 0be6290b
...@@ -24,6 +24,8 @@ COMMAND_FILES = py393/hargs \ ...@@ -24,6 +24,8 @@ COMMAND_FILES = py393/hargs \
py393/hargs-after \ py393/hargs-after \
py393/hargs-eyesis \ py393/hargs-eyesis \
py393/hargs-hispi \ py393/hargs-hispi \
py393/hargs-vospi \
py393/hargs-post-vospi \
py393/hargs-post-par12 \ py393/hargs-post-par12 \
py393/hargs-power_par12 \ py393/hargs-power_par12 \
py393/hargs-power-eyesis \ py393/hargs-power-eyesis \
......
cocotb/x393_cocotb_lwir_04.sav
View file @ 0be6290b
[*] [*]
[*] GTKWave Analyzer v3.3.78 (w)1999-2016 BSI [*] GTKWave Analyzer v3.3.78 (w)1999-2016 BSI
[*] Thu Apr 18 17:54:41 2019 [*] Fri Apr 19 05:17:10 2019
[*] [*]
[dumpfile] "/data_ssd/nc393/elphel393/fpga-elphel/x393/simulation/x393_dut-20190417235839553.fst" [dumpfile] "/data_ssd/nc393/elphel393/fpga-elphel/x393/simulation/x393_dut-20190418181641542.fst"
[dumpfile_mtime] "Thu Apr 18 15:11:41 2019" [dumpfile_mtime] "Fri Apr 19 04:43:12 2019"
[dumpfile_size] 3221703071 [dumpfile_size] 1314203898
[savefile] "/data_ssd/nc393/elphel393/fpga-elphel/x393/cocotb/x393_cocotb_lwir_04.sav" [savefile] "/data_ssd/nc393/elphel393/fpga-elphel/x393/cocotb/x393_cocotb_lwir_04.sav"
[timestart] 0 [timestart] 949964300
[size] 1804 1171 [size] 1804 1171
[pos] -1 -1 [pos] -1 -1
*-29.702909 45007388 1019686803 237352388 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 *-12.313575 949969888 1019686803 237352388 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] x393_dut. [treeopen] x393_dut.
[treeopen] x393_dut.simul_lwir160x120_vospi1_i. [treeopen] x393_dut.simul_lwir160x120_vospi1_i.
[treeopen] x393_dut.x393_i. [treeopen] x393_dut.x393_i.
...@@ -88,7 +88,7 @@ ...@@ -88,7 +88,7 @@
[treeopen] x393_dut.x393_i.timing393_i.camsync393_i. [treeopen] x393_dut.x393_i.timing393_i.camsync393_i.
[treeopen] x393_dut.x393_i.timing393_i.camsync393_i.i_frsync_pclk0. [treeopen] x393_dut.x393_i.timing393_i.camsync393_i.i_frsync_pclk0.
[sst_width] 346 [sst_width] 346
[signals_width] 335 [signals_width] 388
[sst_expanded] 1 [sst_expanded] 1
[sst_vpaned_height] 459 [sst_vpaned_height] 459
@820 @820
...@@ -7973,7 +7973,9 @@ x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.next ...@@ -7973,7 +7973,9 @@ x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.next
-group_end -group_end
@22 @22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.window_height[16:0] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.window_height[16:0]
@8022
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.row_left[13:0] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.row_left[13:0]
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.num_cols_r[6:0] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.num_cols_r[6:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.window_width[13:0] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.window_width[13:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.curr_x[12:0] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.curr_x[12:0]
...@@ -7985,9 +7987,8 @@ x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.abor ...@@ -7985,9 +7987,8 @@ x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.abor
-chn0 -chn0
@800200 @800200
-chn1 -chn1
@23
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.converter_type[2:0]
@22 @22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.converter_type[2:0]
x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.n_block_rows_m1[12:0] x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].jp_channel_i.n_block_rows_m1[12:0]
@28 @28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[1].mcntrl_tiled_rd_compressor_i.linear_mode x393_dut.x393_i.mcntrl393_i.sens_comp_block[1].mcntrl_tiled_rd_compressor_i.linear_mode
...@@ -8084,13 +8085,19 @@ x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.window_ ...@@ -8084,13 +8085,19 @@ x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.window_
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.window_width[13:0] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.window_width[13:0]
@1000200 @1000200
-memsensor0 -memsensor0
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.uncompressed
@22 @22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.raw_buf_ra[11:0]
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.buf_pxd[7:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.window_height[16:0] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.window_height[16:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.window_width[13:0] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.window_width[13:0]
@28 @28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.buf_we x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.buf_we
@22 @23
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.buf_din[63:0] x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.buf_din[63:0]
@8022
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.chn_rd_buf_i.ram_512x64w_1kx32r_i.waddr[8:0]
@200 @200
- -
@800200 @800200
...@@ -8144,9 +8151,24 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.huffman_stuf ...@@ -8144,9 +8151,24 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.huffman_stuf
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.huffman_stuffer_meta_i.bit_stuffer_metadata_i.data_out_valid x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.huffman_stuffer_meta_i.bit_stuffer_metadata_i.data_out_valid
@22 @22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.huffman_stuffer_meta_i.bit_stuffer_metadata_i.data_out[31:0] x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.huffman_stuffer_meta_i.bit_stuffer_metadata_i.data_out[31:0]
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.huffman_stuffer_meta_i.bit_stuffer_metadata_i.raw_flush
@800200
-cmprs_raw_buf
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_raw_buf_iface_i.raw_flush
@22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_raw_buf_iface_i.frame_finish_r[3:0]
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_raw_buf_iface_i.quad_r[3:0]
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_raw_buf_iface_i.quad_last
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_raw_buf_iface_i.rows_last[1:0]
@22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_raw_buf_iface_i.rows_left[16:0]
@200 @200
- -
@1000200 @1000200
-cmprs_raw_buf
-raw_dbg -raw_dbg
@c00200 @c00200
-stuffer_raw0 -stuffer_raw0
......
fpga_version.vh
View file @ 0be6290b
...@@ -35,9 +35,8 @@ ...@@ -35,9 +35,8 @@
* contains all the components and scripts required to completely simulate it * contains all the components and scripts required to completely simulate it
* with at least one of the Free Software programs. * with at least one of the Free Software programs.
*/ */
parameter FPGA_VERSION = 32'h03930120; // parameter FPGA_VERSION = 32'h03930120; // VOSPI
// parameter FPGA_VERSION = 32'h03930108; // parallel - in master branch
// parameter FPGA_VERSION = 32'h03930107; // parallel - 17.4 - restored delay after linear, fixed bug, all met // parameter FPGA_VERSION = 32'h03930107; // parallel - 17.4 - restored delay after linear, fixed bug, all met
// parameter FPGA_VERSION = 32'h03930110; //A serial - 17.4 - restored delay after linear, fixed bug, timing met // parameter FPGA_VERSION = 32'h03930110; //A serial - 17.4 - restored delay after linear, fixed bug, timing met
// parameter FPGA_VERSION = 32'h03930110; // serial - 17.4 - restored delay after linear, fixed bug, timing failed // parameter FPGA_VERSION = 32'h03930110; // serial - 17.4 - restored delay after linear, fixed bug, timing failed
......
py393/hargs-post-vospi 0 → 100644
View file @ 0be6290b
-d TARGET_MODE=1
-f /usr/local/verilog/system_defines.vh
-f /usr/local/verilog/x393_parameters.vh /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh
-l /usr/local/verilog/x393_cur_params_target.vh
-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle
-c bitstream_set_path /usr/local/verilog/x393_vospi.bit
-c measure_all "*DI"
-c setSensorClock 24.0 "2V5_LVDS"
-c set_rtc
py393/hargs-vospi 0 → 100644
View file @ 0be6290b
-d TARGET_MODE=1
-f /usr/local/verilog/system_defines.vh
-f /usr/local/verilog/x393_parameters.vh /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh
-l /usr/local/verilog/x393_cur_params_target.vh
-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle
-c bitstream_set_path /usr/local/verilog/x393_vospi.bit
-c setupSensorsPower "VOSPI" all 0 0.1
-c measure_all "*DI"
-c setSensorClock 24.0 "2V5_LVDS"
-c set_rtc
py393/x393_cmprs.py
View file @ 0be6290b
...@@ -361,6 +361,7 @@ class X393Cmprs(object): ...@@ -361,6 +361,7 @@ class X393Cmprs(object):
reset_frame = False, reset_frame = False,
copy_frame = False, copy_frame = False,
abort_late = False, abort_late = False,
linear = False,
verbose = 1): verbose = 1):
""" """
Control memory access (write) of a sensor channel Control memory access (write) of a sensor channel
...@@ -384,6 +385,7 @@ class X393Cmprs(object): ...@@ -384,6 +385,7 @@ class X393Cmprs(object):
reset_frame = reset_frame, reset_frame = reset_frame,
copy_frame = copy_frame, copy_frame = copy_frame,
abort_late = abort_late, abort_late = abort_late,
linear = linear,
verbose = verbose) verbose = verbose)
return return
except: except:
...@@ -417,6 +419,7 @@ class X393Cmprs(object): ...@@ -417,6 +419,7 @@ class X393Cmprs(object):
single = sngl, single = sngl,
reset_frame = reset_frame, reset_frame = reset_frame,
byte32 = byte32, byte32 = byte32,
linear = linear,
keep_open = False, keep_open = False,
extra_pages = 0, extra_pages = 0,
write_mem = False, write_mem = False,
...@@ -443,6 +446,7 @@ class X393Cmprs(object): ...@@ -443,6 +446,7 @@ class X393Cmprs(object):
window_left, window_left,
window_top, window_top,
byte32, byte32,
linear,
tile_width, tile_width,
tile_vstep, # = 16 tile_vstep, # = 16
tile_height, #= 18 tile_height, #= 18
...@@ -461,6 +465,7 @@ class X393Cmprs(object): ...@@ -461,6 +465,7 @@ class X393Cmprs(object):
@param window_left - 13-bit window left margin in 8-bursts (16 bytes) @param window_left - 13-bit window left margin in 8-bursts (16 bytes)
@param window_top - 16-bit window top margin (in scan lines @param window_top - 16-bit window top margin (in scan lines
@param byte32 - 32-byte columns @param byte32 - 32-byte columns
@param linear - linear mode instead of tiled (for raw images)
@param tile_width tile width, @param tile_width tile width,
@param tile_vstep tile vertical step in pixel rows (JPEG18/jp4 = 16) @param tile_vstep tile vertical step in pixel rows (JPEG18/jp4 = 16)
@param tile_height tile height: 18 for color JPEG, 16 fore JP$ flavors, @param tile_height tile height: 18 for color JPEG, 16 fore JP$ flavors,
...@@ -478,6 +483,7 @@ class X393Cmprs(object): ...@@ -478,6 +483,7 @@ class X393Cmprs(object):
single = False, single = False,
reset_frame = True, # Now needed to propagate start address False, reset_frame = True, # Now needed to propagate start address False,
byte32 = byte32, byte32 = byte32,
linear = linear,
keep_open = False, keep_open = False,
extra_pages = extra_pages, extra_pages = extra_pages,
write_mem = False, write_mem = False,
......
py393/x393_mcntrl.py
View file @ 0be6290b
...@@ -46,6 +46,7 @@ def func_encode_mode_scan_tiled (skip_too_late = False, ...@@ -46,6 +46,7 @@ def func_encode_mode_scan_tiled (skip_too_late = False,
single = False, single = False,
reset_frame = False, reset_frame = False,
byte32 = True, byte32 = True,
linear = False,
keep_open = False, keep_open = False,
extra_pages = 0, extra_pages = 0,
write_mem = False, write_mem = False,
...@@ -61,6 +62,7 @@ def func_encode_mode_scan_tiled (skip_too_late = False, ...@@ -61,6 +62,7 @@ def func_encode_mode_scan_tiled (skip_too_late = False,
@param single - run single frame @param single - run single frame
@param reset_frame - reset frame number @param reset_frame - reset frame number
@param byte32 - 32-byte columns (False - 16-byte columns) (not used in scanline mode) @param byte32 - 32-byte columns (False - 16-byte columns) (not used in scanline mode)
@param linear - linear mode instead of tiled (for raw images)
@param keep_open- for 8 or less rows - do not close page between accesses (not used in scanline mode) @param keep_open- for 8 or less rows - do not close page between accesses (not used in scanline mode)
@param extra_pages 2-bit number of extra pages that need to stay (not to be overwritten) in the buffer @param extra_pages 2-bit number of extra pages that need to stay (not to be overwritten) in the buffer
This argument can be used for read access with horizontal overlapping tiles This argument can be used for read access with horizontal overlapping tiles
...@@ -77,8 +79,8 @@ def func_encode_mode_scan_tiled (skip_too_late = False, ...@@ -77,8 +79,8 @@ def func_encode_mode_scan_tiled (skip_too_late = False,
rslt |= (extra_pages & ((1 << vrlg.MCONTR_LINTILE_EXTRAPG_BITS) - 1)) << vrlg.MCONTR_LINTILE_EXTRAPG rslt |= (extra_pages & ((1 << vrlg.MCONTR_LINTILE_EXTRAPG_BITS) - 1)) << vrlg.MCONTR_LINTILE_EXTRAPG
rslt |= (0,1)[keep_open] << vrlg.MCONTR_LINTILE_KEEP_OPEN rslt |= (0,1)[keep_open] << vrlg.MCONTR_LINTILE_KEEP_OPEN
rslt |= (0,1)[byte32] << vrlg.MCONTR_LINTILE_BYTE32 rslt |= (0,1)[byte32] << vrlg.MCONTR_LINTILE_BYTE32
rslt |= (0,1)[linear] << vrlg.MCONTR_LINTILE_LINEAR
rslt |= (0,1)[reset_frame] << vrlg.MCONTR_LINTILE_RST_FRAME rslt |= (0,1)[reset_frame] << vrlg.MCONTR_LINTILE_RST_FRAME
rslt |= (0,1)[single] << vrlg.MCONTR_LINTILE_SINGLE rslt |= (0,1)[single] << vrlg.MCONTR_LINTILE_SINGLE
rslt |= (0,1)[repetitive] << vrlg.MCONTR_LINTILE_REPEAT rslt |= (0,1)[repetitive] << vrlg.MCONTR_LINTILE_REPEAT
rslt |= (0,1)[disable_need] << vrlg.MCONTR_LINTILE_DIS_NEED rslt |= (0,1)[disable_need] << vrlg.MCONTR_LINTILE_DIS_NEED
......
py393/x393_sens_cmprs.py
View file @ 0be6290b
...@@ -131,13 +131,13 @@ FRAME_START_ADDRESS_INC = 0x80000 ...@@ -131,13 +131,13 @@ FRAME_START_ADDRESS_INC = 0x80000
# for now - single sensor type per interface # for now - single sensor type per interface
SENSOR_INTERFACES={x393_sensor.SENSOR_INTERFACE_PARALLEL: {"mv":2800, "freq":24.0, "iface":"2V5_LVDS"}, SENSOR_INTERFACES={x393_sensor.SENSOR_INTERFACE_PARALLEL: {"mv":2800, "freq":24.0, "iface":"2V5_LVDS"},
x393_sensor.SENSOR_INTERFACE_HISPI: {"mv":1820, "freq":24.444, "iface":"1V8_LVDS"}, x393_sensor.SENSOR_INTERFACE_HISPI: {"mv":1820, "freq":24.444, "iface":"1V8_LVDS"},
x393_sensor.SENSOR_INTERFACE_LWIR: {"mv":2800, "freq":24.0, "iface":"2V5_LVDS"}} x393_sensor.SENSOR_INTERFACE_VOSPI: {"mv":2800, "freq":24.0, "iface":"2V5_LVDS"}}
# x393_sensor.SENSOR_INTERFACE_HISPI: {"mv":2500, "freq":24.444, "iface":"1V8_LVDS"}} # x393_sensor.SENSOR_INTERFACE_HISPI: {"mv":2500, "freq":24.444, "iface":"1V8_LVDS"}}
#slave is 7 bit #slave is 7 bit
SENSOR_DEFAULTS= { x393_sensor.SENSOR_INTERFACE_PARALLEL: {"width":2592, "height":1944, "top":0, "left":0, "slave":0x48, "i2c_delay":100, "bayer":3}, SENSOR_DEFAULTS= { x393_sensor.SENSOR_INTERFACE_PARALLEL: {"width":2592, "height":1944, "top":0, "left":0, "slave":0x48, "i2c_delay":100, "bayer":3},
x393_sensor.SENSOR_INTERFACE_HISPI: {"width":4384, "height":3288, "top":0, "left":0, "slave":0x10, "i2c_delay":100, "bayer":2}, x393_sensor.SENSOR_INTERFACE_HISPI: {"width":4384, "height":3288, "top":0, "left":0, "slave":0x10, "i2c_delay":100, "bayer":2},
# x393_sensor.SENSOR_INTERFACE_LWIR: {"width":160, "height":120, "top":0, "left":0, "slave":0x2a, "i2c_delay":100, "bayer":2}} # x393_sensor.SENSOR_INTERFACE_VOSPI: {"width":160, "height":120, "top":0, "left":0, "slave":0x2a, "i2c_delay":100, "bayer":2}}
x393_sensor.SENSOR_INTERFACE_LWIR: {"width":160, "height":122, "top":0, "left":0, "slave":0x2a, "i2c_delay":100, "bayer":2}} x393_sensor.SENSOR_INTERFACE_VOSPI: {"width":160, "height":122, "top":0, "left":0, "slave":0x2a, "i2c_delay":100, "bayer":2}}
#SENSOR_DEFAULTS_SIMULATION= {x393_sensor.SENSOR_INTERFACE_PARALLEL: {"width":2592, "height":1944, "top":0, "left":0, "slave":0x48, "i2c_delay":100, "bayer":3}, #SENSOR_DEFAULTS_SIMULATION= {x393_sensor.SENSOR_INTERFACE_PARALLEL: {"width":2592, "height":1944, "top":0, "left":0, "slave":0x48, "i2c_delay":100, "bayer":3},
# x393_sensor.SENSOR_INTERFACE_HISPI: {"width":4384, "height":3288, "top":0, "left":0, "slave":0x10, "i2c_delay":100, "bayer":2}} # x393_sensor.SENSOR_INTERFACE_HISPI: {"width":4384, "height":3288, "top":0, "left":0, "slave":0x10, "i2c_delay":100, "bayer":2}}
...@@ -177,11 +177,11 @@ class X393SensCmprs(object): ...@@ -177,11 +177,11 @@ class X393SensCmprs(object):
SENSOR_DEFAULTS[x393_sensor.SENSOR_INTERFACE_HISPI]["top"]= 0 SENSOR_DEFAULTS[x393_sensor.SENSOR_INTERFACE_HISPI]["top"]= 0
SENSOR_DEFAULTS[x393_sensor.SENSOR_INTERFACE_HISPI]["left"]= 0 SENSOR_DEFAULTS[x393_sensor.SENSOR_INTERFACE_HISPI]["left"]= 0
# keep settings from Python program # keep settings from Python program
#SENSOR_DEFAULTS[x393_sensor.SENSOR_INTERFACE_LWIR]["width"]= vrlg.WOI_WIDTH #4 #SENSOR_DEFAULTS[x393_sensor.SENSOR_INTERFACE_VOSPI]["width"]= vrlg.WOI_WIDTH #4
#SENSOR_DEFAULTS[x393_sensor.SENSOR_INTERFACE_LWIR]["height"]= vrlg.WOI_HEIGHT #SENSOR_DEFAULTS[x393_sensor.SENSOR_INTERFACE_VOSPI]["height"]= vrlg.WOI_HEIGHT
#SENSOR_DEFAULTS[x393_sensor.SENSOR_INTERFACE_LWIR]["top"]= 0 #SENSOR_DEFAULTS[x393_sensor.SENSOR_INTERFACE_VOSPI]["top"]= 0
#SENSOR_DEFAULTS[x393_sensor.SENSOR_INTERFACE_LWIR]["left"]= 0 #SENSOR_DEFAULTS[x393_sensor.SENSOR_INTERFACE_VOSPI]["left"]= 0
# do not update LWIR defaults !!! # do not update VOSPI defaults !!!
if nomargins: if nomargins:
SENSOR_DEFAULTS[x393_sensor.SENSOR_INTERFACE_PARALLEL]["width"]= vrlg.WOI_WIDTH + 0 # 4 SENSOR_DEFAULTS[x393_sensor.SENSOR_INTERFACE_PARALLEL]["width"]= vrlg.WOI_WIDTH + 0 # 4
SENSOR_DEFAULTS[x393_sensor.SENSOR_INTERFACE_PARALLEL]["height"]= vrlg.WOI_HEIGHT + 0 SENSOR_DEFAULTS[x393_sensor.SENSOR_INTERFACE_PARALLEL]["height"]= vrlg.WOI_HEIGHT + 0
...@@ -760,7 +760,7 @@ class X393SensCmprs(object): ...@@ -760,7 +760,7 @@ class X393SensCmprs(object):
set_delays = False, set_delays = False,
quadrants = None) quadrants = None)
elif sensorType == x393_sensor.SENSOR_INTERFACE_LWIR: elif sensorType == x393_sensor.SENSOR_INTERFACE_VOSPI:
self.x393Sensor.set_sensor_io_ctl_lwir ( self.x393Sensor.set_sensor_io_ctl_lwir (
num_sensor = num_sensor, num_sensor = num_sensor,
mrst = True, mrst = True,
...@@ -772,7 +772,7 @@ class X393SensCmprs(object): ...@@ -772,7 +772,7 @@ class X393SensCmprs(object):
out_single = False, out_single = False,
reset_crc = True, reset_crc = True,
spi_clk = False) #None) spi_clk = False) #None)
print ("self.DRY_MODE=",self.DRY_MODE, " resetting LWIR sensor") print ("self.DRY_MODE=",self.DRY_MODE, " resetting VOSPI sensor")
if self.DRY_MODE: if self.DRY_MODE:
self.x393Sensor.set_sensor_io_ctl_lwir ( self.x393Sensor.set_sensor_io_ctl_lwir (
num_sensor = num_sensor, num_sensor = num_sensor,
...@@ -1327,6 +1327,7 @@ class X393SensCmprs(object): ...@@ -1327,6 +1327,7 @@ class X393SensCmprs(object):
left_tiles32 = window_left // 32 left_tiles32 = window_left // 32
last_tile32 = (window_left + ((num_macro_cols_m1 + 1) * 16) + tile_margin - 1) // 32 last_tile32 = (window_left + ((num_macro_cols_m1 + 1) * 16) + tile_margin - 1) // 32
width32 = last_tile32 - left_tiles32 + 1 # number of 32-wide tiles needed in each row width32 = last_tile32 - left_tiles32 + 1 # number of 32-wide tiles needed in each row
comp_mem_linear = (0,1)[cmode == vrlg.CMPRS_CBIT_CMODE_RAW]
# Already done # Already done
# if (bits16): # if (bits16):
# width32 *= 2 # width32 *= 2
...@@ -1345,6 +1346,7 @@ class X393SensCmprs(object): ...@@ -1345,6 +1346,7 @@ class X393SensCmprs(object):
print ("window_left = 0x%x"%(left_tiles32 * 2)) # window_left >> 4)) # left in 16-byte bursts, made even print ("window_left = 0x%x"%(left_tiles32 * 2)) # window_left >> 4)) # left in 16-byte bursts, made even
print ("window_top = 0x%x"%(window_top)) print ("window_top = 0x%x"%(window_top))
print ("byte32 = 1") print ("byte32 = 1")
print ("linear = ",comp_mem_linear)
print ("tile_width = 0x%x"%(tile_width)) print ("tile_width = 0x%x"%(tile_width))
print ("tile_vstep = 0x%x"%(tile_vstep)) print ("tile_vstep = 0x%x"%(tile_vstep))
print ("tile_height = 0x%x"%(tile_height)) print ("tile_height = 0x%x"%(tile_height))
...@@ -1365,6 +1367,7 @@ class X393SensCmprs(object): ...@@ -1365,6 +1367,7 @@ class X393SensCmprs(object):
window_left = left_tiles32 * 2, # input [31:0] window_left; window_left = left_tiles32 * 2, # input [31:0] window_left;
window_top = window_top, # input [31:0] window_top; window_top = window_top, # input [31:0] window_top;
byte32 = 1, byte32 = 1,
linear = comp_mem_linear,
tile_width = tile_width, tile_width = tile_width,
tile_vstep = tile_vstep, tile_vstep = tile_vstep,
tile_height = tile_height, tile_height = tile_height,
...@@ -1814,7 +1817,7 @@ class X393SensCmprs(object): ...@@ -1814,7 +1817,7 @@ class X393SensCmprs(object):
bit_delay = i2c_delay, bit_delay = i2c_delay,
verbose = verbose) verbose = verbose)
elif sensorType == x393_sensor.SENSOR_INTERFACE_LWIR: elif sensorType == x393_sensor.SENSOR_INTERFACE_VOSPI:
#slave address 0x2a(of 0x7f) #slave address 0x2a(of 0x7f)
#address - 16bit, data 16 bits #address - 16bit, data 16 bits
for page in (0, # Most of the commands for page in (0, # Most of the commands
...@@ -1852,7 +1855,7 @@ class X393SensCmprs(object): ...@@ -1852,7 +1855,7 @@ class X393SensCmprs(object):
if exit_step == 21: return False if exit_step == 21: return False
# not used for LWIR # not used for VOSPI
self.x393Camsync.camsync_setup ( self.x393Camsync.camsync_setup (
sensor_mask = sensor_mask, sensor_mask = sensor_mask,
trigger_mode = False, # False - async (free running) sensor mode, True - triggered (global reset) sensor mode trigger_mode = False, # False - async (free running) sensor mode, True - triggered (global reset) sensor mode
......
py393/x393_sensor.py
View file @ 0be6290b
...@@ -48,7 +48,7 @@ import subprocess ...@@ -48,7 +48,7 @@ import subprocess
#import x393_sens_cmprs #import x393_sens_cmprs
SENSOR_INTERFACE_PARALLEL = "PAR12" SENSOR_INTERFACE_PARALLEL = "PAR12"
SENSOR_INTERFACE_HISPI = "HISPI" SENSOR_INTERFACE_HISPI = "HISPI"
SENSOR_INTERFACE_LWIR = "LWIR" SENSOR_INTERFACE_VOSPI = "VOSPI"
class X393Sensor(object): class X393Sensor(object):
DRY_MODE= True # True DRY_MODE= True # True
...@@ -77,7 +77,7 @@ class X393Sensor(object): ...@@ -77,7 +77,7 @@ class X393Sensor(object):
if self.DRY_MODE is True: if self.DRY_MODE is True:
print ("===== Running in dry mode, using parallel sensor======") print ("===== Running in dry mode, using parallel sensor======")
return SENSOR_INTERFACE_PARALLEL return SENSOR_INTERFACE_PARALLEL
sens_type = (SENSOR_INTERFACE_PARALLEL, SENSOR_INTERFACE_HISPI,SENSOR_INTERFACE_LWIR)[self.x393_axi_tasks.read_status(address=0xfe)] # "PAR12" , "HISPI" sens_type = (SENSOR_INTERFACE_PARALLEL, SENSOR_INTERFACE_HISPI,SENSOR_INTERFACE_VOSPI)[self.x393_axi_tasks.read_status(address=0xfe)] # "PAR12" , "HISPI"
print ("===== Sensor type read from FPGA = >>> %s <<< ======"%(sens_type)) print ("===== Sensor type read from FPGA = >>> %s <<< ======"%(sens_type))
return sens_type return sens_type
...@@ -175,7 +175,7 @@ class X393Sensor(object): ...@@ -175,7 +175,7 @@ class X393Sensor(object):
status= self.get_status_sensor_io(num_sensor) status= self.get_status_sensor_io(num_sensor)
print ("print_status_sensor_io(%d):"%(num_sensor)) print ("print_status_sensor_io(%d):"%(num_sensor))
if (sensorType == SENSOR_INTERFACE_LWIR): if (sensorType == SENSOR_INTERFACE_VOSPI):
print (" segment_id = %d"%((status>> 0) & 0x0f)) print (" segment_id = %d"%((status>> 0) & 0x0f))
print (" gpio_in = %d"%((status>> 4) & 0x0f)) print (" gpio_in = %d"%((status>> 4) & 0x0f))
print (" in_busy = %d"%((status>> 8) & 1)) print (" in_busy = %d"%((status>> 8) & 1))
...@@ -486,7 +486,7 @@ class X393Sensor(object): ...@@ -486,7 +486,7 @@ class X393Sensor(object):
@param gpio3 = Output control for GPIO0: 3 - nop, 1 - set low, 2 - set high, 3 - input @param gpio3 = Output control for GPIO0: 3 - nop, 1 - set low, 2 - set high, 3 - input
@param fake = Do not use, just for keeping hardware portsNone, @param fake = Do not use, just for keeping hardware portsNone,
@param mosi = Do not use, just for keeping hardware portsNone, @param mosi = Do not use, just for keeping hardware portsNone,
@return LWIR sensor i/o control word @return VOSPI sensor i/o control word
""" """
rslt = 0 rslt = 0
if not mrst is None: if not mrst is None:
...@@ -1075,7 +1075,7 @@ class X393Sensor(object): ...@@ -1075,7 +1075,7 @@ class X393Sensor(object):
@param gpio3 = Output control for GPIO0: 3 - nop, 1 - set low, 2 - set high, 3 - input @param gpio3 = Output control for GPIO0: 3 - nop, 1 - set low, 2 - set high, 3 - input
@param fake = Do not use, just for keeping hardware portsNone, @param fake = Do not use, just for keeping hardware portsNone,
@param mosi = Do not use, just for keeping hardware portsNone, @param mosi = Do not use, just for keeping hardware portsNone,
@return LWIR sensor i/o control word @return VOSPI sensor i/o control word
""" """
try: try:
if (num_sensor == all) or (num_sensor[0].upper() == "A"): #all is a built-in function if (num_sensor == all) or (num_sensor[0].upper() == "A"): #all is a built-in function
......
sensor/sens_lepton3.v
View file @ 0be6290b
...@@ -159,10 +159,10 @@ module sens_lepton3 #( ...@@ -159,10 +159,10 @@ module sens_lepton3 #(
output lwir_mrst, // output, externally connected to inout port output lwir_mrst, // output, externally connected to inout port
output lwir_pwdn, // output, externally connected to inout port output lwir_pwdn, // output, externally connected to inout port
inout mipi_dp, // input diff, not implemented in lepton3 sensor input mipi_dp, // input diff, not implemented in lepton3 sensor
inout mipi_dn, // input diff, not implemented in lepton3 sensor input mipi_dn, // input diff, not implemented in lepton3 sensor
inout mipi_clkp, // input diff, not implemented in lepton3 sensor input mipi_clkp, // input diff, not implemented in lepton3 sensor
inout mipi_clkn, // input diff, not implemented in lepton3 sensor input mipi_clkn, // input diff, not implemented in lepton3 sensor
inout senspgm, // SENSPGM I/O pin inout senspgm, // SENSPGM I/O pin
inout sns_ctl, // npot used at all inout sns_ctl, // npot used at all
...@@ -170,7 +170,12 @@ module sens_lepton3 #( ...@@ -170,7 +170,12 @@ module sens_lepton3 #(
output [15:0] pxd, // @pclk output [15:0] pxd, // @pclk
output hact, // @pclktwice per actual line output hact, // @pclktwice per actual line
output sof, // @pclk output sof, // @pclk
output eof // @pclk output eof, // @pclk
// not used PADS, keep for compatibility with PCB
input dp2, // input reserved
input dn2, // input reserved
input dn6 // input reserved
); );
localparam VOSPI_STATUS_BITS = 14; localparam VOSPI_STATUS_BITS = 14;
// Status data (6 bits + 4) // Status data (6 bits + 4)
...@@ -182,6 +187,9 @@ module sens_lepton3 #( ...@@ -182,6 +187,9 @@ module sens_lepton3 #(
wire out_busy; wire out_busy;
wire [ 3:0] gpio_in; // none currently used wire [ 3:0] gpio_in; // none currently used
wire fake_in; wire fake_in;
wire fake_dp2; // input reserved
wire fake_dn2; // input reserved
wire fake_dn6; // input reserved
assign status = { assign status = {
fake_in, fake_in,
...@@ -252,7 +260,7 @@ module sens_lepton3 #( ...@@ -252,7 +260,7 @@ module sens_lepton3 #(
// temporary? // temporary?
assign fake_in = sns_ctl_int ^ mipi_dp_int ^ mipi_dn_int ^ mipi_clkp_int ^ mipi_clkn_int; assign fake_in = sns_ctl_int ^ mipi_dp_int ^ mipi_dn_int ^ mipi_clkp_int ^ mipi_clkn_int ^ fake_dp2 ^ fake_dn2 ^ fake_dn6;
assign out_en_single_mclk = set_ctrl_r && data_r[VOSPI_OUT_EN_SINGL] && !mrst; assign out_en_single_mclk = set_ctrl_r && data_r[VOSPI_OUT_EN_SINGL] && !mrst;
assign crc_reset_mclk = set_ctrl_r && data_r[VOSPI_RESET_CRC] && !mrst; assign crc_reset_mclk = set_ctrl_r && data_r[VOSPI_RESET_CRC] && !mrst;
...@@ -378,23 +386,6 @@ module sens_lepton3 #( ...@@ -378,23 +386,6 @@ module sens_lepton3 #(
.T (1'b0) // input - always on .T (1'b0) // input - always on
); );
/*
oddr_ss #(
.IOSTANDARD (PXD_IOSTANDARD),
.SLEW (PXD_SLEW),
.DDR_CLK_EDGE ("OPPOSITE_EDGE"),
.INIT (1'b0),
.SRTYPE ("SYNC")
) lwir_mclk_i (
.clk (sns_mclk), // input
.ce (sns_mclk_en_lwir_mclk[1]), // input
.rst (prst), // input
.set (1'b0), // input
.din (2'b01), // input[1:0]
.tin (1'b0), // input
.dq (lwir_mclk) // output
);
*/
iobuf #( // spi_miso iobuf #( // spi_miso
.DRIVE (PXD_DRIVE), .DRIVE (PXD_DRIVE),
.IBUF_LOW_PWR (PXD_IBUF_LOW_PWR), .IBUF_LOW_PWR (PXD_IBUF_LOW_PWR),
...@@ -484,52 +475,32 @@ module sens_lepton3 #( ...@@ -484,52 +475,32 @@ module sens_lepton3 #(
); );
// MIPI - anyway it is not implemented, IOSTANDARD not known, put just single-ended input buffers // MIPI - anyway it is not implemented, IOSTANDARD not known, put just single-ended input buffers
iobuf #( // mipi_dp ibuf_ibufg #(
.DRIVE (PXD_DRIVE), .IOSTANDARD (PXD_IOSTANDARD)
.IBUF_LOW_PWR (PXD_IBUF_LOW_PWR),
.IOSTANDARD (PXD_IOSTANDARD),
.SLEW (PXD_SLEW)
) mipi_dp_i ( ) mipi_dp_i (
.O (mipi_dp_int), // output - currently not used .O(mipi_dp_int), // output - currently not used
.IO (mipi_dp), // inout I/O pad .I(mipi_dp) // inout I/O pad
.I (1'b0), // input
.T (1'b1) // input - always off
); );
iobuf #( // mipi_dn ibuf_ibufg #(
.DRIVE (PXD_DRIVE), .IOSTANDARD (PXD_IOSTANDARD)
.IBUF_LOW_PWR (PXD_IBUF_LOW_PWR),
.IOSTANDARD (PXD_IOSTANDARD),
.SLEW (PXD_SLEW)
) mipi_dn_i ( ) mipi_dn_i (
.O (mipi_dn_int), // output - currently not used .O(mipi_dn_int), // output - currently not used
.IO (mipi_dn), // inout I/O pad .I(mipi_dn) // inout I/O pad
.I (1'b0), // input
.T (1'b1) // input - always off
); );
iobuf #( // mipi_clkp ibuf_ibufg #(
.DRIVE (PXD_DRIVE), .IOSTANDARD (PXD_IOSTANDARD)
.IBUF_LOW_PWR (PXD_IBUF_LOW_PWR),
.IOSTANDARD (PXD_IOSTANDARD),
.SLEW (PXD_SLEW)
) mipi_clkp_i ( ) mipi_clkp_i (
.O (mipi_clkp_int), // output - currently not used .O(mipi_clkp_int), // output - currently not used
.IO (mipi_clkp), // inout I/O pad .I(mipi_clkp) // inout I/O pad
.I (1'b0), // input
.T (1'b1) // input - always off
); );
iobuf #( // mipi_clkn ibuf_ibufg #(
.DRIVE (PXD_DRIVE), .IOSTANDARD (PXD_IOSTANDARD)
.IBUF_LOW_PWR (PXD_IBUF_LOW_PWR),
.IOSTANDARD (PXD_IOSTANDARD),
.SLEW (PXD_SLEW)
) mipi_clkn_i ( ) mipi_clkn_i (
.O (mipi_clkn_int), // output - currently not used .O(mipi_clkn_int), // output - currently not used
.IO (mipi_clkn), // inout I/O pad .I(mipi_clkn) // inout I/O pad
.I (1'b0), // input
.T (1'b1) // input - always off
); );
iobuf #( // senspgm iobuf #( // senspgm
...@@ -556,6 +527,26 @@ module sens_lepton3 #( ...@@ -556,6 +527,26 @@ module sens_lepton3 #(
.T (1'b1) // input - always off .T (1'b1) // input - always off
); );
ibuf_ibufg #(
.IOSTANDARD (PXD_IOSTANDARD)
) fake_dp2_i (
.O(fake_dp2),
.I(dp2)
);
ibuf_ibufg #(
.IOSTANDARD (PXD_IOSTANDARD)
) fake_dn2_i (
.O(fake_dn2),
.I(dn2)
);
ibuf_ibufg #(
.IOSTANDARD (PXD_IOSTANDARD)
) fake_dn6_i (
.O(fake_dn6),
.I(dn6)
);
wire segment_done; wire segment_done;
wire discard_segment; wire discard_segment;
......
sensor/sensor_channel.v
View file @ 0be6290b
...@@ -1084,7 +1084,11 @@ module sensor_channel#( ...@@ -1084,7 +1084,11 @@ module sensor_channel#(
.pxd (pxd[15:0]), // output[15:0] .pxd (pxd[15:0]), // output[15:0]
.hact (hact), // output .hact (hact), // output
.sof (sof), // output .sof (sof), // output
.eof (eof) // output .eof (eof), // output
// not used PADS, keep for compatibility with PCB
.dp2 (sns_dp40[2]), // input reserved
.dn2 (sns_dn40[2]), // input reserved
.dn6 (sns_dn76[6]) // input reserved
); );
// sns_dn76[6] - not used // sns_dn76[6] - not used
// sns_dn40[2] - not used // sns_dn40[2] - not used
......
sensor/sensors393.v
View file @ 0be6290b
...@@ -653,7 +653,8 @@ module sensors393 #( ...@@ -653,7 +653,8 @@ module sensors393 #(
`endif `endif
.SENSIO_DELAYS (SENSIO_DELAYS), .SENSIO_DELAYS (SENSIO_DELAYS),
`ifdef MON_HISPI `ifdef HISPI
`ifdef MON_HISPI
.SENSOR_TIMING_STATUS_REG_BASE (SENSOR_TIMING_STATUS_REG_BASE), .SENSOR_TIMING_STATUS_REG_BASE (SENSOR_TIMING_STATUS_REG_BASE),
.SENSOR_TIMING_STATUS_REG_INC (SENSOR_TIMING_STATUS_REG_INC), .SENSOR_TIMING_STATUS_REG_INC (SENSOR_TIMING_STATUS_REG_INC),
.SENSOR_TIMING_BITS (SENSOR_TIMING_BITS), .SENSOR_TIMING_BITS (SENSOR_TIMING_BITS),
...@@ -661,6 +662,7 @@ module sensors393 #( ...@@ -661,6 +662,7 @@ module sensors393 #(
.SENSOR_TIMING_LANE (SENSOR_TIMING_LANE), .SENSOR_TIMING_LANE (SENSOR_TIMING_LANE),
.SENSOR_TIMING_FROM (SENSOR_TIMING_FROM), .SENSOR_TIMING_FROM (SENSOR_TIMING_FROM),
.SENSOR_TIMING_TO (SENSOR_TIMING_TO), .SENSOR_TIMING_TO (SENSOR_TIMING_TO),
`endif
`endif `endif
.SENSI2C_ABS_RADDR (SENSI2C_ABS_RADDR), .SENSI2C_ABS_RADDR (SENSI2C_ABS_RADDR),
.SENSI2C_REL_RADDR (SENSI2C_REL_RADDR), .SENSI2C_REL_RADDR (SENSI2C_REL_RADDR),
......
x393_global.tcl
View file @ 0be6290b
...@@ -45,7 +45,7 @@ while { [gets $infile line] >= 0 } { ...@@ -45,7 +45,7 @@ while { [gets $infile line] >= 0 } {
set LWIR 0 set LWIR 0
seek $infile 0 start seek $infile 0 start
while { [gets $infile line] >= 0 } { while { [gets $infile line] >= 0 } {
if { [regexp {(.*)`define(\s*)LWIRI} $line matched prematch] } { if { [regexp {(.*)`define(\s*)LWIR} $line matched prematch] } {
if {[regexp "//" $prematch] != 0} { continue } if {[regexp "//" $prematch] != 0} { continue }
set LWIR 1 set LWIR 1
break break
......
x393_placement.tcl
View file @ 0be6290b
...@@ -44,7 +44,7 @@ while { [gets $infile line] >= 0 } { ...@@ -44,7 +44,7 @@ while { [gets $infile line] >= 0 } {
set LWIR 0 set LWIR 0
seek $infile 0 start seek $infile 0 start
while { [gets $infile line] >= 0 } { while { [gets $infile line] >= 0 } {
if { [regexp {(.*)`define(\s*)LWIRI} $line matched prematch] } { if { [regexp {(.*)`define(\s*)LWIR} $line matched prematch] } {
if {[regexp "//" $prematch] != 0} { continue } if {[regexp "//" $prematch] != 0} { continue }
set LWIR 1 set LWIR 1
break break
......
x393_timing.tcl
View file @ 0be6290b
...@@ -44,7 +44,7 @@ while { [gets $infile line] >= 0 } { ...@@ -44,7 +44,7 @@ while { [gets $infile line] >= 0 } {
set LWIR 0 set LWIR 0
seek $infile 0 start seek $infile 0 start
while { [gets $infile line] >= 0 } { while { [gets $infile line] >= 0 } {
if { [regexp {(.*)`define(\s*)LWIRI} $line matched prematch] } { if { [regexp {(.*)`define(\s*)LWIR} $line matched prematch] } {
if {[regexp "//" $prematch] != 0} { continue } if {[regexp "//" $prematch] != 0} { continue }
set LWIR 1 set LWIR 1
break break
...@@ -77,7 +77,9 @@ create_clock -name ffclk0 -period 41.667 [get_ports {ffclk0p}] ...@@ -77,7 +77,9 @@ create_clock -name ffclk0 -period 41.667 [get_ports {ffclk0p}]
#Generated clocks are assumed to be tied to clkin1 (not 2), so until external ffclk0 is constrained, derivative clocks are not generated #Generated clocks are assumed to be tied to clkin1 (not 2), so until external ffclk0 is constrained, derivative clocks are not generated
create_generated_clock -name pclk [get_nets clocks393_i/dual_clock_pclk_i/clk1x_pre ] create_generated_clock -name pclk [get_nets clocks393_i/dual_clock_pclk_i/clk1x_pre ]
if ($HISPI) { if { $LWIR} {
# Nothing here yet
} elseif {$HISPI} {
#WARNING: [Vivado 12-4777] Setting CLOCK_DEDICATED_ROUTE constraint on the PARENT net instead of the specified net segment (net name: sensors393_i/sensor_channel_block[0].sensor_channel_i/sens_10398_i/sens_hispi12l4_i/sens_hispi_clock_i/clk_in). Placer only honors CLOCK_DEDICATED_ROUTE when set on the PARENT net, e.g. net segment directly connected to the driver. To eliminate this message, please update your constraint to specify the PARENT net instead. [/home/xilinx/vdt/x393/x393_timing.tcl:68] #WARNING: [Vivado 12-4777] Setting CLOCK_DEDICATED_ROUTE constraint on the PARENT net instead of the specified net segment (net name: sensors393_i/sensor_channel_block[0].sensor_channel_i/sens_10398_i/sens_hispi12l4_i/sens_hispi_clock_i/clk_in). Placer only honors CLOCK_DEDICATED_ROUTE when set on the PARENT net, e.g. net segment directly connected to the driver. To eliminate this message, please update your constraint to specify the PARENT net instead. [/home/xilinx/vdt/x393/x393_timing.tcl:68]
# set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets sensors393_i/sensor_channel_block\[0\].sensor_channel_i/sens_10398_i/sens_hispi12l4_i/sens_hispi_clock_i/clk_in] # set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets sensors393_i/sensor_channel_block\[0\].sensor_channel_i/sens_10398_i/sens_hispi12l4_i/sens_hispi_clock_i/clk_in]
# set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets sensors393_i/sensor_channel_block\[1\].sensor_channel_i/sens_10398_i/sens_hispi12l4_i/sens_hispi_clock_i/clk_in] # set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets sensors393_i/sensor_channel_block\[1\].sensor_channel_i/sens_10398_i/sens_hispi12l4_i/sens_hispi_clock_i/clk_in]
......
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