more on toc

README.md

+VDT plugin
+==========
+
 Table of Contents                                                                                                                                                                                                                                                             
-=================
-`` ``                                                                                                                                                                                                                                                             
+-----------------
+                                                                                                                                                                                                                                                             
   * [VDT plugin documentation](#vdt-plugin-documentation)
   * [Instalation of VDT plugin and related programs](#instalation-of-vdt-plugin-and-related-programs)
     * [Installation of Xilinx tools](#installation-of-xilinx-tools)
@@ -18,9 +21,10 @@ Table of Contents
       * [Configuring JavaCC (optional)](#configuring-javacc-optional)
       * [Building and running VDT](#building-and-running-vdt)
   * [Import and configuration of the sample project in VDT](#import-and-configuration-of-the-sample-project-in-vdt)
-      * [Import <a href="https://github.com/Elphel/eddr3">eddr3</a> project](#import-eddr3-project)
+    * [Import eddr3 project](#import-eddr3-project)
     * [configuration of VDT for eddr3 project](#configuration-of-vdt-for-eddr3-project)
       * [Configure access to the server with Xilinx tools](#configure-access-to-the-server-with-xilinx-tools)
+      
 ##VDT plugin documentation
 Documentation is available in a separate [vdt_docs](https://github.com/Elphel/vdt-docs) repository.
 ##Instalation of VDT plugin and related programs
@@ -174,7 +178,7 @@ an existing one. We will use DDR3 memory interface project as an example.
 Sample project is a DDR3 memory interface for Xilinx Zynq SOC that does not depend on
 undocumented featuers and encrypted modules and can be simulated with the Free Software
 tools.
-### Import [eddr3](https://github.com/Elphel/eddr3) project
+### Import eddr3 project
 ```
 git clone git@github.com:Elphel/eddr3.git
 ```