Loading README.md +27 −23 Original line number Original line Diff line number Diff line VDT plugin ========== Table of Contents Table of Contents ================= ----------------- `` `` * [VDT plugin documentation](#vdt-plugin-documentation) * [VDT plugin documentation](#vdt-plugin-documentation) * [Instalation of VDT plugin and related programs](#instalation-of-vdt-plugin-and-related-programs) * [Instalation of VDT plugin and related programs](#instalation-of-vdt-plugin-and-related-programs) * [Installation of Xilinx tools](#installation-of-xilinx-tools) * [Installation of Xilinx tools](#installation-of-xilinx-tools) Loading @@ -18,9 +21,10 @@ Table of Contents * [Configuring JavaCC (optional)](#configuring-javacc-optional) * [Configuring JavaCC (optional)](#configuring-javacc-optional) * [Building and running VDT](#building-and-running-vdt) * [Building and running VDT](#building-and-running-vdt) * [Import and configuration of the sample project in VDT](#import-and-configuration-of-the-sample-project-in-vdt) * [Import and configuration of the sample project in VDT](#import-and-configuration-of-the-sample-project-in-vdt) * [Import <a href="https://github.com/Elphel/eddr3">eddr3</a> project](#import-eddr3-project) * [Import eddr3 project](#import-eddr3-project) * [configuration of VDT for eddr3 project](#configuration-of-vdt-for-eddr3-project) * [configuration of VDT for eddr3 project](#configuration-of-vdt-for-eddr3-project) * [Configure access to the server with Xilinx tools](#configure-access-to-the-server-with-xilinx-tools) * [Configure access to the server with Xilinx tools](#configure-access-to-the-server-with-xilinx-tools) ##VDT plugin documentation ##VDT plugin documentation Documentation is available in a separate [vdt_docs](https://github.com/Elphel/vdt-docs) repository. Documentation is available in a separate [vdt_docs](https://github.com/Elphel/vdt-docs) repository. ##Instalation of VDT plugin and related programs ##Instalation of VDT plugin and related programs Loading Loading @@ -174,7 +178,7 @@ an existing one. We will use DDR3 memory interface project as an example. Sample project is a DDR3 memory interface for Xilinx Zynq SOC that does not depend on Sample project is a DDR3 memory interface for Xilinx Zynq SOC that does not depend on undocumented featuers and encrypted modules and can be simulated with the Free Software undocumented featuers and encrypted modules and can be simulated with the Free Software tools. tools. ### Import [eddr3](https://github.com/Elphel/eddr3) project ### Import eddr3 project ``` ``` git clone git@github.com:Elphel/eddr3.git git clone git@github.com:Elphel/eddr3.git ``` ``` Loading Loading
README.md +27 −23 Original line number Original line Diff line number Diff line VDT plugin ========== Table of Contents Table of Contents ================= ----------------- `` `` * [VDT plugin documentation](#vdt-plugin-documentation) * [VDT plugin documentation](#vdt-plugin-documentation) * [Instalation of VDT plugin and related programs](#instalation-of-vdt-plugin-and-related-programs) * [Instalation of VDT plugin and related programs](#instalation-of-vdt-plugin-and-related-programs) * [Installation of Xilinx tools](#installation-of-xilinx-tools) * [Installation of Xilinx tools](#installation-of-xilinx-tools) Loading @@ -18,9 +21,10 @@ Table of Contents * [Configuring JavaCC (optional)](#configuring-javacc-optional) * [Configuring JavaCC (optional)](#configuring-javacc-optional) * [Building and running VDT](#building-and-running-vdt) * [Building and running VDT](#building-and-running-vdt) * [Import and configuration of the sample project in VDT](#import-and-configuration-of-the-sample-project-in-vdt) * [Import and configuration of the sample project in VDT](#import-and-configuration-of-the-sample-project-in-vdt) * [Import <a href="https://github.com/Elphel/eddr3">eddr3</a> project](#import-eddr3-project) * [Import eddr3 project](#import-eddr3-project) * [configuration of VDT for eddr3 project](#configuration-of-vdt-for-eddr3-project) * [configuration of VDT for eddr3 project](#configuration-of-vdt-for-eddr3-project) * [Configure access to the server with Xilinx tools](#configure-access-to-the-server-with-xilinx-tools) * [Configure access to the server with Xilinx tools](#configure-access-to-the-server-with-xilinx-tools) ##VDT plugin documentation ##VDT plugin documentation Documentation is available in a separate [vdt_docs](https://github.com/Elphel/vdt-docs) repository. Documentation is available in a separate [vdt_docs](https://github.com/Elphel/vdt-docs) repository. ##Instalation of VDT plugin and related programs ##Instalation of VDT plugin and related programs Loading Loading @@ -174,7 +178,7 @@ an existing one. We will use DDR3 memory interface project as an example. Sample project is a DDR3 memory interface for Xilinx Zynq SOC that does not depend on Sample project is a DDR3 memory interface for Xilinx Zynq SOC that does not depend on undocumented featuers and encrypted modules and can be simulated with the Free Software undocumented featuers and encrypted modules and can be simulated with the Free Software tools. tools. ### Import [eddr3](https://github.com/Elphel/eddr3) project ### Import eddr3 project ``` ``` git clone git@github.com:Elphel/eddr3.git git clone git@github.com:Elphel/eddr3.git ``` ``` Loading
