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vdt-plugin
Commit bd4961b3 authored by Andrey Filippov's avatar Andrey Filippov
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Merge branch 'master' of github.com:Elphel/vdt-plugin

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README.md
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...@@ -21,12 +21,12 @@ Table of Contents ...@@ -21,12 +21,12 @@ Table of Contents
* [Configuring JavaCC (optional)](#configuring-javacc-optional) * [Configuring JavaCC (optional)](#configuring-javacc-optional)
* [Building and running VDT](#building-and-running-vdt) * [Building and running VDT](#building-and-running-vdt)
* [Import and configuration of the sample project in VDT](#import-and-configuration-of-the-sample-project-in-vdt) * [Import and configuration of the sample project in VDT](#import-and-configuration-of-the-sample-project-in-vdt)
* [Import eddr3 project](#import-eddr3-project) * [Import x393 project](#import-x393-project)
* [Configuration of VDT for eddr3 project](#configuration-of-vdt-for-eddr3-project) * [Configuration of VDT for x393 project](#configuration-of-vdt-for-x393-project)
* [Configure access to the server with Xilinx tools](#configure-access-to-the-server-with-xilinx-tools) * [Configure access to the server with Xilinx tools](#configure-access-to-the-server-with-xilinx-tools)
* [Copy unisims library to the local directory](#copy-unisims-library-to-the-local-directory) * [Copy unisims library to the local directory](#copy-unisims-library-to-the-local-directory)
* [Patch primitive(s) to work with Icarus Verilog](#patch-primitives-to-work-with-icarus-verilog) * [Patch primitive(s) to work with Icarus Verilog](#patch-primitives-to-work-with-icarus-verilog)
* [Simulating eddr3 project with Icarus Verilog](#simulating-eddr3-project-with-icarus-verilog) * [Simulating x393 project with Icarus Verilog](#simulating-x393-project-with-icarus-verilog)
##VDT plugin documentation ##VDT plugin documentation
Documentation is available in a separate [vdt_docs](https://github.com/Elphel/vdt-docs) repository. Documentation is available in a separate [vdt_docs](https://github.com/Elphel/vdt-docs) repository.
...@@ -51,13 +51,13 @@ sudo apt-get install gtkwave ...@@ -51,13 +51,13 @@ sudo apt-get install gtkwave
``` ```
#### other programs needed for building Icarus Verilog #### other programs needed for building Icarus Verilog
``` ```
sudo apt-get install autoconf gperf flex bison g++ zlib1g-dev libbz2-dev sudo apt-get install autoconf gperf flex bison g++ zlib1g-dev libbz2-dev git
``` ```
#### Java JDK #### Java JDK
For most tasks JRE is sufficient, but if you would like to be able to modify and recompile Verilog For most tasks JRE is sufficient, but if you would like to be able to modify and recompile Verilog
language parsing you will need java compiler that comes with the full JDK language parsing you will need java compiler that comes with the full JDK
``` ```
sudo apt-get install openjdk-7-jdk sudo apt-get install default-jdk
``` ```
### Icarus Verilog ### Icarus Verilog
Icarus Verilog has to be compiled from the source code that is available in git repository: Icarus Verilog has to be compiled from the source code that is available in git repository:
...@@ -66,8 +66,10 @@ git clone git://github.com/steveicarus/iverilog.git ...@@ -66,8 +66,10 @@ git clone git://github.com/steveicarus/iverilog.git
cd iverilog cd iverilog
sh autoconf.sh sh autoconf.sh
./configure ./configure
```
Update: Removed instructions to modify Icarus code - current version does not need Update: Removed instructions to modify Icarus code - current version does not need
them anymore, so just proceed with them anymore, so just proceed with
```
make make
sudo make install sudo make install
``` ```
...@@ -85,14 +87,13 @@ Unzip it in any convenient location - this location will be provided to Eclipse ...@@ -85,14 +87,13 @@ Unzip it in any convenient location - this location will be provided to Eclipse
### Eclipse IDE ### Eclipse IDE
You will need _Eclipse IDE for Java EE Developers_ (capable of plugin development), You will need _Eclipse IDE for Java EE Developers_ (capable of plugin development),
latest tested version is Luna latest tested version is Mars (eclipse-jee-mars-2-linux-gtk-x86_64.tar.gz). VDT plugin
(eclipse-jee-luna-SR1-linux-gtk-x86_64.tar.gz). VDT plugin is experimental and I would is experimental and I would recommend to have a separate (from your other development)
recommend to have a separate (from your other development) installation. VDT uses installation. VDT uses modified version of [VEditor](http://sourceforge.net/projects/veditor/)
modified version of [VEditor](http://sourceforge.net/projects/veditor/) and any other and any other versions of VEditor installed will conflict with VDT.
versions of VEditor installed will conflict with VDT.
**Update:** Mars ( eclipse-jee-mars-R-linux-gtk-x86_64.tar.gz ) seems to be working too if There are still issues with GTK3 (refresh of the windows content, animated icons), all seems
Gtk3 is disabled (Gtk2 used instead) by adding the following 2 lines: to work if Gtk3 is disabled (Gtk2 used instead) by adding the following 2 lines in the eclipse.ini file.
``` ```
--launcher.GTK_version --launcher.GTK_version
2 2
...@@ -101,9 +102,9 @@ are added just before line ...@@ -101,9 +102,9 @@ are added just before line
``` ```
--launcher.appendVmargs. --launcher.appendVmargs.
``` ```
in the eclipse.ini file. With Gtk 3 the hover text (such as problems, module instance templates)
is shown black on black background and tool states icons are invisible.
Additionally a fix is required to make menu tooltips visible (https://github.com/dirruk1/gnome-breeze/issues/7#issuecomment-109325330) :
«go to system settings > color > options and make sure "apply colors to non-Qt colors" is switched off, then log out and back in and see if the colors are normal. The tooltips are not supposed to have a light background.»
### Installation of VDT plugin itself ### Installation of VDT plugin itself
...@@ -172,28 +173,33 @@ an existing one. We will use DDR3 memory interface project as an example. ...@@ -172,28 +173,33 @@ an existing one. We will use DDR3 memory interface project as an example.
Sample project is a DDR3 memory interface for Xilinx Zynq SOC that does not depend on Sample project is a DDR3 memory interface for Xilinx Zynq SOC that does not depend on
undocumented featuers and encrypted modules and can be simulated with the Free Software undocumented featuers and encrypted modules and can be simulated with the Free Software
tools. tools.
### Import eddr3 project ### Import x393 project
You may already have it if you installed other software for Elphel NC393 camera development, if that
is the case you can skip the next step and use ~/git/elphel393/fpga-elphel/x393/
``` ```
git clone git@github.com:Elphel/eddr3.git git clone https://github.com/Elphel/x393.git
cd x393
./INIT_PROJECT
``` ```
The last command copies Eclipse .project and .pydevproject files to the working directory.
From the Eclipse instance that runs VDT plugin (not the one with the VDT source code) From the Eclipse instance that runs VDT plugin (not the one with the VDT source code)
use the same steps as for importing VDT plugin code (described above): use the same steps as for importing VDT plugin code (described above):
``` ```
File->Import->Git->Projects from Git->Existing local repository-> Select directory where you cloned eddr3 File->Import->Git->Projects from Git->Existing local repository-> Select directory where you cloned x393
Import Existing Projects (wizard selection) Import Existing Projects (wizard selection)
``` ```
Keep **eddr3** checked and press **Finish** Keep both **x393** and **py393** checked and press **Finish**
### Configuration of VDT for eddr3 project ### Configuration of VDT for x393 project
The cloned eddr3 project does not include Verilog modules of Xilinx primitives that are The cloned x393 project does not include Verilog modules of Xilinx primitives that are
required even for simulation of the design. The required library (unisims) is included required even for simulation of the design. The required library (unisims) is included
with the Xilinx Vivado software and the proprietary license does not allow to redistribute with the Xilinx Vivado software and the proprietary license does not allow to redistribute
it. VDT provides means to copy this library from your Vivado installation to the project, it. VDT provides means to copy this library from your Vivado installation to the project,
So for the next step you need Xilinx software to be installed on the same or different So for the next step you need Xilinx software to be installed on the same or different
computer running GNU/Linux. computer running GNU/Linux.
Open the top module (ddrc_test01.v) in the Editor (seems to be a bug that prevents Open the top module (x393.v) in the Editor (or any othe Verilog file of the project)
configuration without that step)
Open "Verilog/VHDL' perspective: Open "Verilog/VHDL' perspective:
``` ```
...@@ -227,6 +233,10 @@ to be installed, you can do this with ...@@ -227,6 +233,10 @@ to be installed, you can do this with
``` ```
sudo apt-get install ssh-askpass sudo apt-get install ssh-askpass
``` ```
Update: In Kubuntu 16.04 ssh-askpass is not required, there is a similar program available in base
installation. Just pay attention that the first pop-up window will ask not for the password, but for
"yes".
If ssh will not find *ssh-askpass* or a similar program, it will fail and Eclipse console output will If ssh will not find *ssh-askpass* or a similar program, it will fail and Eclipse console output will
output the resolution suggestions. output the resolution suggestions.
...@@ -257,30 +267,30 @@ Vivado Tools -> Vivado utilities -> Copy Vivado primitives library to the local ...@@ -257,30 +267,30 @@ Vivado Tools -> Vivado utilities -> Copy Vivado primitives library to the local
``` ```
#### Patch primitive(s) to work with Icarus Verilog #### Patch primitive(s) to work with Icarus Verilog
Some of the Xilinx primitives can not be simulated correctly with Icarus Verilog, we will add more patches Some of the Xilinx primitives can not be simulated correctly with Icarus Verilog, we will add more patches
when we'll hit particular problems, for eddr3 only one file needs to be patched - OSERDESE1.v when we'll hit particular problems, for x393 only one file needs to be patched - OSERDESE1.v
Run patch command from the unisms subdirectory of the eddr3 project : Run patch command from the unisms subdirectory of the x393 project :
```bash ```bash
~/git/eddr3/unisims$ patch -p1 < ../unisims_patches/OSERDESE1.diff patch -p1 < ../unisims_patches/OSERDESE1.diff
``` ```
## Simulating eddr3 project with Icarus Verilog In x393_sata project this command will be
```bash
patch -p1 < ../x393/unisims_patches/OSERDESE1.diff
```
After new files are added the project needs to be refreshed - you may click on the project name in the navigator window
and press F5 key or right-click -> Refresh
There are many files in the library so refreshing make take a while.
## Simulating x393 project with Icarus Verilog
``` ```
Design Menu -> Verilog Development tools -> Icarus Verilog simulator Design Menu -> Verilog Development tools -> Icarus Verilog simulator
``` ```
If everything will work correctly, Icarus will compile and simulate the design (some warnings in the beginning are not fixed yet). After that GTKWave will If you get many errors "Unknown module type", you may need to refresh the project (press F5) after adding unisims library
open the simulation results. files.
If everything will work correctly, Icarus will compile and simulate the design (some warnings in the beginning are not fixed yet). After that GTKWave will open the simulation results.
In the case of problems you may get more verbose output in the console if you right-click on the In the case of problems you may get more verbose output in the console if you right-click on the
*Icarus Verilog Simulator*, select *Tool parameters*, open *Options tab* and check *Show output *Icarus Verilog Simulator*, select *Tool parameters*, open *Options tab* and check *Show output
with no errors/warnings* with no errors/warnings*
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