Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Submit feedback
Contribute to GitLab
Sign in
Toggle navigation
V
vdt-plugin
Project
Project
Details
Activity
Releases
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Commits
Open sidebar
Elphel
vdt-plugin
Repository
a3c8f61484859b4953a7eb2b059d995f092f6d5f
Switch branch/tag
vdt-plugin
tools
Verilog
ModelSIM.xml.broken
Find file
Blame
History
Permalink
Added Vivado , removed some old tools
· a3c8f614
Andrey Filippov
authored
Feb 01, 2014
a3c8f614
ModelSIM.xml.broken
9.65 KB
Edit
Web IDE
Replace ModelSIM.xml.broken
×
Attach a file by drag & drop or
click to upload
Commit message
Replace ModelSIM.xml.broken
Replace file
Cancel
A new branch will be created in your fork and a new merge request will be started.
