CU_TR_FILTER_MODE_POINT=0,/**< Point filter mode */
CU_TR_FILTER_MODE_LINEAR=1/**< Linear filter mode */
}CUfilter_mode;
/**
* Device properties
*/
typedefenumCUdevice_attribute_enum
{
CU_DEVICE_ATTRIBUTE_MAX_THREADS_PER_BLOCK=1,/**< Maximum number of threads per block */
CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_X=2,/**< Maximum block dimension X */
CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_Y=3,/**< Maximum block dimension Y */
CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_Z=4,/**< Maximum block dimension Z */
CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_X=5,/**< Maximum grid dimension X */
CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_Y=6,/**< Maximum grid dimension Y */
CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_Z=7,/**< Maximum grid dimension Z */
CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_BLOCK=8,/**< Maximum shared memory available per block in bytes */
CU_DEVICE_ATTRIBUTE_SHARED_MEMORY_PER_BLOCK=8,/**< Deprecated, use CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_BLOCK */
CU_DEVICE_ATTRIBUTE_TOTAL_CONSTANT_MEMORY=9,/**< Memory available on device for __constant__ variables in a CUDA C kernel in bytes */
CU_DEVICE_ATTRIBUTE_WARP_SIZE=10,/**< Warp size in threads */
CU_DEVICE_ATTRIBUTE_MAX_PITCH=11,/**< Maximum pitch in bytes allowed by memory copies */
CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_BLOCK=12,/**< Maximum number of 32-bit registers available per block */
CU_DEVICE_ATTRIBUTE_REGISTERS_PER_BLOCK=12,/**< Deprecated, use CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_BLOCK */
CU_DEVICE_ATTRIBUTE_CLOCK_RATE=13,/**< Peak clock frequency in kilohertz */
CU_DEVICE_ATTRIBUTE_TEXTURE_ALIGNMENT=14,/**< Alignment requirement for textures */
CU_DEVICE_ATTRIBUTE_GPU_OVERLAP=15,/**< Device can possibly copy memory and execute a kernel concurrently */
CU_DEVICE_ATTRIBUTE_MULTIPROCESSOR_COUNT=16,/**< Number of multiprocessors on device */
CU_DEVICE_ATTRIBUTE_KERNEL_EXEC_TIMEOUT=17,/**< Specifies whether there is a run time limit on kernels */
CU_DEVICE_ATTRIBUTE_INTEGRATED=18,/**< Device is integrated with host memory */
CU_DEVICE_ATTRIBUTE_CAN_MAP_HOST_MEMORY=19,/**< Device can map host memory into CUDA address space */
CU_DEVICE_ATTRIBUTE_COMPUTE_MODE=20,/**< Compute mode (See ::CUcomputemode for details) */
CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_WIDTH=21,/**< Maximum 1D texture width */
CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_WIDTH=22,/**< Maximum 2D texture width */
CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_HEIGHT=23,/**< Maximum 2D texture height */
CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_WIDTH=24,/**< Maximum 3D texture width */
CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_HEIGHT=25,/**< Maximum 3D texture height */
CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_DEPTH=26,/**< Maximum 3D texture depth */
CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_ARRAY_WIDTH=27,/**< Maximum texture array width */
CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_ARRAY_HEIGHT=28,/**< Maximum texture array height */
CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_ARRAY_NUMSLICES=29,/**< Maximum slices in a texture array */
CU_DEVICE_ATTRIBUTE_SURFACE_ALIGNMENT=30,/**< Alignment requirement for surfaces */
CU_DEVICE_ATTRIBUTE_CONCURRENT_KERNELS=31,/**< Device can possibly execute multiple kernels concurrently */
CU_DEVICE_ATTRIBUTE_ECC_ENABLED=32,/**< Device has ECC support enabled */
CU_DEVICE_ATTRIBUTE_PCI_BUS_ID=33,/**< PCI bus ID of the device */
CU_DEVICE_ATTRIBUTE_PCI_DEVICE_ID=34,/**< PCI device ID of the device */
CU_DEVICE_ATTRIBUTE_TCC_DRIVER=35/**< Device is using TCC driver model */
#if __CUDA_API_VERSION >= 4000
,CU_DEVICE_ATTRIBUTE_MEMORY_CLOCK_RATE=36,/**< Peak memory clock frequency in kilohertz */
CU_DEVICE_ATTRIBUTE_GLOBAL_MEMORY_BUS_WIDTH=37,/**< Global memory bus width in bits */
CU_DEVICE_ATTRIBUTE_L2_CACHE_SIZE=38,/**< Size of L2 cache in bytes */
CU_DEVICE_ATTRIBUTE_MAX_THREADS_PER_MULTIPROCESSOR=39,/**< Maximum resident threads per multiprocessor */
CU_DEVICE_ATTRIBUTE_ASYNC_ENGINE_COUNT=40,/**< Number of asynchronous engines */
CU_DEVICE_ATTRIBUTE_UNIFIED_ADDRESSING=41,/**< Device uses shares a unified address space with the host */
CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_LAYERED_WIDTH=42,/**< Maximum 1D layered texture width */
CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_LAYERED_LAYERS=43/**< Maximum layers in a 1D layered texture */
#endif
}CUdevice_attribute;
/**
* Legacy device properties
*/
typedefstructCUdevprop_st
{
intmaxThreadsPerBlock;/**< Maximum number of threads per block */
intmaxThreadsDim[3];/**< Maximum size of each dimension of a block */
intmaxGridSize[3];/**< Maximum size of each dimension of a grid */
intsharedMemPerBlock;/**< Shared memory available per block in bytes */
inttotalConstantMemory;/**< Constant memory available on device in bytes */
intSIMDWidth;/**< Warp size in threads */
intmemPitch;/**< Maximum pitch in bytes allowed by memory copies */
intregsPerBlock;/**< 32-bit registers available per block */
intclockRate;/**< Clock frequency in kilohertz */
inttextureAlign;/**< Alignment requirement for textures */
}CUdevprop;
/**
* Function properties
*/
typedefenumCUfunction_attribute_enum
{
/**
* The maximum number of threads per block, beyond which a launch of the
* function would fail. This number depends on both the function and the
* device on which the function is currently loaded.
*/
CU_FUNC_ATTRIBUTE_MAX_THREADS_PER_BLOCK=0,
/**
* The size in bytes of statically-allocated shared memory required by
* this function. This does not include dynamically-allocated shared
* memory requested by the user at runtime.
*/
CU_FUNC_ATTRIBUTE_SHARED_SIZE_BYTES=1,
/**
* The size in bytes of user-allocated constant memory required by this
* function.
*/
CU_FUNC_ATTRIBUTE_CONST_SIZE_BYTES=2,
/**
* The size in bytes of local memory used by each thread of this function.
*/
CU_FUNC_ATTRIBUTE_LOCAL_SIZE_BYTES=3,
/**
* The number of registers used by each thread of this function.
*/
CU_FUNC_ATTRIBUTE_NUM_REGS=4,
/**
* The PTX virtual architecture version for which the function was
* compiled. This value is the major PTX version * 10 + the minor PTX
* version, so a PTX version 1.3 function would return the value 13.
* Note that this may return the undefined value of 0 for cubins
* compiled prior to CUDA 3.0.
*/
CU_FUNC_ATTRIBUTE_PTX_VERSION=5,
/**
* The binary architecture version for which the function was compiled.
* This value is the major binary version * 10 + the minor binary version,
* so a binary version 1.3 function would return the value 13. Note that
* this will return a value of 10 for legacy cubins that do not have a
* properly-encoded binary architecture version.
*/
CU_FUNC_ATTRIBUTE_BINARY_VERSION=6,
CU_FUNC_ATTRIBUTE_MAX
}CUfunction_attribute;
/**
* Function cache configurations
*/
typedefenumCUfunc_cache_enum
{
CU_FUNC_CACHE_PREFER_NONE=0x00,/**< no preference for shared memory or L1 (default) */
CU_FUNC_CACHE_PREFER_SHARED=0x01,/**< prefer larger shared memory and smaller L1 cache */
CU_FUNC_CACHE_PREFER_L1=0x02/**< prefer larger L1 cache and smaller shared memory */
}CUfunc_cache;
/**
* Memory types
*/
typedefenumCUmemorytype_enum
{
CU_MEMORYTYPE_HOST=0x01,/**< Host memory */
CU_MEMORYTYPE_DEVICE=0x02,/**< Device memory */
CU_MEMORYTYPE_ARRAY=0x03/**< Array memory */
#if __CUDA_API_VERSION >= 4000
,CU_MEMORYTYPE_UNIFIED=0x04/**< Unified device or host memory */
#endif
}CUmemorytype;
/**
* Compute Modes
*/
typedefenumCUcomputemode_enum
{
CU_COMPUTEMODE_DEFAULT=0,/**< Default compute mode (Multiple contexts allowed per device) */
CU_COMPUTEMODE_EXCLUSIVE=1,/**< Compute-exclusive-thread mode (Only one context used by a single thread can be present on this device at a time) */
CU_COMPUTEMODE_PROHIBITED=2/**< Compute-prohibited mode (No contexts can be created on this device at this time) */
#if __CUDA_API_VERSION >= 4000
,CU_COMPUTEMODE_EXCLUSIVE_PROCESS=3/**< Compute-exclusive-process mode (Only one context used by a single process can be present on this device at a time) */
#endif
}CUcomputemode;
/**
* Online compiler options
*/
typedefenumCUjit_option_enum
{
/**
* Max number of registers that a thread may use.\n
* Option type: unsigned int
*/
CU_JIT_MAX_REGISTERS=0,
/**
* IN: Specifies minimum number of threads per block to target compilation
* for\n
* OUT: Returns the number of threads the compiler actually targeted.
* This restricts the resource utilization fo the compiler (e.g. max
* registers) such that a block with the given number of threads should be
* able to launch based on register limitations. Note, this option does not
* currently take into account any other resource limitations, such as
* shared memory utilization.\n
* Option type: unsigned int
*/
CU_JIT_THREADS_PER_BLOCK,
/**
* Returns a float value in the option of the wall clock time, in
* milliseconds, spent creating the cubin\n
* Option type: float
*/
CU_JIT_WALL_TIME,
/**
* Pointer to a buffer in which to print any log messsages from PTXAS
* that are informational in nature (the buffer size is specified via
* option ::CU_JIT_INFO_LOG_BUFFER_SIZE_BYTES) \n
* Option type: char*
*/
CU_JIT_INFO_LOG_BUFFER,
/**
* IN: Log buffer size in bytes. Log messages will be capped at this size
* (including null terminator)\n
* OUT: Amount of log buffer filled with messages\n
* Option type: unsigned int
*/
CU_JIT_INFO_LOG_BUFFER_SIZE_BYTES,
/**
* Pointer to a buffer in which to print any log messages from PTXAS that
* reflect errors (the buffer size is specified via option
* ::CU_JIT_ERROR_LOG_BUFFER_SIZE_BYTES)\n
* Option type: char*
*/
CU_JIT_ERROR_LOG_BUFFER,
/**
* IN: Log buffer size in bytes. Log messages will be capped at this size
* (including null terminator)\n
* OUT: Amount of log buffer filled with messages\n
* Option type: unsigned int
*/
CU_JIT_ERROR_LOG_BUFFER_SIZE_BYTES,
/**
* Level of optimizations to apply to generated code (0 - 4), with 4
* being the default and highest level of optimizations.\n
* Option type: unsigned int
*/
CU_JIT_OPTIMIZATION_LEVEL,
/**
* No option value required. Determines the target based on the current
* attached context (default)\n
* Option type: No option value needed
*/
CU_JIT_TARGET_FROM_CUCONTEXT,
/**
* Target is chosen based on supplied ::CUjit_target_enum.\n
* Option type: unsigned int for enumerated type ::CUjit_target_enum
*/
CU_JIT_TARGET,
/**
* Specifies choice of fallback strategy if matching cubin is not found.
* Choice is based on supplied ::CUjit_fallback_enum.\n
* Option type: unsigned int for enumerated type ::CUjit_fallback_enum
*/
CU_JIT_FALLBACK_STRATEGY
}CUjit_option;
/**
* Online compilation targets
*/
typedefenumCUjit_target_enum
{
CU_TARGET_COMPUTE_10=0,/**< Compute device class 1.0 */
CU_TARGET_COMPUTE_11,/**< Compute device class 1.1 */
CU_TARGET_COMPUTE_12,/**< Compute device class 1.2 */
CU_TARGET_COMPUTE_13,/**< Compute device class 1.3 */
CU_TARGET_COMPUTE_20,/**< Compute device class 2.0 */
CU_TARGET_COMPUTE_21/**< Compute device class 2.1 */
}CUjit_target;
/**
* Cubin matching fallback strategies
*/
typedefenumCUjit_fallback_enum
{
CU_PREFER_PTX=0,/**< Prefer to compile ptx */
CU_PREFER_BINARY/**< Prefer to fall back to compatible binary code */
}CUjit_fallback;
/**
* Flags to register a graphics resource
*/
typedefenumCUgraphicsRegisterFlags_enum
{
CU_GRAPHICS_REGISTER_FLAGS_NONE=0x00,
CU_GRAPHICS_REGISTER_FLAGS_READ_ONLY=0x01,
CU_GRAPHICS_REGISTER_FLAGS_WRITE_DISCARD=0x02,
CU_GRAPHICS_REGISTER_FLAGS_SURFACE_LDST=0x04
}CUgraphicsRegisterFlags;
/**
* Flags for mapping and unmapping interop resources
*/
typedefenumCUgraphicsMapResourceFlags_enum
{
CU_GRAPHICS_MAP_RESOURCE_FLAGS_NONE=0x00,
CU_GRAPHICS_MAP_RESOURCE_FLAGS_READ_ONLY=0x01,
CU_GRAPHICS_MAP_RESOURCE_FLAGS_WRITE_DISCARD=0x02
}CUgraphicsMapResourceFlags;
/**
* Array indices for cube faces
*/
typedefenumCUarray_cubemap_face_enum
{
CU_CUBEMAP_FACE_POSITIVE_X=0x00,/**< Positive X face of cubemap */
CU_CUBEMAP_FACE_NEGATIVE_X=0x01,/**< Negative X face of cubemap */
CU_CUBEMAP_FACE_POSITIVE_Y=0x02,/**< Positive Y face of cubemap */
CU_CUBEMAP_FACE_NEGATIVE_Y=0x03,/**< Negative Y face of cubemap */
CU_CUBEMAP_FACE_POSITIVE_Z=0x04,/**< Positive Z face of cubemap */
CU_CUBEMAP_FACE_NEGATIVE_Z=0x05/**< Negative Z face of cubemap */