Commit d4f217cf authored by Oleg Dzhimiev's avatar Oleg Dzhimiev

set ecc.size correctly, added NAND_NO_SUBPAGE_WRITE to options

parent d163c40a
......@@ -763,6 +763,10 @@ static int micron_nand_init(struct nand_chip *chip)
// chip->id.data[1] is dev_id (0xa3 in Elphel 10393)
nand_micron_mt29f_init(mtd, chip->id.data[1]);
// MT29F8G08ADBDAH4, no subpage write support
if (chip->id.data[1]==0xa3)
chip->options |= NAND_NO_SUBPAGE_WRITE;
// Elphel: modification for Micron NAND chips
//TODO: add Micron chip ID checking
mtd->_unlock = micron_nand_unlock;
......
......@@ -1341,11 +1341,7 @@ static int pl353_nand_probe(struct platform_device *pdev)
xnfc->buswidth = val;
chip->chip_delay = 30;
/* Set the device option and flash width */
// old:
//chip->options = NAND_BUSWIDTH_AUTO;
// new: MT29F8G08ADBDAH4 does not support subpage write,
// setting here, will change later
chip->options = NAND_BUSWIDTH_AUTO | NAND_NO_SUBPAGE_WRITE;
chip->options = NAND_BUSWIDTH_AUTO;
chip->bbt_options = NAND_BBT_USE_FLASH;
platform_set_drvdata(pdev, xnfc);
chip->setup_data_interface = pl353_setup_data_interface;
......
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